From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [PATCH v7 03/20] target/arm: Split out rebuild_hflags_common_32
Date: Thu, 17 Oct 2019 11:50:53 -0700 [thread overview]
Message-ID: <20191017185110.539-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20191017185110.539-1-richard.henderson@linaro.org>
Create a function to compute the values of the TBFLAG_A32 bits
that will be cached, and are used by all profiles.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 69da04786e..f05d042474 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11070,6 +11070,15 @@ static uint32_t rebuild_hflags_common(CPUARMState *env, int fp_el,
return flags;
}
+static uint32_t rebuild_hflags_common_32(CPUARMState *env, int fp_el,
+ ARMMMUIdx mmu_idx, uint32_t flags)
+{
+ flags = FIELD_DP32(flags, TBFLAG_A32, SCTLR_B, arm_sctlr_b(env));
+ flags = FIELD_DP32(flags, TBFLAG_A32, NS, !access_secure_reg(env));
+
+ return rebuild_hflags_common(env, fp_el, mmu_idx, flags);
+}
+
static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
ARMMMUIdx mmu_idx)
{
@@ -11141,7 +11150,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
ARMMMUIdx mmu_idx = arm_mmu_idx(env);
int current_el = arm_current_el(env);
int fp_el = fp_exception_el(env, current_el);
- uint32_t flags = 0;
+ uint32_t flags;
if (is_a64(env)) {
*pc = env->pc;
@@ -11151,12 +11160,11 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
}
} else {
*pc = env->regs[15];
+ flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0);
flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb);
flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len);
flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride);
flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits);
- flags = FIELD_DP32(flags, TBFLAG_A32, SCTLR_B, arm_sctlr_b(env));
- flags = FIELD_DP32(flags, TBFLAG_A32, NS, !access_secure_reg(env));
if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)
|| arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) {
flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
@@ -11166,8 +11174,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
flags = FIELD_DP32(flags, TBFLAG_A32,
XSCALE_CPAR, env->cp15.c15_cpar);
}
-
- flags = rebuild_hflags_common(env, fp_el, mmu_idx, flags);
}
/* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine
--
2.17.1
next prev parent reply other threads:[~2019-10-17 18:56 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-17 18:50 [PATCH v7 00/20] target/arm: Reduce overhead of cpu_get_tb_cpu_state Richard Henderson
2019-10-17 18:50 ` [PATCH v7 01/20] target/arm: Split out rebuild_hflags_common Richard Henderson
2019-10-17 18:50 ` [PATCH v7 02/20] target/arm: Split out rebuild_hflags_a64 Richard Henderson
2019-10-17 18:50 ` Richard Henderson [this message]
2019-10-17 18:50 ` [PATCH v7 04/20] target/arm: Split arm_cpu_data_is_big_endian Richard Henderson
2019-10-17 18:50 ` [PATCH v7 05/20] target/arm: Split out rebuild_hflags_m32 Richard Henderson
2019-10-17 18:50 ` [PATCH v7 06/20] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state Richard Henderson
2019-10-17 18:50 ` [PATCH v7 07/20] target/arm: Split out rebuild_hflags_a32 Richard Henderson
2019-10-17 18:50 ` [PATCH v7 08/20] target/arm: Split out rebuild_hflags_aprofile Richard Henderson
2019-10-17 18:50 ` [PATCH v7 09/20] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state Richard Henderson
2019-10-17 18:51 ` [PATCH v7 10/20] target/arm: Simplify set of PSTATE_SS " Richard Henderson
2019-10-17 18:51 ` [PATCH v7 11/20] target/arm: Hoist computation of TBFLAG_A32.VFPEN Richard Henderson
2019-10-17 18:51 ` [PATCH v7 12/20] target/arm: Add arm_rebuild_hflags Richard Henderson
2019-10-17 18:51 ` [PATCH v7 13/20] target/arm: Split out arm_mmu_idx_el Richard Henderson
2019-10-17 18:51 ` [PATCH v7 14/20] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state Richard Henderson
2019-10-17 18:51 ` [PATCH v7 15/20] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) Richard Henderson
2019-10-17 18:51 ` [PATCH v7 16/20] target/arm: Rebuild hflags at EL changes Richard Henderson
2019-10-17 18:51 ` [PATCH v7 17/20] target/arm: Rebuild hflags at MSR writes Richard Henderson
2019-10-18 12:32 ` Peter Maydell
2019-10-18 14:30 ` Richard Henderson
2019-10-18 14:49 ` Peter Maydell
2019-10-17 18:51 ` [PATCH v7 18/20] target/arm: Rebuild hflags at CPSR writes Richard Henderson
2019-10-17 18:51 ` [PATCH v7 19/20] target/arm: Rebuild hflags for M-profile Richard Henderson
2019-10-18 12:25 ` Peter Maydell
2019-10-18 14:31 ` Richard Henderson
2019-10-18 14:52 ` Peter Maydell
2019-10-18 14:55 ` Peter Maydell
2019-10-17 18:51 ` [PATCH v7 20/20] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191017185110.539-4-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).