From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BAFFCA9EA0 for ; Fri, 18 Oct 2019 17:25:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6FC6821925 for ; Fri, 18 Oct 2019 17:25:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6FC6821925 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kaod.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:43772 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLW0M-0005fB-Jc for qemu-devel@archiver.kernel.org; Fri, 18 Oct 2019 13:25:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57344) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLVxb-000256-Dd for qemu-devel@nongnu.org; Fri, 18 Oct 2019 13:22:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLVxa-0007jm-6A for qemu-devel@nongnu.org; Fri, 18 Oct 2019 13:22:43 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:21408) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLVxa-0007jR-0x for qemu-devel@nongnu.org; Fri, 18 Oct 2019 13:22:42 -0400 Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x9IHLh3f044047 for ; Fri, 18 Oct 2019 13:22:41 -0400 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0a-001b2d01.pphosted.com with ESMTP id 2vq0hagk1x-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 18 Oct 2019 13:22:41 -0400 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 18 Oct 2019 18:22:36 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x9IHMZlK131330 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 18 Oct 2019 17:22:35 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 235B3A4053; Fri, 18 Oct 2019 17:22:35 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0FE43A4040; Fri, 18 Oct 2019 17:22:35 +0000 (GMT) Received: from smtp.tls.ibm.com (unknown [9.101.4.1]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 18 Oct 2019 17:22:35 +0000 (GMT) Received: from yukon.kaod.org.com (sig-9-145-27-7.uk.ibm.com [9.145.27.7]) by smtp.tls.ibm.com (Postfix) with ESMTP id 79D332201BC; Fri, 18 Oct 2019 19:22:34 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Subject: [PATCH v2 2/2] spapr/xive: Set the OS CAM line at reset Date: Fri, 18 Oct 2019 19:22:19 +0200 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191018172219.10039-1-clg@kaod.org> References: <20191018172219.10039-1-clg@kaod.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-TM-AS-GCONF: 00 x-cbid: 19101817-4275-0000-0000-00000373623D X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19101817-4276-0000-0000-000038867F26 Message-Id: <20191018172219.10039-3-clg@kaod.org> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-10-18_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1910180154 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by mx0a-001b2d01.pphosted.com id x9IHLh3f044047 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Greg Kurz Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" When a Virtual Processor is scheduled to run on a HW thread, the hypervisor pushes its identifier in the OS CAM line. When running with kernel_irqchip=3Doff, QEMU needs to emulate the same behavior. Set the OS CAM line when the interrupt presenter of the sPAPR core is reseted. This will also cover the case of hot-plugged CPUs. This change also has the benefit to remove the use of CPU_FOREACH() which can be unsafe. Signed-off-by: C=C3=A9dric Le Goater --- include/hw/ppc/spapr_xive.h | 1 - hw/intc/spapr_xive.c | 18 +++--------------- 2 files changed, 3 insertions(+), 16 deletions(-) diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index d84bd5c229f0..742b7e834f2a 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -57,7 +57,6 @@ typedef struct SpaprXive { void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon); =20 void spapr_xive_hcall_init(SpaprMachineState *spapr); -void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx); void spapr_xive_mmio_set_enabled(SpaprXive *xive, bool enable); void spapr_xive_map_mmio(SpaprXive *xive); =20 diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 258b1c5fb5ff..4f584e582b6c 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -210,7 +210,7 @@ void spapr_xive_mmio_set_enabled(SpaprXive *xive, boo= l enable) * hypervisor pushes its identifier in the OS CAM line. Emulate the * same behavior under QEMU. */ -void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx) +static void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx) { uint8_t nvt_blk; uint32_t nvt_idx; @@ -544,12 +544,6 @@ static int spapr_xive_cpu_intc_create(SpaprInterrupt= Controller *intc, } =20 spapr_cpu->tctx =3D XIVE_TCTX(obj); - - /* - * (TCG) Early setting the OS CAM line for hotplugged CPUs as they - * don't beneficiate from the reset of the XIVE IRQ backend - */ - spapr_xive_set_tctx_os_cam(spapr_cpu->tctx); return 0; } =20 @@ -557,6 +551,8 @@ static void spapr_xive_cpu_intc_reset(SpaprInterruptC= ontroller *intc, PowerPCCPU *cpu) { xive_tctx_reset(spapr_cpu_state(cpu)->tctx); + + spapr_xive_set_tctx_os_cam(spapr_cpu_state(cpu)->tctx); } =20 static void spapr_xive_set_irq(SpaprInterruptController *intc, int irq, = int val) @@ -649,14 +645,6 @@ static void spapr_xive_dt(SpaprInterruptController *= intc, uint32_t nr_servers, static int spapr_xive_activate(SpaprInterruptController *intc, Error **e= rrp) { SpaprXive *xive =3D SPAPR_XIVE(intc); - CPUState *cs; - - CPU_FOREACH(cs) { - PowerPCCPU *cpu =3D POWERPC_CPU(cs); - - /* (TCG) Set the OS CAM line of the thread interrupt context. */ - spapr_xive_set_tctx_os_cam(spapr_cpu_state(cpu)->tctx); - } =20 if (kvm_enabled()) { int rc =3D spapr_irq_init_kvm(kvmppc_xive_connect, intc, errp); --=20 2.21.0