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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 09/41] hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API
Date: Tue, 22 Oct 2019 14:31:02 +0100	[thread overview]
Message-ID: <20191022133134.14487-10-peter.maydell@linaro.org> (raw)
In-Reply-To: <20191022133134.14487-1-peter.maydell@linaro.org>

Switch the etraxfs_timer code away from bottom-half based ptimers to
the new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20191017132905.5604-7-peter.maydell@linaro.org
---
 hw/timer/etraxfs_timer.c | 23 +++++++++++++----------
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c
index ab27fe1895b..afe3d30a8ea 100644
--- a/hw/timer/etraxfs_timer.c
+++ b/hw/timer/etraxfs_timer.c
@@ -26,7 +26,6 @@
 #include "hw/sysbus.h"
 #include "sysemu/reset.h"
 #include "sysemu/runstate.h"
-#include "qemu/main-loop.h"
 #include "qemu/module.h"
 #include "qemu/timer.h"
 #include "hw/irq.h"
@@ -59,9 +58,6 @@ typedef struct ETRAXTimerState {
     qemu_irq irq;
     qemu_irq nmi;
 
-    QEMUBH *bh_t0;
-    QEMUBH *bh_t1;
-    QEMUBH *bh_wd;
     ptimer_state *ptimer_t0;
     ptimer_state *ptimer_t1;
     ptimer_state *ptimer_wd;
@@ -155,6 +151,7 @@ static void update_ctrl(ETRAXTimerState *t, int tnum)
     }
 
     D(printf ("freq_hz=%d div=%d\n", freq_hz, div));
+    ptimer_transaction_begin(timer);
     ptimer_set_freq(timer, freq_hz);
     ptimer_set_limit(timer, div, 0);
 
@@ -176,6 +173,7 @@ static void update_ctrl(ETRAXTimerState *t, int tnum)
             abort();
             break;
     }
+    ptimer_transaction_commit(timer);
 }
 
 static void timer_update_irq(ETRAXTimerState *t)
@@ -240,6 +238,7 @@ static inline void timer_watchdog_update(ETRAXTimerState *t, uint32_t value)
 
     t->wd_hits = 0;
 
+    ptimer_transaction_begin(t->ptimer_wd);
     ptimer_set_freq(t->ptimer_wd, 760);
     if (wd_cnt == 0)
         wd_cnt = 256;
@@ -250,6 +249,7 @@ static inline void timer_watchdog_update(ETRAXTimerState *t, uint32_t value)
         ptimer_stop(t->ptimer_wd);
 
     t->rw_wd_ctrl = value;
+    ptimer_transaction_commit(t->ptimer_wd);
 }
 
 static void
@@ -311,9 +311,15 @@ static void etraxfs_timer_reset(void *opaque)
 {
     ETRAXTimerState *t = opaque;
 
+    ptimer_transaction_begin(t->ptimer_t0);
     ptimer_stop(t->ptimer_t0);
+    ptimer_transaction_commit(t->ptimer_t0);
+    ptimer_transaction_begin(t->ptimer_t1);
     ptimer_stop(t->ptimer_t1);
+    ptimer_transaction_commit(t->ptimer_t1);
+    ptimer_transaction_begin(t->ptimer_wd);
     ptimer_stop(t->ptimer_wd);
+    ptimer_transaction_commit(t->ptimer_wd);
     t->rw_wd_ctrl = 0;
     t->r_intr = 0;
     t->rw_intr_mask = 0;
@@ -325,12 +331,9 @@ static void etraxfs_timer_realize(DeviceState *dev, Error **errp)
     ETRAXTimerState *t = ETRAX_TIMER(dev);
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
 
-    t->bh_t0 = qemu_bh_new(timer0_hit, t);
-    t->bh_t1 = qemu_bh_new(timer1_hit, t);
-    t->bh_wd = qemu_bh_new(watchdog_hit, t);
-    t->ptimer_t0 = ptimer_init_with_bh(t->bh_t0, PTIMER_POLICY_DEFAULT);
-    t->ptimer_t1 = ptimer_init_with_bh(t->bh_t1, PTIMER_POLICY_DEFAULT);
-    t->ptimer_wd = ptimer_init_with_bh(t->bh_wd, PTIMER_POLICY_DEFAULT);
+    t->ptimer_t0 = ptimer_init(timer0_hit, t, PTIMER_POLICY_DEFAULT);
+    t->ptimer_t1 = ptimer_init(timer1_hit, t, PTIMER_POLICY_DEFAULT);
+    t->ptimer_wd = ptimer_init(watchdog_hit, t, PTIMER_POLICY_DEFAULT);
 
     sysbus_init_irq(sbd, &t->irq);
     sysbus_init_irq(sbd, &t->nmi);
-- 
2.20.1



  parent reply	other threads:[~2019-10-22 13:38 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-22 13:30 [PULL 00/41] target-arm queue Peter Maydell
2019-10-22 13:30 ` [PULL 01/41] target/arm: Fix sign-extension for SMLAL* Peter Maydell
2019-10-22 13:30 ` [PULL 02/41] aspeed: Add an AST2600 eval board Peter Maydell
2019-10-22 13:30 ` [PULL 03/41] hw/timer/exynos4210_mct: Initialize ptimer before starting it Peter Maydell
2019-10-22 13:30 ` [PULL 04/41] hw/timer/arm_mptimer.c: Undo accidental rename of arm_mptimer_init() Peter Maydell
2019-10-22 13:30 ` [PULL 05/41] hw/timer/puv3_ost.c: Switch to transaction-based ptimer API Peter Maydell
2019-10-22 13:30 ` [PULL 06/41] hw/timer/sh_timer: " Peter Maydell
2019-10-22 13:31 ` [PULL 07/41] hw/timer/lm32_timer: " Peter Maydell
2019-10-22 13:31 ` [PULL 08/41] hw/timer/altera_timer.c: " Peter Maydell
2019-10-22 13:31 ` Peter Maydell [this message]
2019-10-22 13:31 ` [PULL 10/41] hw/m68k/mcf5208.c: " Peter Maydell
2019-10-22 13:31 ` [PULL 11/41] target/arm: Split out rebuild_hflags_common Peter Maydell
2019-10-22 13:31 ` [PULL 12/41] target/arm: Split out rebuild_hflags_a64 Peter Maydell
2019-10-22 13:31 ` [PULL 13/41] target/arm: Split out rebuild_hflags_common_32 Peter Maydell
2019-10-22 13:31 ` [PULL 14/41] target/arm: Split arm_cpu_data_is_big_endian Peter Maydell
2019-10-22 13:31 ` [PULL 15/41] target/arm: Split out rebuild_hflags_m32 Peter Maydell
2019-10-22 13:31 ` [PULL 16/41] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 17/41] target/arm: Split out rebuild_hflags_a32 Peter Maydell
2019-10-22 13:31 ` [PULL 18/41] target/arm: Split out rebuild_hflags_aprofile Peter Maydell
2019-10-22 13:31 ` [PULL 19/41] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 20/41] target/arm: Simplify set of PSTATE_SS " Peter Maydell
2019-10-22 13:31 ` [PULL 21/41] target/arm: Hoist computation of TBFLAG_A32.VFPEN Peter Maydell
2019-10-22 13:31 ` [PULL 22/41] target/arm: Add arm_rebuild_hflags Peter Maydell
2019-10-22 13:31 ` [PULL 23/41] target/arm: Split out arm_mmu_idx_el Peter Maydell
2019-10-22 13:31 ` [PULL 24/41] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 25/41] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) Peter Maydell
2019-10-22 13:31 ` [PULL 26/41] target/arm: Rebuild hflags at EL changes Peter Maydell
2019-10-22 13:31 ` [PULL 27/41] target/arm: Rebuild hflags at MSR writes Peter Maydell
2019-10-22 13:31 ` [PULL 28/41] target/arm: Rebuild hflags at CPSR writes Peter Maydell
2019-10-22 13:31 ` [PULL 29/41] target/arm: Rebuild hflags at Xscale SCTLR writes Peter Maydell
2019-10-22 13:31 ` [PULL 30/41] target/arm: Rebuild hflags for M-profile Peter Maydell
2019-10-22 13:31 ` [PULL 31/41] target/arm: Rebuild hflags for M-profile NVIC Peter Maydell
2019-10-22 13:31 ` [PULL 32/41] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 33/41] hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC functions Peter Maydell
2019-10-22 13:31 ` [PULL 34/41] hw/sd/sdhci: Add dummy Samsung SDHCI controller Peter Maydell
2019-10-22 13:31 ` [PULL 35/41] hw/arm/exynos4210: Use the Samsung s3c " Peter Maydell
2019-10-22 13:31 ` [PULL 36/41] hw/arm/xilinx_zynq: Use the IEC binary prefix definitions Peter Maydell
2019-10-22 13:31 ` [PULL 37/41] hw/arm/mps2: " Peter Maydell
2019-10-22 13:31 ` [PULL 38/41] hw/arm/collie: Create the RAM in the board Peter Maydell
2019-10-22 13:31 ` [PULL 39/41] hw/arm/omap2: " Peter Maydell
2019-10-22 13:31 ` [PULL 40/41] hw/arm/omap1: " Peter Maydell
2019-10-22 13:31 ` [PULL 41/41] hw/arm/digic4: Inline digic4_board_setup_ram() function Peter Maydell

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