From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 03/41] hw/timer/exynos4210_mct: Initialize ptimer before starting it
Date: Tue, 22 Oct 2019 14:30:56 +0100 [thread overview]
Message-ID: <20191022133134.14487-4-peter.maydell@linaro.org> (raw)
In-Reply-To: <20191022133134.14487-1-peter.maydell@linaro.org>
From: Guenter Roeck <linux@roeck-us.net>
When booting a recent Linux kernel, the qemu message "Timer with delta
zero, disabling" is seen, apparently because a ptimer is started before
being initialized. Fix the problem by initializing the offending ptimer
before starting it.
The bug is effectively harmless in the old QEMUBH setup
because the sequence of events is:
* the delta zero means the timer expires immediately
* ptimer_reload() arranges for exynos4210_gfrc_event() to be called
* ptimer_reload() notices the zero delta and disables the timer
* later, the QEMUBH runs, and exynos4210_gfrc_event() correctly
configures the timer and restarts it
In the new transaction based API the bug is still harmless,
but differences of when the callback function runs mean the
message is not printed any more:
* ptimer_run() does nothing as it's inside a transaction block
* ptimer_transaction_commit() sees it has work to do and
calls ptimer_reload()
* the zero delta means the timer expires immediately
* ptimer_reload() calls exynos4210_gfrc_event() directly
* exynos4210_gfrc_event() configures the timer
* the delta is no longer zero so ptimer_reload() doesn't complain
(the zero-delta test is after the trigger-callback in
the ptimer_reload() function)
Regardless, the behaviour here was not intentional, and we should
just program the ptimer correctly to start with.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20191018143149.9216-1-peter.maydell@linaro.org
[PMM: Expansion/clarification of the commit message:
the message is about a zero delta, not a zero period;
added detail to the commit message of the analysis of what
is happening and why the kernel boots even with the message;
added note that the message goes away with the new ptimer API]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/timer/exynos4210_mct.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c
index 72257584145..944120aea59 100644
--- a/hw/timer/exynos4210_mct.c
+++ b/hw/timer/exynos4210_mct.c
@@ -1254,7 +1254,7 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
/* Start FRC if transition from disabled to enabled */
if ((value & G_TCON_TIMER_ENABLE) > (old_val &
G_TCON_TIMER_ENABLE)) {
- exynos4210_gfrc_start(&s->g_timer);
+ exynos4210_gfrc_restart(s);
}
if ((value & G_TCON_TIMER_ENABLE) < (old_val &
G_TCON_TIMER_ENABLE)) {
--
2.20.1
next prev parent reply other threads:[~2019-10-22 13:37 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-22 13:30 [PULL 00/41] target-arm queue Peter Maydell
2019-10-22 13:30 ` [PULL 01/41] target/arm: Fix sign-extension for SMLAL* Peter Maydell
2019-10-22 13:30 ` [PULL 02/41] aspeed: Add an AST2600 eval board Peter Maydell
2019-10-22 13:30 ` Peter Maydell [this message]
2019-10-22 13:30 ` [PULL 04/41] hw/timer/arm_mptimer.c: Undo accidental rename of arm_mptimer_init() Peter Maydell
2019-10-22 13:30 ` [PULL 05/41] hw/timer/puv3_ost.c: Switch to transaction-based ptimer API Peter Maydell
2019-10-22 13:30 ` [PULL 06/41] hw/timer/sh_timer: " Peter Maydell
2019-10-22 13:31 ` [PULL 07/41] hw/timer/lm32_timer: " Peter Maydell
2019-10-22 13:31 ` [PULL 08/41] hw/timer/altera_timer.c: " Peter Maydell
2019-10-22 13:31 ` [PULL 09/41] hw/watchdog/etraxfs_timer.c: " Peter Maydell
2019-10-22 13:31 ` [PULL 10/41] hw/m68k/mcf5208.c: " Peter Maydell
2019-10-22 13:31 ` [PULL 11/41] target/arm: Split out rebuild_hflags_common Peter Maydell
2019-10-22 13:31 ` [PULL 12/41] target/arm: Split out rebuild_hflags_a64 Peter Maydell
2019-10-22 13:31 ` [PULL 13/41] target/arm: Split out rebuild_hflags_common_32 Peter Maydell
2019-10-22 13:31 ` [PULL 14/41] target/arm: Split arm_cpu_data_is_big_endian Peter Maydell
2019-10-22 13:31 ` [PULL 15/41] target/arm: Split out rebuild_hflags_m32 Peter Maydell
2019-10-22 13:31 ` [PULL 16/41] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 17/41] target/arm: Split out rebuild_hflags_a32 Peter Maydell
2019-10-22 13:31 ` [PULL 18/41] target/arm: Split out rebuild_hflags_aprofile Peter Maydell
2019-10-22 13:31 ` [PULL 19/41] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 20/41] target/arm: Simplify set of PSTATE_SS " Peter Maydell
2019-10-22 13:31 ` [PULL 21/41] target/arm: Hoist computation of TBFLAG_A32.VFPEN Peter Maydell
2019-10-22 13:31 ` [PULL 22/41] target/arm: Add arm_rebuild_hflags Peter Maydell
2019-10-22 13:31 ` [PULL 23/41] target/arm: Split out arm_mmu_idx_el Peter Maydell
2019-10-22 13:31 ` [PULL 24/41] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 25/41] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) Peter Maydell
2019-10-22 13:31 ` [PULL 26/41] target/arm: Rebuild hflags at EL changes Peter Maydell
2019-10-22 13:31 ` [PULL 27/41] target/arm: Rebuild hflags at MSR writes Peter Maydell
2019-10-22 13:31 ` [PULL 28/41] target/arm: Rebuild hflags at CPSR writes Peter Maydell
2019-10-22 13:31 ` [PULL 29/41] target/arm: Rebuild hflags at Xscale SCTLR writes Peter Maydell
2019-10-22 13:31 ` [PULL 30/41] target/arm: Rebuild hflags for M-profile Peter Maydell
2019-10-22 13:31 ` [PULL 31/41] target/arm: Rebuild hflags for M-profile NVIC Peter Maydell
2019-10-22 13:31 ` [PULL 32/41] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 33/41] hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC functions Peter Maydell
2019-10-22 13:31 ` [PULL 34/41] hw/sd/sdhci: Add dummy Samsung SDHCI controller Peter Maydell
2019-10-22 13:31 ` [PULL 35/41] hw/arm/exynos4210: Use the Samsung s3c " Peter Maydell
2019-10-22 13:31 ` [PULL 36/41] hw/arm/xilinx_zynq: Use the IEC binary prefix definitions Peter Maydell
2019-10-22 13:31 ` [PULL 37/41] hw/arm/mps2: " Peter Maydell
2019-10-22 13:31 ` [PULL 38/41] hw/arm/collie: Create the RAM in the board Peter Maydell
2019-10-22 13:31 ` [PULL 39/41] hw/arm/omap2: " Peter Maydell
2019-10-22 13:31 ` [PULL 40/41] hw/arm/omap1: " Peter Maydell
2019-10-22 13:31 ` [PULL 41/41] hw/arm/digic4: Inline digic4_board_setup_ram() function Peter Maydell
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