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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 05/41] hw/timer/puv3_ost.c: Switch to transaction-based ptimer API
Date: Tue, 22 Oct 2019 14:30:58 +0100	[thread overview]
Message-ID: <20191022133134.14487-6-peter.maydell@linaro.org> (raw)
In-Reply-To: <20191022133134.14487-1-peter.maydell@linaro.org>

Switch the puv3_ost code away from bottom-half based ptimers to the
new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20191017132905.5604-2-peter.maydell@linaro.org
---
 hw/timer/puv3_ost.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c
index 0898da5ce97..697519593bb 100644
--- a/hw/timer/puv3_ost.c
+++ b/hw/timer/puv3_ost.c
@@ -13,7 +13,6 @@
 #include "hw/sysbus.h"
 #include "hw/irq.h"
 #include "hw/ptimer.h"
-#include "qemu/main-loop.h"
 #include "qemu/module.h"
 
 #undef DEBUG_PUV3
@@ -27,7 +26,6 @@ typedef struct PUV3OSTState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
-    QEMUBH *bh;
     qemu_irq irq;
     ptimer_state *ptimer;
 
@@ -68,6 +66,7 @@ static void puv3_ost_write(void *opaque, hwaddr offset,
     DPRINTF("offset 0x%x, value 0x%x\n", offset, value);
     switch (offset) {
     case 0x00: /* Match Register 0 */
+        ptimer_transaction_begin(s->ptimer);
         s->reg_OSMR0 = value;
         if (s->reg_OSMR0 > s->reg_OSCR) {
             ptimer_set_count(s->ptimer, s->reg_OSMR0 - s->reg_OSCR);
@@ -76,6 +75,7 @@ static void puv3_ost_write(void *opaque, hwaddr offset,
                     (0xffffffff - s->reg_OSCR));
         }
         ptimer_run(s->ptimer, 2);
+        ptimer_transaction_commit(s->ptimer);
         break;
     case 0x14: /* Status Register */
         assert(value == 0);
@@ -128,9 +128,10 @@ static void puv3_ost_realize(DeviceState *dev, Error **errp)
 
     sysbus_init_irq(sbd, &s->irq);
 
-    s->bh = qemu_bh_new(puv3_ost_tick, s);
-    s->ptimer = ptimer_init_with_bh(s->bh, PTIMER_POLICY_DEFAULT);
+    s->ptimer = ptimer_init(puv3_ost_tick, s, PTIMER_POLICY_DEFAULT);
+    ptimer_transaction_begin(s->ptimer);
     ptimer_set_freq(s->ptimer, 50 * 1000 * 1000);
+    ptimer_transaction_commit(s->ptimer);
 
     memory_region_init_io(&s->iomem, OBJECT(s), &puv3_ost_ops, s, "puv3_ost",
             PUV3_REGS_OFFSET);
-- 
2.20.1



  parent reply	other threads:[~2019-10-22 13:37 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-22 13:30 [PULL 00/41] target-arm queue Peter Maydell
2019-10-22 13:30 ` [PULL 01/41] target/arm: Fix sign-extension for SMLAL* Peter Maydell
2019-10-22 13:30 ` [PULL 02/41] aspeed: Add an AST2600 eval board Peter Maydell
2019-10-22 13:30 ` [PULL 03/41] hw/timer/exynos4210_mct: Initialize ptimer before starting it Peter Maydell
2019-10-22 13:30 ` [PULL 04/41] hw/timer/arm_mptimer.c: Undo accidental rename of arm_mptimer_init() Peter Maydell
2019-10-22 13:30 ` Peter Maydell [this message]
2019-10-22 13:30 ` [PULL 06/41] hw/timer/sh_timer: Switch to transaction-based ptimer API Peter Maydell
2019-10-22 13:31 ` [PULL 07/41] hw/timer/lm32_timer: " Peter Maydell
2019-10-22 13:31 ` [PULL 08/41] hw/timer/altera_timer.c: " Peter Maydell
2019-10-22 13:31 ` [PULL 09/41] hw/watchdog/etraxfs_timer.c: " Peter Maydell
2019-10-22 13:31 ` [PULL 10/41] hw/m68k/mcf5208.c: " Peter Maydell
2019-10-22 13:31 ` [PULL 11/41] target/arm: Split out rebuild_hflags_common Peter Maydell
2019-10-22 13:31 ` [PULL 12/41] target/arm: Split out rebuild_hflags_a64 Peter Maydell
2019-10-22 13:31 ` [PULL 13/41] target/arm: Split out rebuild_hflags_common_32 Peter Maydell
2019-10-22 13:31 ` [PULL 14/41] target/arm: Split arm_cpu_data_is_big_endian Peter Maydell
2019-10-22 13:31 ` [PULL 15/41] target/arm: Split out rebuild_hflags_m32 Peter Maydell
2019-10-22 13:31 ` [PULL 16/41] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 17/41] target/arm: Split out rebuild_hflags_a32 Peter Maydell
2019-10-22 13:31 ` [PULL 18/41] target/arm: Split out rebuild_hflags_aprofile Peter Maydell
2019-10-22 13:31 ` [PULL 19/41] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 20/41] target/arm: Simplify set of PSTATE_SS " Peter Maydell
2019-10-22 13:31 ` [PULL 21/41] target/arm: Hoist computation of TBFLAG_A32.VFPEN Peter Maydell
2019-10-22 13:31 ` [PULL 22/41] target/arm: Add arm_rebuild_hflags Peter Maydell
2019-10-22 13:31 ` [PULL 23/41] target/arm: Split out arm_mmu_idx_el Peter Maydell
2019-10-22 13:31 ` [PULL 24/41] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 25/41] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) Peter Maydell
2019-10-22 13:31 ` [PULL 26/41] target/arm: Rebuild hflags at EL changes Peter Maydell
2019-10-22 13:31 ` [PULL 27/41] target/arm: Rebuild hflags at MSR writes Peter Maydell
2019-10-22 13:31 ` [PULL 28/41] target/arm: Rebuild hflags at CPSR writes Peter Maydell
2019-10-22 13:31 ` [PULL 29/41] target/arm: Rebuild hflags at Xscale SCTLR writes Peter Maydell
2019-10-22 13:31 ` [PULL 30/41] target/arm: Rebuild hflags for M-profile Peter Maydell
2019-10-22 13:31 ` [PULL 31/41] target/arm: Rebuild hflags for M-profile NVIC Peter Maydell
2019-10-22 13:31 ` [PULL 32/41] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 33/41] hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC functions Peter Maydell
2019-10-22 13:31 ` [PULL 34/41] hw/sd/sdhci: Add dummy Samsung SDHCI controller Peter Maydell
2019-10-22 13:31 ` [PULL 35/41] hw/arm/exynos4210: Use the Samsung s3c " Peter Maydell
2019-10-22 13:31 ` [PULL 36/41] hw/arm/xilinx_zynq: Use the IEC binary prefix definitions Peter Maydell
2019-10-22 13:31 ` [PULL 37/41] hw/arm/mps2: " Peter Maydell
2019-10-22 13:31 ` [PULL 38/41] hw/arm/collie: Create the RAM in the board Peter Maydell
2019-10-22 13:31 ` [PULL 39/41] hw/arm/omap2: " Peter Maydell
2019-10-22 13:31 ` [PULL 40/41] hw/arm/omap1: " Peter Maydell
2019-10-22 13:31 ` [PULL 41/41] hw/arm/digic4: Inline digic4_board_setup_ram() function Peter Maydell

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