qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 07/41] hw/timer/lm32_timer: Switch to transaction-based ptimer API
Date: Tue, 22 Oct 2019 14:31:00 +0100	[thread overview]
Message-ID: <20191022133134.14487-8-peter.maydell@linaro.org> (raw)
In-Reply-To: <20191022133134.14487-1-peter.maydell@linaro.org>

Switch the lm32_timer code away from bottom-half based ptimers to the
new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the ytimer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20191017132905.5604-4-peter.maydell@linaro.org
---
 hw/timer/lm32_timer.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/hw/timer/lm32_timer.c b/hw/timer/lm32_timer.c
index fabde760b2d..3fdecd09fe2 100644
--- a/hw/timer/lm32_timer.c
+++ b/hw/timer/lm32_timer.c
@@ -30,7 +30,6 @@
 #include "hw/ptimer.h"
 #include "hw/qdev-properties.h"
 #include "qemu/error-report.h"
-#include "qemu/main-loop.h"
 #include "qemu/module.h"
 
 #define DEFAULT_FREQUENCY (50*1000000)
@@ -63,7 +62,6 @@ struct LM32TimerState {
 
     MemoryRegion iomem;
 
-    QEMUBH *bh;
     ptimer_state *ptimer;
 
     qemu_irq irq;
@@ -119,6 +117,7 @@ static void timer_write(void *opaque, hwaddr addr,
         s->regs[R_SR] &= ~SR_TO;
         break;
     case R_CR:
+        ptimer_transaction_begin(s->ptimer);
         s->regs[R_CR] = value;
         if (s->regs[R_CR] & CR_START) {
             ptimer_run(s->ptimer, 1);
@@ -126,10 +125,13 @@ static void timer_write(void *opaque, hwaddr addr,
         if (s->regs[R_CR] & CR_STOP) {
             ptimer_stop(s->ptimer);
         }
+        ptimer_transaction_commit(s->ptimer);
         break;
     case R_PERIOD:
         s->regs[R_PERIOD] = value;
+        ptimer_transaction_begin(s->ptimer);
         ptimer_set_count(s->ptimer, value);
+        ptimer_transaction_commit(s->ptimer);
         break;
     case R_SNAPSHOT:
         error_report("lm32_timer: write access to read only register 0x"
@@ -176,7 +178,9 @@ static void timer_reset(DeviceState *d)
     for (i = 0; i < R_MAX; i++) {
         s->regs[i] = 0;
     }
+    ptimer_transaction_begin(s->ptimer);
     ptimer_stop(s->ptimer);
+    ptimer_transaction_commit(s->ptimer);
 }
 
 static void lm32_timer_init(Object *obj)
@@ -195,10 +199,11 @@ static void lm32_timer_realize(DeviceState *dev, Error **errp)
 {
     LM32TimerState *s = LM32_TIMER(dev);
 
-    s->bh = qemu_bh_new(timer_hit, s);
-    s->ptimer = ptimer_init_with_bh(s->bh, PTIMER_POLICY_DEFAULT);
+    s->ptimer = ptimer_init(timer_hit, s, PTIMER_POLICY_DEFAULT);
 
+    ptimer_transaction_begin(s->ptimer);
     ptimer_set_freq(s->ptimer, s->freq_hz);
+    ptimer_transaction_commit(s->ptimer);
 }
 
 static const VMStateDescription vmstate_lm32_timer = {
-- 
2.20.1



  parent reply	other threads:[~2019-10-22 13:37 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-22 13:30 [PULL 00/41] target-arm queue Peter Maydell
2019-10-22 13:30 ` [PULL 01/41] target/arm: Fix sign-extension for SMLAL* Peter Maydell
2019-10-22 13:30 ` [PULL 02/41] aspeed: Add an AST2600 eval board Peter Maydell
2019-10-22 13:30 ` [PULL 03/41] hw/timer/exynos4210_mct: Initialize ptimer before starting it Peter Maydell
2019-10-22 13:30 ` [PULL 04/41] hw/timer/arm_mptimer.c: Undo accidental rename of arm_mptimer_init() Peter Maydell
2019-10-22 13:30 ` [PULL 05/41] hw/timer/puv3_ost.c: Switch to transaction-based ptimer API Peter Maydell
2019-10-22 13:30 ` [PULL 06/41] hw/timer/sh_timer: " Peter Maydell
2019-10-22 13:31 ` Peter Maydell [this message]
2019-10-22 13:31 ` [PULL 08/41] hw/timer/altera_timer.c: " Peter Maydell
2019-10-22 13:31 ` [PULL 09/41] hw/watchdog/etraxfs_timer.c: " Peter Maydell
2019-10-22 13:31 ` [PULL 10/41] hw/m68k/mcf5208.c: " Peter Maydell
2019-10-22 13:31 ` [PULL 11/41] target/arm: Split out rebuild_hflags_common Peter Maydell
2019-10-22 13:31 ` [PULL 12/41] target/arm: Split out rebuild_hflags_a64 Peter Maydell
2019-10-22 13:31 ` [PULL 13/41] target/arm: Split out rebuild_hflags_common_32 Peter Maydell
2019-10-22 13:31 ` [PULL 14/41] target/arm: Split arm_cpu_data_is_big_endian Peter Maydell
2019-10-22 13:31 ` [PULL 15/41] target/arm: Split out rebuild_hflags_m32 Peter Maydell
2019-10-22 13:31 ` [PULL 16/41] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 17/41] target/arm: Split out rebuild_hflags_a32 Peter Maydell
2019-10-22 13:31 ` [PULL 18/41] target/arm: Split out rebuild_hflags_aprofile Peter Maydell
2019-10-22 13:31 ` [PULL 19/41] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 20/41] target/arm: Simplify set of PSTATE_SS " Peter Maydell
2019-10-22 13:31 ` [PULL 21/41] target/arm: Hoist computation of TBFLAG_A32.VFPEN Peter Maydell
2019-10-22 13:31 ` [PULL 22/41] target/arm: Add arm_rebuild_hflags Peter Maydell
2019-10-22 13:31 ` [PULL 23/41] target/arm: Split out arm_mmu_idx_el Peter Maydell
2019-10-22 13:31 ` [PULL 24/41] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 25/41] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) Peter Maydell
2019-10-22 13:31 ` [PULL 26/41] target/arm: Rebuild hflags at EL changes Peter Maydell
2019-10-22 13:31 ` [PULL 27/41] target/arm: Rebuild hflags at MSR writes Peter Maydell
2019-10-22 13:31 ` [PULL 28/41] target/arm: Rebuild hflags at CPSR writes Peter Maydell
2019-10-22 13:31 ` [PULL 29/41] target/arm: Rebuild hflags at Xscale SCTLR writes Peter Maydell
2019-10-22 13:31 ` [PULL 30/41] target/arm: Rebuild hflags for M-profile Peter Maydell
2019-10-22 13:31 ` [PULL 31/41] target/arm: Rebuild hflags for M-profile NVIC Peter Maydell
2019-10-22 13:31 ` [PULL 32/41] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state Peter Maydell
2019-10-22 13:31 ` [PULL 33/41] hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC functions Peter Maydell
2019-10-22 13:31 ` [PULL 34/41] hw/sd/sdhci: Add dummy Samsung SDHCI controller Peter Maydell
2019-10-22 13:31 ` [PULL 35/41] hw/arm/exynos4210: Use the Samsung s3c " Peter Maydell
2019-10-22 13:31 ` [PULL 36/41] hw/arm/xilinx_zynq: Use the IEC binary prefix definitions Peter Maydell
2019-10-22 13:31 ` [PULL 37/41] hw/arm/mps2: " Peter Maydell
2019-10-22 13:31 ` [PULL 38/41] hw/arm/collie: Create the RAM in the board Peter Maydell
2019-10-22 13:31 ` [PULL 39/41] hw/arm/omap2: " Peter Maydell
2019-10-22 13:31 ` [PULL 40/41] hw/arm/omap1: " Peter Maydell
2019-10-22 13:31 ` [PULL 41/41] hw/arm/digic4: Inline digic4_board_setup_ram() function Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191022133134.14487-8-peter.maydell@linaro.org \
    --to=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).