From: Stefan Hajnoczi <stefanha@redhat.com>
To: qemu-devel@nongnu.org
Cc: Fam Zheng <fam@euphon.net>, Laurent Vivier <lvivier@redhat.com>,
Thomas Huth <thuth@redhat.com>,
qemu-block@nongnu.org, slp@redhat.com,
"Michael S. Tsirkin" <mst@redhat.com>,
Cornelia Huck <cohuck@redhat.com>,
Stefan Hajnoczi <stefanha@redhat.com>,
Christophe de Dinechin <dinechin@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>
Subject: [PATCH v4 10/16] libqos: add iteration support to qpci_find_capability()
Date: Wed, 23 Oct 2019 11:04:19 +0100 [thread overview]
Message-ID: <20191023100425.12168-11-stefanha@redhat.com> (raw)
In-Reply-To: <20191023100425.12168-1-stefanha@redhat.com>
VIRTIO 1.0 PCI devices have multiple PCI_CAP_ID_VNDR capabilities so we
need a way to iterate over them. Extend qpci_find_capability() to take
the last address.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
--
v3:
* Document qpci_find_capability()
---
tests/libqos/pci.h | 2 +-
tests/libqos/pci.c | 30 ++++++++++++++++++++++++------
2 files changed, 25 insertions(+), 7 deletions(-)
diff --git a/tests/libqos/pci.h b/tests/libqos/pci.h
index a5389a5845..590c175190 100644
--- a/tests/libqos/pci.h
+++ b/tests/libqos/pci.h
@@ -86,7 +86,7 @@ bool qpci_has_buggy_msi(QPCIDevice *dev);
bool qpci_check_buggy_msi(QPCIDevice *dev);
void qpci_device_enable(QPCIDevice *dev);
-uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id);
+uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id, uint8_t start_addr);
void qpci_msix_enable(QPCIDevice *dev);
void qpci_msix_disable(QPCIDevice *dev);
bool qpci_msix_pending(QPCIDevice *dev, uint16_t entry);
diff --git a/tests/libqos/pci.c b/tests/libqos/pci.c
index 662ee7a517..2309a724e4 100644
--- a/tests/libqos/pci.c
+++ b/tests/libqos/pci.c
@@ -115,10 +115,28 @@ void qpci_device_enable(QPCIDevice *dev)
g_assert_cmphex(cmd & PCI_COMMAND_MASTER, ==, PCI_COMMAND_MASTER);
}
-uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id)
+/**
+ * qpci_find_capability:
+ * @dev: the PCI device
+ * @id: the PCI Capability ID (PCI_CAP_ID_*)
+ * @start_addr: 0 to begin iteration or the last return value to continue
+ * iteration
+ *
+ * Iterate over the PCI Capabilities List.
+ *
+ * Returns: PCI Configuration Space offset of the capabililty structure or
+ * 0 if no further matching capability is found
+ */
+uint8_t qpci_find_capability(QPCIDevice *dev, uint8_t id, uint8_t start_addr)
{
uint8_t cap;
- uint8_t addr = qpci_config_readb(dev, PCI_CAPABILITY_LIST);
+ uint8_t addr;
+
+ if (start_addr) {
+ addr = qpci_config_readb(dev, start_addr + PCI_CAP_LIST_NEXT);
+ } else {
+ addr = qpci_config_readb(dev, PCI_CAPABILITY_LIST);
+ }
do {
cap = qpci_config_readb(dev, addr);
@@ -138,7 +156,7 @@ void qpci_msix_enable(QPCIDevice *dev)
uint8_t bir_table;
uint8_t bir_pba;
- addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX);
+ addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0);
g_assert_cmphex(addr, !=, 0);
val = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS);
@@ -167,7 +185,7 @@ void qpci_msix_disable(QPCIDevice *dev)
uint16_t val;
g_assert(dev->msix_enabled);
- addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX);
+ addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0);
g_assert_cmphex(addr, !=, 0);
val = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS);
qpci_config_writew(dev, addr + PCI_MSIX_FLAGS,
@@ -203,7 +221,7 @@ bool qpci_msix_masked(QPCIDevice *dev, uint16_t entry)
uint64_t vector_off = dev->msix_table_off + entry * PCI_MSIX_ENTRY_SIZE;
g_assert(dev->msix_enabled);
- addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX);
+ addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0);
g_assert_cmphex(addr, !=, 0);
val = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS);
@@ -221,7 +239,7 @@ uint16_t qpci_msix_table_size(QPCIDevice *dev)
uint8_t addr;
uint16_t control;
- addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX);
+ addr = qpci_find_capability(dev, PCI_CAP_ID_MSIX, 0);
g_assert_cmphex(addr, !=, 0);
control = qpci_config_readw(dev, addr + PCI_MSIX_FLAGS);
--
2.21.0
next prev parent reply other threads:[~2019-10-23 10:30 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-23 10:04 [PATCH v4 00/16] libqos: add VIRTIO PCI 1.0 support Stefan Hajnoczi
2019-10-23 10:04 ` [PATCH v4 01/16] tests/virtio-blk-test: read config space after feature negotiation Stefan Hajnoczi
2019-10-23 10:04 ` [PATCH v4 02/16] libqos: read QVIRTIO_MMIO_VERSION register Stefan Hajnoczi
2019-10-23 10:04 ` [PATCH v4 03/16] libqos: extend feature bits to 64-bit Stefan Hajnoczi
2019-10-23 10:04 ` [PATCH v4 04/16] virtio-scsi-test: add missing feature negotiation Stefan Hajnoczi
2019-10-23 10:19 ` Thomas Huth
2019-10-23 10:04 ` [PATCH v4 05/16] tests/virtio-blk-test: set up virtqueue after " Stefan Hajnoczi
2019-10-23 10:04 ` [PATCH v4 06/16] libqos: add missing virtio-9p " Stefan Hajnoczi
2019-10-23 10:20 ` Thomas Huth
2019-10-23 10:04 ` [PATCH v4 07/16] libqos: enforce Device Initialization order Stefan Hajnoczi
2019-10-23 11:23 ` Thomas Huth
2019-10-23 10:04 ` [PATCH v4 08/16] libqos: implement VIRTIO 1.0 FEATURES_OK step Stefan Hajnoczi
2019-10-23 11:04 ` Thomas Huth
2019-10-23 10:04 ` [PATCH v4 09/16] libqos: access VIRTIO 1.0 vring in little-endian Stefan Hajnoczi
2019-10-23 10:04 ` Stefan Hajnoczi [this message]
2019-10-23 10:04 ` [PATCH v4 11/16] libqos: pass full QVirtQueue to set_queue_address() Stefan Hajnoczi
2019-10-23 10:04 ` [PATCH v4 12/16] libqos: add MSI-X callbacks to QVirtioPCIDevice Stefan Hajnoczi
2019-10-23 10:04 ` [PATCH v4 13/16] libqos: expose common virtqueue setup/cleanup functions Stefan Hajnoczi
2019-10-23 10:04 ` [PATCH v4 14/16] libqos: make the virtio-pci BAR index configurable Stefan Hajnoczi
2019-10-23 10:04 ` [PATCH v4 15/16] libqos: extract Legacy virtio-pci.c code Stefan Hajnoczi
2019-10-23 10:04 ` [PATCH v4 16/16] libqos: add VIRTIO PCI 1.0 support Stefan Hajnoczi
2019-10-23 11:22 ` Thomas Huth
2019-10-25 11:32 ` [PATCH v4 00/16] " Michael S. Tsirkin
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