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[64.20.4.198]) by smtp.gmail.com with ESMTPSA id l189sm11030168qke.69.2019.10.23.08.00.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Oct 2019 08:00:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v9 00/24] target/arm: Reduce overhead of cpu_get_tb_cpu_state Date: Wed, 23 Oct 2019 11:00:33 -0400 Message-Id: <20191023150057.25731-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::843 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Changes since v8: * Rebuild hflags in linux-user/*/cpu_loop.c, after changing to big-endian. This allows the armeb busybox ls to pass. I don't have a test image for aarch64_eb, but the code looks the same. Changes since v7: * Rebuild hflags for all successful nvic writes (Peter). * Rebuild hflags for Xscale sctlr writes (Peter). Changes since v6: * Regen hflags in two more places for m-profile (patch 19). ... r~ Richard Henderson (24): target/arm: Split out rebuild_hflags_common target/arm: Split out rebuild_hflags_a64 target/arm: Split out rebuild_hflags_common_32 target/arm: Split arm_cpu_data_is_big_endian target/arm: Split out rebuild_hflags_m32 target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state target/arm: Split out rebuild_hflags_a32 target/arm: Split out rebuild_hflags_aprofile target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state target/arm: Hoist computation of TBFLAG_A32.VFPEN target/arm: Add arm_rebuild_hflags target/arm: Split out arm_mmu_idx_el target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state target/arm: Add HELPER(rebuild_hflags_{a32,a64,m32}) target/arm: Rebuild hflags at EL changes target/arm: Rebuild hflags at MSR writes target/arm: Rebuild hflags at CPSR writes target/arm: Rebuild hflags at Xscale SCTLR writes target/arm: Rebuild hflags for M-profile target/arm: Rebuild hflags for M-profile NVIC linux-user/aarch64: Rebuild hflags for TARGET_WORDS_BIGENDIAN linux-user/arm: Rebuild hflags for TARGET_WORDS_BIGENDIAN target/arm: Rely on hflags correct in cpu_get_tb_cpu_state target/arm/cpu.h | 84 +++++--- target/arm/helper.h | 4 + target/arm/internals.h | 9 + hw/intc/armv7m_nvic.c | 22 +- linux-user/aarch64/cpu_loop.c | 1 + linux-user/arm/cpu_loop.c | 1 + linux-user/syscall.c | 1 + target/arm/cpu.c | 1 + target/arm/helper-a64.c | 3 + target/arm/helper.c | 393 ++++++++++++++++++++++------------ target/arm/m_helper.c | 6 + target/arm/machine.c | 1 + target/arm/op_helper.c | 4 + target/arm/translate-a64.c | 13 +- target/arm/translate.c | 33 ++- 15 files changed, 392 insertions(+), 184 deletions(-) -- 2.17.1