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Fri, 8 Nov 2019 12:12:11 +0000 (UTC) Date: Fri, 8 Nov 2019 13:12:10 +0100 From: Igor Mammedov To: Tao Xu Subject: Re: [PATCH v15 07/12] numa: Calculate hmat latency and bandwidth entry list Message-ID: <20191108131210.64096a99@redhat.com> In-Reply-To: <20191107074511.14304-8-tao3.xu@intel.com> References: <20191107074511.14304-1-tao3.xu@intel.com> <20191107074511.14304-8-tao3.xu@intel.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-MC-Unique: lifbCqORM7qT0X4zdtwkHQ-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, thuth@redhat.com, ehabkost@redhat.com, mst@redhat.com, qemu-devel@nongnu.org, jingqi.liu@intel.com, fan.du@intel.com, mdroth@linux.vnet.ibm.com, armbru@redhat.com, jonathan.cameron@huawei.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, 7 Nov 2019 15:45:06 +0800 Tao Xu wrote: > Compress HMAT latency and bandwidth raw data into uint16_t data, > which can be stored in HMAT table. >=20 > Suggested-by: Igor Mammedov > Signed-off-by: Tao Xu > --- >=20 > No changes in v15. >=20 > Changes in v14: > - Convert latency from ns to ps, because ACPI 6.3 HMAT table use > ps as minimum unit > --- > hw/core/numa.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 58 insertions(+), 1 deletion(-) >=20 > diff --git a/hw/core/numa.c b/hw/core/numa.c > index f391760c20..523dd80822 100644 > --- a/hw/core/numa.c > +++ b/hw/core/numa.c > @@ -483,6 +483,47 @@ static void complete_init_numa_distance(MachineState= *ms) > } > } > =20 > +static void calculate_hmat_entry_list(HMAT_LB_Info *hmat_lb, int num_nod= es) I'd call it verify_hmat_entry_list() and I'd only do checks here without post-processing data into something else, provided there is checks that requires all hmat-lb option parsed first. > +{ > + int i, index; > + uint16_t *entry_list; > + uint64_t base; > + GArray *lb_data_list; > + HMAT_LB_Data *lb_data; > + > + if (hmat_lb->data_type <=3D HMAT_LB_DATA_WRITE_LATENCY) { > + base =3D hmat_lb->base_latency; > + lb_data_list =3D hmat_lb->latency; > + } else { > + base =3D hmat_lb->base_bandwidth; > + lb_data_list =3D hmat_lb->bandwidth; > + } > + > + entry_list =3D g_malloc0(lb_data_list->len * sizeof(uint16_t)); > + for (i =3D 0; i < lb_data_list->len; i++) { > + lb_data =3D &g_array_index(lb_data_list, HMAT_LB_Data, i); > + index =3D lb_data->initiator * num_nodes + lb_data->target; > + if (entry_list[index]) { > + error_report("Duplicate configuration of the latency for " > + "initiator=3D%d and target=3D%d.", lb_data->initiator, > + lb_data->target); Is it possible to detect duplicate during hamt-lb option parsing? > + exit(1); > + } > + entry_list[index] =3D (uint16_t)(lb_data->rawdata / base); > + } > + if (hmat_lb->data_type <=3D HMAT_LB_DATA_WRITE_LATENCY) { > + /* Convert latency base from nanoseconds to picosecond */ > + hmat_lb->base_latency =3D base * 1000; > + hmat_lb->entry_latency =3D entry_list; > + } else { > + /* Convert bandwidth base from Byte to Megabyte */ > + hmat_lb->base_bandwidth =3D base / MiB; > + hmat_lb->entry_bandwidth =3D entry_list; > + } I suggest to move this hunk to 10/12 and drop entry_foo fields as build_hmat_lb() can walk over lb_data_list and normalize values put in ACPI table on its own. In generic numa code is to check that user provided values won't (under|over-flow) ACPI table values once dived/multiplied, but leave actual data packing into table to ACPI code. > +} > + > void numa_legacy_auto_assign_ram(MachineClass *mc, NodeInfo *nodes, > int nb_nodes, ram_addr_t size) > { > @@ -521,9 +562,10 @@ void numa_default_auto_assign_ram(MachineClass *mc, = NodeInfo *nodes, > =20 > void numa_complete_configuration(MachineState *ms) > { > - int i; > + int i, hierarchy, type; > MachineClass *mc =3D MACHINE_GET_CLASS(ms); > NodeInfo *numa_info =3D ms->numa_state->nodes; > + HMAT_LB_Info *numa_hmat_lb; > =20 > /* > * If memory hotplug is enabled (slots > 0) but without '-numa' > @@ -620,6 +662,21 @@ void numa_complete_configuration(MachineState *ms) > /* Validation succeeded, now fill in any missing distances. = */ > complete_init_numa_distance(ms); > } > + > + if (ms->numa_state->hmat_enabled) { > + for (hierarchy =3D HMAT_LB_MEM_MEMORY; > + hierarchy <=3D HMAT_LB_MEM_CACHE_3RD_LEVEL; hierarchy++= ) { > + for (type =3D HMAT_LB_DATA_ACCESS_LATENCY; > + type <=3D HMAT_LB_DATA_WRITE_BANDWIDTH; type++) { > + numa_hmat_lb =3D ms->numa_state->hmat_lb[hierarchy][= type]; > + > + if (numa_hmat_lb) { > + calculate_hmat_entry_list(numa_hmat_lb, > + ms->numa_state->num_no= des); > + } > + } > + } > + } > } > } > =20