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[79.176.6.42]) by smtp.gmail.com with ESMTPSA id w30sm8865823qtc.47.2019.11.11.02.16.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Nov 2019 02:16:46 -0800 (PST) Date: Mon, 11 Nov 2019 05:16:41 -0500 From: "Michael S. Tsirkin" To: Klaus Birkelund Subject: Re: [PATCH 1/1] pci: pass along the return value of dma_memory_rw Message-ID: <20191111051055-mutt-send-email-mst@kernel.org> References: <20191011070141.188713-1-its@irrelevant.dk> <20191011070141.188713-2-its@irrelevant.dk> <455e6dee-8dd8-fae7-5a2f-e175b9d1cb8d@redhat.com> <20191111093007.GA109346@apples.localdomain> MIME-Version: 1.0 In-Reply-To: <20191111093007.GA109346@apples.localdomain> X-MC-Unique: k1v7DQ-HOzy2fSlLtGvsdA-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: QEMU Trivial , Paolo Bonzini , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , qemu-devel@nongnu.org, Peter Maydell Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, Nov 11, 2019 at 10:30:07AM +0100, Klaus Birkelund wrote: > On Thu, Oct 24, 2019 at 01:13:36AM +0200, Philippe Mathieu-Daud=E9 wrote: > > On 10/11/19 9:01 AM, Klaus Jensen wrote: > > > Some might actually care about the return value of dma_memory_rw. So > > > let us pass it along instead of ignoring it. > > >=20 > > > Signed-off-by: Klaus Jensen > > > --- > > > include/hw/pci/pci.h | 3 +-- > > > 1 file changed, 1 insertion(+), 2 deletions(-) > > >=20 > > > diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h > > > index f3f0ffd5fb78..4e95bb847857 100644 > > > --- a/include/hw/pci/pci.h > > > +++ b/include/hw/pci/pci.h > > > @@ -779,8 +779,7 @@ static inline AddressSpace *pci_get_address_space= (PCIDevice *dev) > > > static inline int pci_dma_rw(PCIDevice *dev, dma_addr_t addr, > > > void *buf, dma_addr_t len, DMADirectio= n dir) > > > { > > > - dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir); > > > - return 0; > > > + return dma_memory_rw(pci_get_address_space(dev), addr, buf, len,= dir); > > > } > > > static inline int pci_dma_read(PCIDevice *dev, dma_addr_t addr, > > >=20 > >=20 > > Reviewed-by: Philippe Mathieu-Daud=E9 >=20 > Gentle ping on this. >=20 > This fix is required for the nvme device to start passing some of the > nasty tests from blktests that flips bus mastering while doing I/O. >=20 >=20 > Cheers, > Klaus So I looked and it does not seem like anyone at all checks the return value. While this makes the patch safe, how come it helps anyone at all? Maybe this is just infrastructure to allow checks in the future, in this case do we need this for the freeze? Or can it wait until after the release? --=20 MST