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From: Peter Xu <peterx@redhat.com>
To: qi1.zhang@intel.com
Cc: ehabkost@redhat.com, mst@redhat.com, qemu-devel@nongnu.org,
	pbonzini@redhat.com, yadong.qi@intel.com, rth@twiddle.net
Subject: Re: [PATCH v2 1/2] intel_iommu: split the resevred fields arrays into two ones
Date: Tue, 19 Nov 2019 11:06:07 -0500	[thread overview]
Message-ID: <20191119160607.GK9053@xz-x1> (raw)
In-Reply-To: <d3aa65ad0510cdafd5d7dcbc54bc250feb6aa59b.1570503331.git.qi1.zhang@intel.com>

On Tue, Nov 19, 2019 at 08:28:13PM +0800, qi1.zhang@intel.com wrote:
> @@ -3547,15 +3548,17 @@ static void vtd_init(IntelIOMMUState *s)
>      /*
>       * Rsvd field masks for spte
>       */
> -    vtd_paging_entry_rsvd_field[0] = ~0ULL;
> -    vtd_paging_entry_rsvd_field[1] = VTD_SPTE_PAGE_L1_RSVD_MASK(s->aw_bits);
> -    vtd_paging_entry_rsvd_field[2] = VTD_SPTE_PAGE_L2_RSVD_MASK(s->aw_bits);
> -    vtd_paging_entry_rsvd_field[3] = VTD_SPTE_PAGE_L3_RSVD_MASK(s->aw_bits);
> -    vtd_paging_entry_rsvd_field[4] = VTD_SPTE_PAGE_L4_RSVD_MASK(s->aw_bits);
> -    vtd_paging_entry_rsvd_field[5] = VTD_SPTE_LPAGE_L1_RSVD_MASK(s->aw_bits);
> -    vtd_paging_entry_rsvd_field[6] = VTD_SPTE_LPAGE_L2_RSVD_MASK(s->aw_bits);
> -    vtd_paging_entry_rsvd_field[7] = VTD_SPTE_LPAGE_L3_RSVD_MASK(s->aw_bits);
> -    vtd_paging_entry_rsvd_field[8] = VTD_SPTE_LPAGE_L4_RSVD_MASK(s->aw_bits);
> +    vtd_spte_rsvd[0] = ~0ULL;
> +    vtd_spte_rsvd[1] = VTD_SPTE_PAGE_L1_RSVD_MASK(s->aw_bits);
> +    vtd_spte_rsvd[2] = VTD_SPTE_PAGE_L2_RSVD_MASK(s->aw_bits);
> +    vtd_spte_rsvd[3] = VTD_SPTE_PAGE_L3_RSVD_MASK(s->aw_bits);
> +    vtd_spte_rsvd[4] = VTD_SPTE_PAGE_L4_RSVD_MASK(s->aw_bits);
> +
> +    vtd_spte_rsvd_large[0] = ~0ULL;
> +    vtd_spte_rsvd_large[1] = VTD_SPTE_LPAGE_L1_RSVD_MASK(s->aw_bits);
> +    vtd_spte_rsvd_large[2] = VTD_SPTE_LPAGE_L2_RSVD_MASK(s->aw_bits);
> +    vtd_spte_rsvd_large[3] = VTD_SPTE_LPAGE_L3_RSVD_MASK(s->aw_bits);
> +    vtd_spte_rsvd_large[4] = VTD_SPTE_LPAGE_L4_RSVD_MASK(s->aw_bits);

This looks good to me in general, but... Since we're at it, do you
think we can directly drop VTD_SPTE_LPAGE_L1_RSVD_MASK and
VTD_SPTE_LPAGE_L4_RSVD_MASK?  Are they really useful?

I think I'm using the latest vt-d spec now (June, 2019) and it only
supports 2M/1G huge pages, corresponds to VTD_SPTE_LPAGE_L2_RSVD_MASK
and VTD_SPTE_LPAGE_L3_RSVD_MASK.

-- 
Peter Xu



  parent reply	other threads:[~2019-11-19 16:08 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-19 12:27 [PATCH v2 0/2] TM field check failed qi1.zhang
2019-11-19 11:05 ` Michael S. Tsirkin
2019-11-19 16:21   ` Peter Xu
2019-11-19 16:39     ` Michael S. Tsirkin
2019-11-19 17:01       ` Peter Xu
2019-11-19 12:27 ` [PATCH 1/2] intel_iommu: split the resevred fields arrays into two ones qi1.zhang
2019-11-19 12:28   ` [PATCH v2 " qi1.zhang
2019-11-19 16:06   ` Peter Xu [this message]
2019-11-22  8:10     ` Qi, Yadong
2019-11-19 12:28 ` [PATCH v2 0/2] TM field check failed qi1.zhang
2019-11-19 12:28 ` [PATCH v2 2/2] intel_iommu: TM field should not be in reserved bits qi1.zhang
2019-11-19 11:06   ` Michael S. Tsirkin
2019-11-19 12:27   ` [PATCH " qi1.zhang

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