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Sun, 24 Nov 2019 19:09:00 -0800 (PST) Date: Sun, 24 Nov 2019 22:08:59 -0500 From: Peter Xu To: yadong.qi@intel.com Subject: Re: [PATCH v3 0/2] Refine Second-Level Paging Entries reserved fields checking Message-ID: <20191125030859.GE30539@xz-x1> References: <20191125003321.5669-1-yadong.qi@intel.com> MIME-Version: 1.0 In-Reply-To: <20191125003321.5669-1-yadong.qi@intel.com> User-Agent: Mutt/1.11.4 (2019-03-13) X-MC-Unique: xryF0RMBOfCgDlHf-d--Ng-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qi1.zhang@intel.com, ehabkost@redhat.com, mst@redhat.com, qemu-devel@nongnu.org, pbonzini@redhat.com, rth@twiddle.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, Nov 25, 2019 at 08:33:19AM +0800, yadong.qi@intel.com wrote: > From: "Qi, Yadong" >=20 > The following patches are to refine/fix issues of reserved fields checkin= g logic > of Second-Level Paging Entries of VT-d: > - split the resevred fields arrays into two ones, > - large page only effect for L2(2M) and L3(1G), so remove > checking of L1 and L4 for large page, > - when dt is supported, TM filed should not be Reserved(0). >=20 > Changes in v3: > - large page only effect for L2(2M) and L3(1G), so remove > checking of L1 and L4 for large page Reviewed-by: Peter Xu Thanks, --=20 Peter Xu