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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Dr . David Alan Gilbert" <dgilbert@redhat.com>
Subject: [PULL 1/5] target/i386: add two missing VMX features for Skylake and CascadeLake Server
Date: Tue, 26 Nov 2019 09:59:32 +0100	[thread overview]
Message-ID: <20191126085936.1689-2-pbonzini@redhat.com> (raw)
In-Reply-To: <20191126085936.1689-1-pbonzini@redhat.com>

They are present in client (Core) Skylake but pasted wrong into the server
SKUs.

Reported-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target/i386/cpu.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 730fb28b67..69f518a21a 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3006,7 +3006,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
              VMX_SECONDARY_EXEC_APIC_REGISTER_VIRT |
              VMX_SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
              VMX_SECONDARY_EXEC_RDRAND_EXITING | VMX_SECONDARY_EXEC_ENABLE_INVPCID |
-             VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS,
+             VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS |
+             VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML,
         .xlevel = 0x80000008,
         .model_id = "Intel Xeon Processor (Skylake)",
         .versions = (X86CPUVersionDefinition[]) {
@@ -3131,7 +3132,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
              VMX_SECONDARY_EXEC_APIC_REGISTER_VIRT |
              VMX_SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
              VMX_SECONDARY_EXEC_RDRAND_EXITING | VMX_SECONDARY_EXEC_ENABLE_INVPCID |
-             VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS,
+             VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS |
+             VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML,
         .xlevel = 0x80000008,
         .model_id = "Intel Xeon Processor (Cascadelake)",
         .versions = (X86CPUVersionDefinition[]) {
-- 
2.21.0




  reply	other threads:[~2019-11-26  9:04 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-26  8:59 [PULL 0/5] i386 patches for QEMU 4.2-rc Paolo Bonzini
2019-11-26  8:59 ` Paolo Bonzini [this message]
2019-11-26  8:59 ` [PULL 2/5] hvf: non-RAM, non-ROMD memory ranges are now correctly mapped in Paolo Bonzini
2019-11-26  8:59 ` [PULL 3/5] hvf: remove TSC synchronization code because it isn't fully complete Paolo Bonzini
2019-11-26  8:59 ` [PULL 4/5] hvf: correctly handle REX prefix in relation to legacy prefixes Paolo Bonzini
2019-11-26  8:59 ` [PULL 5/5] hvf: more accurately match SDM when setting CR0 and PDPTE registers Paolo Bonzini
2019-11-26  9:19 ` [PULL 0/5] i386 patches for QEMU 4.2-rc no-reply
2019-11-26 22:04   ` Philippe Mathieu-Daudé
2019-11-26 22:12     ` Paolo Bonzini
2019-11-27  9:14     ` Dr. David Alan Gilbert
2019-11-27  9:17       ` Jens Freimann
2019-11-28 21:12       ` Jens Freimann
2019-11-26 20:43 ` Peter Maydell

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