From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [PATCH 5/8] bitops.h: Silence kernel-doc complaints
Date: Fri, 29 Nov 2019 15:02:14 +0100 [thread overview]
Message-ID: <20191129140217.17797-6-pbonzini@redhat.com> (raw)
In-Reply-To: <20191129140217.17797-1-pbonzini@redhat.com>
From: Peter Maydell <peter.maydell@linaro.org>
Fix the problems with kernel-doc/sphinx syntax in the
doc comments for the shuffle and unshuffle functions:
* mismatch between comment and prototype for argument name
* the inline bit patterns need to be marked up so they
are processed properly and rendered as monospace
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20190521122519.12573-6-peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
include/qemu/bitops.h | 52 ++++++++++++++++++++++++++-----------------
1 file changed, 32 insertions(+), 20 deletions(-)
diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index ee76552c06..02c1ce6a5d 100644
--- a/include/qemu/bitops.h
+++ b/include/qemu/bitops.h
@@ -424,13 +424,16 @@ static inline uint64_t deposit64(uint64_t value, int start, int length,
/**
* half_shuffle32:
- * @value: 32-bit value (of which only the bottom 16 bits are of interest)
+ * @x: 32-bit value (of which only the bottom 16 bits are of interest)
+ *
+ * Given an input value::
+ *
+ * xxxx xxxx xxxx xxxx ABCD EFGH IJKL MNOP
*
- * Given an input value:
- * xxxx xxxx xxxx xxxx ABCD EFGH IJKL MNOP
* return the value where the bottom 16 bits are spread out into
- * the odd bits in the word, and the even bits are zeroed:
- * 0A0B 0C0D 0E0F 0G0H 0I0J 0K0L 0M0N 0O0P
+ * the odd bits in the word, and the even bits are zeroed::
+ *
+ * 0A0B 0C0D 0E0F 0G0H 0I0J 0K0L 0M0N 0O0P
*
* Any bits set in the top half of the input are ignored.
*
@@ -450,13 +453,16 @@ static inline uint32_t half_shuffle32(uint32_t x)
/**
* half_shuffle64:
- * @value: 64-bit value (of which only the bottom 32 bits are of interest)
+ * @x: 64-bit value (of which only the bottom 32 bits are of interest)
+ *
+ * Given an input value::
+ *
+ * xxxx xxxx xxxx .... xxxx xxxx ABCD EFGH IJKL MNOP QRST UVWX YZab cdef
*
- * Given an input value:
- * xxxx xxxx xxxx .... xxxx xxxx ABCD EFGH IJKL MNOP QRST UVWX YZab cdef
* return the value where the bottom 32 bits are spread out into
- * the odd bits in the word, and the even bits are zeroed:
- * 0A0B 0C0D 0E0F 0G0H 0I0J 0K0L 0M0N .... 0U0V 0W0X 0Y0Z 0a0b 0c0d 0e0f
+ * the odd bits in the word, and the even bits are zeroed::
+ *
+ * 0A0B 0C0D 0E0F 0G0H 0I0J 0K0L 0M0N .... 0U0V 0W0X 0Y0Z 0a0b 0c0d 0e0f
*
* Any bits set in the top half of the input are ignored.
*
@@ -477,13 +483,16 @@ static inline uint64_t half_shuffle64(uint64_t x)
/**
* half_unshuffle32:
- * @value: 32-bit value (of which only the odd bits are of interest)
+ * @x: 32-bit value (of which only the odd bits are of interest)
+ *
+ * Given an input value::
+ *
+ * xAxB xCxD xExF xGxH xIxJ xKxL xMxN xOxP
*
- * Given an input value:
- * xAxB xCxD xExF xGxH xIxJ xKxL xMxN xOxP
* return the value where all the odd bits are compressed down
- * into the low half of the word, and the high half is zeroed:
- * 0000 0000 0000 0000 ABCD EFGH IJKL MNOP
+ * into the low half of the word, and the high half is zeroed::
+ *
+ * 0000 0000 0000 0000 ABCD EFGH IJKL MNOP
*
* Any even bits set in the input are ignored.
*
@@ -504,13 +513,16 @@ static inline uint32_t half_unshuffle32(uint32_t x)
/**
* half_unshuffle64:
- * @value: 64-bit value (of which only the odd bits are of interest)
+ * @x: 64-bit value (of which only the odd bits are of interest)
+ *
+ * Given an input value::
+ *
+ * xAxB xCxD xExF xGxH xIxJ xKxL xMxN .... xUxV xWxX xYxZ xaxb xcxd xexf
*
- * Given an input value:
- * xAxB xCxD xExF xGxH xIxJ xKxL xMxN .... xUxV xWxX xYxZ xaxb xcxd xexf
* return the value where all the odd bits are compressed down
- * into the low half of the word, and the high half is zeroed:
- * 0000 0000 0000 .... 0000 0000 ABCD EFGH IJKL MNOP QRST UVWX YZab cdef
+ * into the low half of the word, and the high half is zeroed::
+ *
+ * 0000 0000 0000 .... 0000 0000 ABCD EFGH IJKL MNOP QRST UVWX YZab cdef
*
* Any even bits set in the input are ignored.
*
--
2.21.0
next prev parent reply other threads:[~2019-11-29 14:33 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-29 14:02 [PATCH for-5.0 0/8] docs: integrate doc comments with Sphinx build Paolo Bonzini
2019-11-29 14:02 ` [PATCH 1/8] docs: import Linux kernel-doc script and extension Paolo Bonzini
2019-12-02 17:50 ` Peter Maydell
2019-11-29 14:02 ` [PATCH 2/8] docs: tweak kernel-doc for QEMU coding standards Paolo Bonzini
2019-12-02 18:01 ` Peter Maydell
2019-12-02 18:17 ` Paolo Bonzini
2020-10-02 18:34 ` Eduardo Habkost
2020-10-02 18:43 ` Peter Maydell
2020-10-02 18:46 ` Eduardo Habkost
2020-10-02 18:50 ` Paolo Bonzini
2020-10-02 19:18 ` Eduardo Habkost
2019-11-29 14:02 ` [PATCH 3/8] docs/conf.py: Enable use of kerneldoc sphinx extension Paolo Bonzini
2019-11-29 14:02 ` [PATCH 4/8] Makefile: disable Sphinx nitpicking Paolo Bonzini
2019-11-29 14:02 ` Paolo Bonzini [this message]
2019-11-29 14:02 ` [PATCH 6/8] docs: Create bitops.rst as example of kernel-docs Paolo Bonzini
2019-11-29 14:02 ` [PATCH 7/8] memory.h: Silence kernel-doc complaints Paolo Bonzini
2019-12-02 18:04 ` Peter Maydell
2019-11-29 14:02 ` [PATCH 8/8] docs: add memory API reference Paolo Bonzini
2019-12-02 18:05 ` Peter Maydell
2019-11-30 1:54 ` [PATCH for-5.0 0/8] docs: integrate doc comments with Sphinx build no-reply
2019-12-02 18:06 ` Peter Maydell
2019-12-02 18:13 ` Paolo Bonzini
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