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X-Received-From: 2a00:1450:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: damien.hedde@greensocs.com, Peter Maydell , luis.machado@linaro.org, richard.henderson@linaro.org, "open list:ARM TCG CPUs" , alan.hayward@arm.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The Linux kernel chooses the default of 64 bytes for SVE registers on the basis that it is the largest size that won't grow the signal frame. When debugging larger sizes are also unwieldy in gdb as each zreg will take over a page of terminal to display. The user can of course always specify a larger size with the sve-max-vq property on the command line: -cpu max,sve-max-vq=16 This should not make any difference to SVE enabled software as the SVE is of course vector length agnostic. Signed-off-by: Alex Bennée --- target/arm/cpu64.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index a39d6fcea34..bc5d6c4b974 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -703,6 +703,9 @@ static void aarch64_max_initfn(Object *obj) */ cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */ cpu->dcz_blocksize = 7; /* 512 bytes */ + + /* Default sve-max-vq to a reasonable numer */ + cpu->sve_max_vq = 4; #endif } -- 2.20.1