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[83.42.66.34]) by smtp.gmail.com with ESMTPSA id b67sm7435494wmc.38.2019.12.19.10.51.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2019 10:51:40 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Niek Linnenbank Subject: [RFC PATCH 09/13] hw/timer/allwinner: Rename AwA10TimerContext as AllwinnerTmrState Date: Thu, 19 Dec 2019 19:51:23 +0100 Message-Id: <20191219185127.24388-10-f4bug@amsat.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191219185127.24388-1-f4bug@amsat.org> References: <20191219185127.24388-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Beniamino Galvani , Peter Maydell , qemu-arm@nongnu.org, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This structure will be common to various Allwinner timer controllers, rename it. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/timer/allwinner-a10-pit.h | 6 +++--- hw/timer/allwinner-a10-pit.c | 14 +++++++------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/include/hw/timer/allwinner-a10-pit.h b/include/hw/timer/allwinner-a10-pit.h index 8c64c33f01..3a47633cc4 100644 --- a/include/hw/timer/allwinner-a10-pit.h +++ b/include/hw/timer/allwinner-a10-pit.h @@ -10,7 +10,7 @@ typedef struct AwA10PITState AwA10PITState; -typedef struct AwA10TimerContext { +typedef struct AllwinnerTmrState { AwA10PITState *container; int index; ptimer_state *ptimer; @@ -18,14 +18,14 @@ typedef struct AwA10TimerContext { uint32_t control; uint32_t interval; uint32_t count; -} AwA10TimerContext; +} AllwinnerTmrState; struct AwA10PITState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ size_t timer_count; - AwA10TimerContext timer[AW_PIT_TIMER_MAX]; + AllwinnerTmrState timer[AW_PIT_TIMER_MAX]; MemoryRegion iomem; uint32_t clk_freq[4]; diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c index 3f47588703..ecfc198937 100644 --- a/hw/timer/allwinner-a10-pit.c +++ b/hw/timer/allwinner-a10-pit.c @@ -234,10 +234,10 @@ static const VMStateDescription vmstate_aw_timer = { .version_id = 0, .minimum_version_id = 0, .fields = (VMStateField[]) { - VMSTATE_UINT32(control, AwA10TimerContext), - VMSTATE_UINT32(interval, AwA10TimerContext), - VMSTATE_UINT32(count, AwA10TimerContext), - VMSTATE_PTIMER(ptimer, AwA10TimerContext), + VMSTATE_UINT32(control, AllwinnerTmrState), + VMSTATE_UINT32(interval, AllwinnerTmrState), + VMSTATE_UINT32(count, AllwinnerTmrState), + VMSTATE_PTIMER(ptimer, AllwinnerTmrState), VMSTATE_END_OF_LIST() } }; @@ -252,7 +252,7 @@ static const VMStateDescription vmstate_a10_pit = { VMSTATE_STRUCT_ARRAY(timer, AwA10PITState, AW_PIT_TIMER_MAX, 0, vmstate_aw_timer, - AwA10TimerContext), + AllwinnerTmrState), VMSTATE_UINT32(watch_dog_mode, AwA10PITState), VMSTATE_UINT32(watch_dog_control, AwA10PITState), VMSTATE_UINT32(count_lo, AwA10PITState), @@ -289,7 +289,7 @@ static void a10_pit_reset(DeviceState *dev) static void a10_pit_timer_cb(void *opaque) { - AwA10TimerContext *tc = opaque; + AllwinnerTmrState *tc = opaque; AwA10PITState *s = tc->container; uint8_t i = tc->index; @@ -319,7 +319,7 @@ static void a10_pit_init(Object *obj) sysbus_init_mmio(sbd, &s->iomem); for (i = 0; i < s->timer_count; i++) { - AwA10TimerContext *tc = &s->timer[i]; + AllwinnerTmrState *tc = &s->timer[i]; tc->container = s; tc->index = i; -- 2.21.0