From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 10/12] hw/arm/smmuv3: Report F_STE_FETCH fault address in correct word position
Date: Fri, 20 Dec 2019 14:26:42 +0000 [thread overview]
Message-ID: <20191220142644.31076-11-peter.maydell@linaro.org> (raw)
In-Reply-To: <20191220142644.31076-1-peter.maydell@linaro.org>
From: Simon Veith <sveith@amazon.de>
The smmuv3_record_event() function that generates the F_STE_FETCH error
uses the EVT_SET_ADDR macro to record the fetch address, placing it in
32-bit words 4 and 5.
The correct position for this address is in words 6 and 7, per the
SMMUv3 Architecture Specification.
Update the function to use the EVT_SET_ADDR2 macro instead, which is the
macro intended for writing to these words.
ref. ARM IHI 0070C, section 7.3.4.
Signed-off-by: Simon Veith <sveith@amazon.de>
Acked-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Message-id: 1576509312-13083-7-git-send-email-sveith@amazon.de
Cc: Eric Auger <eric.auger@redhat.com>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Acked-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/smmuv3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 31ac3ca32eb..8b5f157dc70 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -172,7 +172,7 @@ void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *info)
case SMMU_EVT_F_STE_FETCH:
EVT_SET_SSID(&evt, info->u.f_ste_fetch.ssid);
EVT_SET_SSV(&evt, info->u.f_ste_fetch.ssv);
- EVT_SET_ADDR(&evt, info->u.f_ste_fetch.addr);
+ EVT_SET_ADDR2(&evt, info->u.f_ste_fetch.addr);
break;
case SMMU_EVT_C_BAD_STE:
EVT_SET_SSID(&evt, info->u.c_bad_ste.ssid);
--
2.20.1
next prev parent reply other threads:[~2019-12-20 14:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-20 14:26 [PULL 00/12] target-arm queue Peter Maydell
2019-12-20 14:26 ` [PULL 01/12] target/arm: Remove redundant scaling of nexttick Peter Maydell
2019-12-20 14:26 ` [PULL 02/12] target/arm: Abstract the generic timer frequency Peter Maydell
2019-12-20 14:26 ` [PULL 03/12] target/arm: Prepare generic timer for per-platform CNTFRQ Peter Maydell
2019-12-20 14:26 ` [PULL 04/12] ast2600: Configure CNTFRQ at 1125MHz Peter Maydell
2019-12-20 14:26 ` [PULL 05/12] hw/arm/smmuv3: Apply address mask to linear strtab base address Peter Maydell
2019-12-20 14:26 ` [PULL 06/12] hw/arm/smmuv3: Correct SMMU_BASE_ADDR_MASK value Peter Maydell
2019-12-20 14:26 ` [PULL 07/12] hw/arm/smmuv3: Check stream IDs against actual table LOG2SIZE Peter Maydell
2019-12-20 14:26 ` [PULL 08/12] hw/arm/smmuv3: Align stream table base address to table size Peter Maydell
2019-12-20 14:26 ` [PULL 09/12] hw/arm/smmuv3: Use correct bit positions in EVT_SET_ADDR2 macro Peter Maydell
2019-12-20 14:26 ` Peter Maydell [this message]
2019-12-20 14:26 ` [PULL 11/12] target/arm: Display helpful message when hflags mismatch Peter Maydell
2019-12-20 14:26 ` [PULL 12/12] arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on() Peter Maydell
2020-01-06 10:32 ` [PULL 00/12] target-arm queue Peter Maydell
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