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[79.183.34.164]) by smtp.gmail.com with ESMTPSA id q73sm22021675qka.56.2020.01.07.01.33.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2020 01:33:15 -0800 (PST) Date: Tue, 7 Jan 2020 04:33:10 -0500 From: "Michael S. Tsirkin" To: Zeng Tao Subject: Re: [PATCH] hw/arm/acpi: Pack the SRAT processors structure by node_id ascending order Message-ID: <20200107042918-mutt-send-email-mst@kernel.org> References: <1578388729-55540-1-git-send-email-prime.zeng@hisilicon.com> MIME-Version: 1.0 In-Reply-To: <1578388729-55540-1-git-send-email-prime.zeng@hisilicon.com> X-MC-Unique: 9jX-dkKrNNG3Tk10EMnz7Q-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 205.139.110.61 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-trivial@nongnu.org, qemu-devel@nongnu.org, Shannon Zhao , qemu-arm@nongnu.org, Igor Mammedov Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Tue, Jan 07, 2020 at 05:18:49PM +0800, Zeng Tao wrote: > When booting the guest linux with the following numa configuration: > -numa node,node_id=3D1,cpus=3D0-3 > -numa node,node_id=3D0,cpus=3D4-7 > We can get the following numa topology in the guest system: > Architecture: aarch64 > Byte Order: Little Endian > CPU(s): 8 > On-line CPU(s) list: 0-7 > Thread(s) per core: 1 > Core(s) per socket: 8 > Socket(s): 1 > NUMA node(s): 2 > L1d cache: unknown size > L1i cache: unknown size > L2 cache: unknown size > NUMA node0 CPU(s): 0-3 > NUMA node1 CPU(s): 4-7 > The Cpus 0-3 is assigned with NUMA node 1 in QEMU while it get NUMA node > 0 in the guest. >=20 > In fact, In the linux kernel, numa_node_id is allocated per the ACPI > SRAT processors structure order,so the cpu 0 will be the first one to > allocate its NUMA node id, so it gets the NUMA node 0. >=20 > To fix this issue, we pack the SRAT processors structure in numa node id > order but not the default cpu number order. >=20 > Signed-off-by: Zeng Tao Does this matter? If yes fixing linux to take node id from proximity field in ACPI seems cleaner ... > --- > hw/arm/virt-acpi-build.c | 23 +++++++++++++++-------- > 1 file changed, 15 insertions(+), 8 deletions(-) >=20 > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c > index bd5f771..497192b 100644 > --- a/hw/arm/virt-acpi-build.c > +++ b/hw/arm/virt-acpi-build.c > @@ -520,7 +520,8 @@ build_srat(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) > AcpiSystemResourceAffinityTable *srat; > AcpiSratProcessorGiccAffinity *core; > AcpiSratMemoryAffinity *numamem; > - int i, srat_start; > + int i, j, srat_start; > + uint32_t node_id; > uint64_t mem_base; > MachineClass *mc =3D MACHINE_GET_CLASS(vms); > MachineState *ms =3D MACHINE(vms); > @@ -530,13 +531,19 @@ build_srat(GArray *table_data, BIOSLinker *linker, = VirtMachineState *vms) > srat =3D acpi_data_push(table_data, sizeof(*srat)); > srat->reserved1 =3D cpu_to_le32(1); > =20 > - for (i =3D 0; i < cpu_list->len; ++i) { > - core =3D acpi_data_push(table_data, sizeof(*core)); > - core->type =3D ACPI_SRAT_PROCESSOR_GICC; > - core->length =3D sizeof(*core); > - core->proximity =3D cpu_to_le32(cpu_list->cpus[i].props.node_id)= ; > - core->acpi_processor_uid =3D cpu_to_le32(i); > - core->flags =3D cpu_to_le32(1); > + for (i =3D 0; i < ms->numa_state->num_nodes; ++i) { > + for (j =3D 0; j < cpu_list->len; ++j) { Hmm O(n ^2) isn't great ... > + node_id =3D cpu_to_le32(cpu_list->cpus[j].props.node_id); > + if (node_id !=3D i) { > + continue; > + } > + core =3D acpi_data_push(table_data, sizeof(*core)); > + core->type =3D ACPI_SRAT_PROCESSOR_GICC; > + core->length =3D sizeof(*core); > + core->proximity =3D node_id; > + core->acpi_processor_uid =3D cpu_to_le32(j); > + core->flags =3D cpu_to_le32(1); > + } > } is the issue arm specific? wouldn't it affect x86 too? > mem_base =3D vms->memmap[VIRT_MEM].base; > --=20 > 2.8.1