From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
peter.maydell@linaro.org,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Aleksandar Markovic" <amarkovic@wavecomp.com>
Subject: [PULL 20/41] cputlb: Provide cpu_(ld,st}*_mmuidx_ra for user-only
Date: Wed, 8 Jan 2020 14:45:02 +1100 [thread overview]
Message-ID: <20200108034523.17349-21-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200108034523.17349-1-richard.henderson@linaro.org>
This finishes the new interface began with the previous patch.
Document the interface and deprecate MMU_MODE<N>_SUFFIX.
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/cpu_ldst.h | 80 +++++++++++++-
docs/devel/loads-stores.rst | 211 ++++++++++++++++++++++++++----------
2 files changed, 230 insertions(+), 61 deletions(-)
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index ef59ed61e4..41b98ba801 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -25,9 +25,13 @@
*
* The syntax for the accessors is:
*
- * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr)
+ * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr)
+ * cpu_ld{sign}{size}_{mmusuffix}_ra(env, ptr, retaddr)
+ * cpu_ld{sign}{size}_mmuidx_ra(env, ptr, mmu_idx, retaddr)
*
- * store: cpu_st{sign}{size}_{mmusuffix}(env, ptr, val)
+ * store: cpu_st{size}_{mmusuffix}(env, ptr, val)
+ * cpu_st{size}_{mmusuffix}_ra(env, ptr, val, retaddr)
+ * cpu_st{size}_mmuidx_ra(env, ptr, val, mmu_idx, retaddr)
*
* sign is:
* (empty): for 32 and 64 bit sizes
@@ -40,9 +44,10 @@
* l: 32 bits
* q: 64 bits
*
- * mmusuffix is one of the generic suffixes "data" or "code", or
- * (for softmmu configs) a target-specific MMU mode suffix as defined
- * in target cpu.h.
+ * mmusuffix is one of the generic suffixes "data" or "code", or "mmuidx".
+ * The "mmuidx" suffix carries an extra mmu_idx argument that specifies
+ * the index to use; the "data" and "code" suffixes take the index from
+ * cpu_mmu_index().
*/
#ifndef CPU_LDST_H
#define CPU_LDST_H
@@ -145,6 +150,71 @@ static inline void clear_helper_retaddr(void)
#undef MEMSUFFIX
#undef CODE_ACCESS
+/*
+ * Provide the same *_mmuidx_ra interface as for softmmu.
+ * The mmu_idx argument is ignored.
+ */
+
+static inline uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ return cpu_ldub_data_ra(env, addr, ra);
+}
+
+static inline uint32_t cpu_lduw_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ return cpu_lduw_data_ra(env, addr, ra);
+}
+
+static inline uint32_t cpu_ldl_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ return cpu_ldl_data_ra(env, addr, ra);
+}
+
+static inline uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ return cpu_ldq_data_ra(env, addr, ra);
+}
+
+static inline int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ return cpu_ldsb_data_ra(env, addr, ra);
+}
+
+static inline int cpu_ldsw_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ int mmu_idx, uintptr_t ra)
+{
+ return cpu_ldsw_data_ra(env, addr, ra);
+}
+
+static inline void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ uint32_t val, int mmu_idx, uintptr_t ra)
+{
+ cpu_stb_data_ra(env, addr, val, ra);
+}
+
+static inline void cpu_stw_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ uint32_t val, int mmu_idx, uintptr_t ra)
+{
+ cpu_stw_data_ra(env, addr, val, ra);
+}
+
+static inline void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ uint32_t val, int mmu_idx, uintptr_t ra)
+{
+ cpu_stl_data_ra(env, addr, val, ra);
+}
+
+static inline void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr,
+ uint64_t val, int mmu_idx, uintptr_t ra)
+{
+ cpu_stq_data_ra(env, addr, val, ra);
+}
+
#else
/* Needed for TCG_OVERSIZED_GUEST */
diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst
index 8a5bc912a5..03aa9e7ff8 100644
--- a/docs/devel/loads-stores.rst
+++ b/docs/devel/loads-stores.rst
@@ -72,31 +72,34 @@ Regexes for git grep
- ``\<ldn_\([hbl]e\)?_p\>``
- ``\<stn_\([hbl]e\)?_p\>``
-``cpu_{ld,st}_*``
-~~~~~~~~~~~~~~~~~
+``cpu_{ld,st}*_mmuidx_ra``
+~~~~~~~~~~~~~~~~~~~~~~~~~~
-These functions operate on a guest virtual address. Be aware
-that these functions may cause a guest CPU exception to be
-taken (e.g. for an alignment fault or MMU fault) which will
-result in guest CPU state being updated and control longjumping
-out of the function call. They should therefore only be used
-in code that is implementing emulation of the target CPU.
+These functions operate on a guest virtual address plus a context,
+known as a "mmu index" or ``mmuidx``, which controls how that virtual
+address is translated. The meaning of the indexes are target specific,
+but specifying a particular index might be necessary if, for instance,
+the helper requires an "always as non-privileged" access rather that
+the default access for the current state of the guest CPU.
-These functions may throw an exception (longjmp() back out
-to the top level TCG loop). This means they must only be used
-from helper functions where the translator has saved all
-necessary CPU state before generating the helper function call.
-It's usually better to use the ``_ra`` variants described below
-from helper functions, but these functions are the right choice
-for calls made from hooks like the CPU do_interrupt hook or
-when you know for certain that the translator had to save all
-the CPU state that ``cpu_restore_state()`` would restore anyway.
+These functions may cause a guest CPU exception to be taken
+(e.g. for an alignment fault or MMU fault) which will result in
+guest CPU state being updated and control longjmp'ing out of the
+function call. They should therefore only be used in code that is
+implementing emulation of the guest CPU.
+
+The ``retaddr`` parameter is used to control unwinding of the
+guest CPU state in case of a guest CPU exception. This is passed
+to ``cpu_restore_state()``. Therefore the value should either be 0,
+to indicate that the guest CPU state is already synchronized, or
+the result of ``GETPC()`` from the top level ``HELPER(foo)``
+function, which is a return address into the generated code.
Function names follow the pattern:
-load: ``cpu_ld{sign}{size}_{mmusuffix}(env, ptr)``
+load: ``cpu_ld{sign}{size}_mmuidx_ra(env, ptr, mmuidx, retaddr)``
-store: ``cpu_st{size}_{mmusuffix}(env, ptr, val)``
+store: ``cpu_st{size}_mmuidx_ra(env, ptr, val, mmuidx, retaddr)``
``sign``
- (empty) : for 32 or 64 bit sizes
@@ -109,56 +112,151 @@ store: ``cpu_st{size}_{mmusuffix}(env, ptr, val)``
- ``l`` : 32 bits
- ``q`` : 64 bits
-``mmusuffix`` is one of the generic suffixes ``data`` or ``code``, or
-(for softmmu configs) a target-specific MMU mode suffix as defined
-in the target's ``cpu.h``.
+Regexes for git grep:
+ - ``\<cpu_ld[us]\?[bwlq]_mmuidx_ra\>``
+ - ``\<cpu_st[bwlq]_mmuidx_ra\>``
-Regexes for git grep
- - ``\<cpu_ld[us]\?[bwlq]_[a-zA-Z0-9]\+\>``
- - ``\<cpu_st[bwlq]_[a-zA-Z0-9]\+\>``
+``cpu_{ld,st}*_data_ra``
+~~~~~~~~~~~~~~~~~~~~~~~~
-``cpu_{ld,st}_*_ra``
-~~~~~~~~~~~~~~~~~~~~
-
-These functions work like the ``cpu_{ld,st}_*`` functions except
-that they also take a ``retaddr`` argument. This extra argument
-allows for correct unwinding of any exception that is taken,
-and should generally be the result of GETPC() called directly
-from the top level HELPER(foo) function (i.e. the return address
-in the generated code).
+These functions work like the ``cpu_{ld,st}_mmuidx_ra`` functions
+except that the ``mmuidx`` parameter is taken from the current mode
+of the guest CPU, as determined by ``cpu_mmu_index(env, false)``.
These are generally the preferred way to do accesses by guest
-virtual address from helper functions; see the documentation
-of the non-``_ra`` variants for when those would be better.
-
-Calling these functions with a ``retaddr`` argument of 0 is
-equivalent to calling the non-``_ra`` version of the function.
+virtual address from helper functions, unless the access should
+be performed with a context other than the default.
Function names follow the pattern:
-load: ``cpu_ld{sign}{size}_{mmusuffix}_ra(env, ptr, retaddr)``
+load: ``cpu_ld{sign}{size}_data_ra(env, ptr, ra)``
-store: ``cpu_st{sign}{size}_{mmusuffix}_ra(env, ptr, val, retaddr)``
+store: ``cpu_st{size}_data_ra(env, ptr, val, ra)``
+
+``sign``
+ - (empty) : for 32 or 64 bit sizes
+ - ``u`` : unsigned
+ - ``s`` : signed
+
+``size``
+ - ``b`` : 8 bits
+ - ``w`` : 16 bits
+ - ``l`` : 32 bits
+ - ``q`` : 64 bits
+
+Regexes for git grep:
+ - ``\<cpu_ld[us]\?[bwlq]_data_ra\>``
+ - ``\<cpu_st[bwlq]_data_ra\>``
+
+``cpu_{ld,st}*_data``
+~~~~~~~~~~~~~~~~~~~~~
+
+These functions work like the ``cpu_{ld,st}_data_ra`` functions
+except that the ``retaddr`` parameter is 0, and thus does not
+unwind guest CPU state.
+
+This means they must only be used from helper functions where the
+translator has saved all necessary CPU state. These functions are
+the right choice for calls made from hooks like the CPU ``do_interrupt``
+hook or when you know for certain that the translator had to save all
+the CPU state anyway.
+
+Function names follow the pattern:
+
+load: ``cpu_ld{sign}{size}_data(env, ptr)``
+
+store: ``cpu_st{size}_data(env, ptr, val)``
+
+``sign``
+ - (empty) : for 32 or 64 bit sizes
+ - ``u`` : unsigned
+ - ``s`` : signed
+
+``size``
+ - ``b`` : 8 bits
+ - ``w`` : 16 bits
+ - ``l`` : 32 bits
+ - ``q`` : 64 bits
Regexes for git grep
- - ``\<cpu_ld[us]\?[bwlq]_[a-zA-Z0-9]\+_ra\>``
- - ``\<cpu_st[bwlq]_[a-zA-Z0-9]\+_ra\>``
+ - ``\<cpu_ld[us]\?[bwlq]_data\>``
+ - ``\<cpu_st[bwlq]_data\+\>``
-``helper_*_{ld,st}*mmu``
-~~~~~~~~~~~~~~~~~~~~~~~~
+``cpu_ld*_code``
+~~~~~~~~~~~~~~~~
+
+These functions perform a read for instruction execution. The ``mmuidx``
+parameter is taken from the current mode of the guest CPU, as determined
+by ``cpu_mmu_index(env, true)``. The ``retaddr`` parameter is 0, and
+thus does not unwind guest CPU state, because CPU state is always
+synchronized while translating instructions. Any guest CPU exception
+that is raised will indicate an instruction execution fault rather than
+a data read fault.
+
+In general these functions should not be used directly during translation.
+There are wrapper functions that are to be used which also take care of
+plugins for tracing.
+
+Function names follow the pattern:
+
+load: ``cpu_ld{sign}{size}_code(env, ptr)``
+
+``sign``
+ - (empty) : for 32 or 64 bit sizes
+ - ``u`` : unsigned
+ - ``s`` : signed
+
+``size``
+ - ``b`` : 8 bits
+ - ``w`` : 16 bits
+ - ``l`` : 32 bits
+ - ``q`` : 64 bits
+
+Regexes for git grep:
+ - ``\<cpu_ld[us]\?[bwlq]_code\>``
+
+``translator_ld*``
+~~~~~~~~~~~~~~~~~~
+
+These functions are a wrapper for ``cpu_ld*_code`` which also perform
+any actions required by any tracing plugins. They are only to be
+called during the translator callback ``translate_insn``.
+
+There is a set of functions ending in ``_swap`` which, if the parameter
+is true, returns the value in the endianness that is the reverse of
+the guest native endianness, as determined by ``TARGET_WORDS_BIGENDIAN``.
+
+Function names follow the pattern:
+
+load: ``translator_ld{sign}{size}(env, ptr)``
+
+swap: ``translator_ld{sign}{size}_swap(env, ptr, swap)``
+
+``sign``
+ - (empty) : for 32 or 64 bit sizes
+ - ``u`` : unsigned
+ - ``s`` : signed
+
+``size``
+ - ``b`` : 8 bits
+ - ``w`` : 16 bits
+ - ``l`` : 32 bits
+ - ``q`` : 64 bits
+
+Regexes for git grep
+ - ``\<translator_ld[us]\?[bwlq]\(_swap\)\?\>``
+
+``helper_*_{ld,st}*_mmu``
+~~~~~~~~~~~~~~~~~~~~~~~~~
These functions are intended primarily to be called by the code
generated by the TCG backend. They may also be called by target
-CPU helper function code. Like the ``cpu_{ld,st}_*_ra`` functions
-they perform accesses by guest virtual address; the difference is
-that these functions allow you to specify an ``opindex`` parameter
-which encodes (among other things) the mmu index to use for the
-access. This is necessary if your helper needs to make an access
-via a specific mmu index (for instance, an "always as non-privileged"
-access) rather than using the default mmu index for the current state
-of the guest CPU.
+CPU helper function code. Like the ``cpu_{ld,st}_mmuidx_ra`` functions
+they perform accesses by guest virtual address, with a given ``mmuidx``.
-The ``opindex`` parameter should be created by calling ``make_memop_idx()``.
+These functions specify an ``opindex`` parameter which encodes
+(among other things) the mmu index to use for the access. This parameter
+should be created by calling ``make_memop_idx()``.
The ``retaddr`` parameter should be the result of GETPC() called directly
from the top level HELPER(foo) function (or 0 if no guest CPU state
@@ -166,8 +264,9 @@ unwinding is required).
**TODO** The names of these functions are a bit odd for historical
reasons because they were originally expected to be called only from
-within generated code. We should rename them to bring them
-more in line with the other memory access functions.
+within generated code. We should rename them to bring them more in
+line with the other memory access functions. The explicit endianness
+is the only feature they have beyond ``*_mmuidx_ra``.
load: ``helper_{endian}_ld{sign}{size}_mmu(env, addr, opindex, retaddr)``
--
2.20.1
next prev parent reply other threads:[~2020-01-08 3:55 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-08 3:44 [PULL 00/41] tcg patch queue Richard Henderson
2020-01-08 3:44 ` [PULL 01/41] configure: Drop adjustment of textseg Richard Henderson
2020-01-08 3:44 ` [PULL 02/41] tcg: Remove softmmu code_gen_buffer fixed address Richard Henderson
2020-01-08 3:44 ` [PULL 03/41] configure: Do not force pie=no for non-x86 Richard Henderson
2020-01-08 3:44 ` [PULL 04/41] configure: Always detect -no-pie toolchain support Richard Henderson
2020-01-08 3:44 ` [PULL 05/41] configure: Unnest detection of -z,relro and -z,now Richard Henderson
2020-01-08 3:44 ` [PULL 06/41] configure: Override the os default with --disable-pie Richard Henderson
2020-01-08 3:44 ` [PULL 07/41] configure: Support -static-pie if requested Richard Henderson
2020-01-08 3:44 ` [PULL 08/41] target/xtensa: Use probe_access for itlb_hit_test Richard Henderson
2020-01-08 3:44 ` [PULL 09/41] cputlb: Use trace_mem_get_info instead of trace_mem_build_info Richard Henderson
2020-01-08 3:44 ` [PULL 10/41] trace: Remove trace_mem_build_info_no_se_[bl]e Richard Henderson
2020-01-08 3:44 ` [PULL 11/41] target/s390x: Include tcg.h in mem_helper.c Richard Henderson
2020-01-08 3:44 ` [PULL 12/41] target/arm: Include tcg.h in sve_helper.c Richard Henderson
2020-01-08 3:44 ` [PULL 13/41] accel/tcg: Include tcg.h in tcg-runtime.c Richard Henderson
2020-01-08 3:44 ` [PULL 14/41] linux-user: Include tcg.h in syscall.c Richard Henderson
2020-01-08 3:44 ` [PULL 15/41] linux-user: Include trace-root.h in syscall-trace.h Richard Henderson
2020-01-08 3:44 ` [PULL 16/41] plugins: Include trace/mem.h in api.c Richard Henderson
2020-01-08 3:44 ` [PULL 17/41] cputlb: Move body of cpu_ldst_template.h out of line Richard Henderson
2020-01-08 3:45 ` [PULL 18/41] translator: Use cpu_ld*_code instead of open-coding Richard Henderson
2020-01-08 3:45 ` [PULL 19/41] cputlb: Rename helper_ret_ld*_cmmu to cpu_ld*_code Richard Henderson
2020-01-08 3:45 ` Richard Henderson [this message]
2020-01-08 3:45 ` [PULL 21/41] target/i386: Use cpu_*_mmuidx_ra instead of templates Richard Henderson
2020-01-08 3:45 ` [PULL 22/41] cputlb: Expand cpu_ldst_useronly_template.h in user-exec.c Richard Henderson
2020-01-08 3:45 ` [PULL 23/41] target/nios2: Remove MMU_MODE{0,1}_SUFFIX Richard Henderson
2020-01-08 3:45 ` [PULL 24/41] target/alpha: " Richard Henderson
2020-01-08 3:45 ` [PULL 25/41] target/cris: " Richard Henderson
2020-01-08 3:45 ` [PULL 26/41] target/i386: Remove MMU_MODE{0,1,2}_SUFFIX Richard Henderson
2020-01-08 3:45 ` [PULL 27/41] target/microblaze: " Richard Henderson
2020-01-08 3:45 ` [PULL 28/41] target/sh4: Remove MMU_MODE{0,1}_SUFFIX Richard Henderson
2020-01-08 3:45 ` [PULL 29/41] target/unicore32: " Richard Henderson
2020-01-08 3:45 ` [PULL 30/41] target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIX Richard Henderson
2020-01-08 3:45 ` [PULL 31/41] target/m68k: Use cpu_*_mmuidx_ra instead of MMU_MODE{0, 1}_SUFFIX Richard Henderson
2020-01-08 3:45 ` [PULL 32/41] target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX Richard Henderson
2020-02-01 20:12 ` Philippe Mathieu-Daudé
2020-02-01 22:07 ` Philippe Mathieu-Daudé
2020-02-02 2:37 ` Philippe Mathieu-Daudé
2020-02-02 9:20 ` Thomas Huth
2020-01-08 3:45 ` [PULL 33/41] target/s390x: " Richard Henderson
2020-01-08 3:45 ` [PULL 34/41] target/ppc: " Richard Henderson
2020-01-08 3:45 ` [PULL 35/41] cputlb: Remove support for MMU_MODE*_SUFFIX Richard Henderson
2020-01-08 3:45 ` [PULL 36/41] cputlb: Expand cpu_ldst_template.h in cputlb.c Richard Henderson
2020-01-08 3:45 ` [PULL 37/41] tcg: Search includes from the project root source directory Richard Henderson
2020-01-08 3:45 ` [PULL 38/41] tcg: Search includes in the parent " Richard Henderson
2020-01-08 3:45 ` [PULL 39/41] tcg: Move TCG headers to include/tcg/ Richard Henderson
2020-01-08 3:45 ` [PULL 40/41] configure: Remove tcg/ from the preprocessor include search list Richard Henderson
2020-01-08 3:45 ` [PULL 41/41] MAINTAINERS: Replace Claudio Fontana for tcg/aarch64 Richard Henderson
2020-01-10 15:51 ` [PULL 00/41] tcg patch queue Peter Maydell
2020-01-13 21:10 ` Richard Henderson
2020-01-13 21:50 ` Richard Henderson
2020-01-13 22:06 ` Richard Henderson
2020-01-14 1:16 ` Richard Henderson
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