From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: lvivier@redhat.com, Laurent Vivier <laurent@vivier.eu>,
qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org,
clg@kaod.org, David Gibson <david@gibson.dropbear.id.au>
Subject: [PULL 06/26] mos6522: remove anh register
Date: Wed, 8 Jan 2020 16:22:52 +1100 [thread overview]
Message-ID: <20200108052312.238710-7-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20200108052312.238710-1-david@gibson.dropbear.id.au>
From: Laurent Vivier <laurent@vivier.eu>
Register addr 1 is defined as buffer A with handshake (vBufAH),
register addr 15 is also defined as buffer A without handshake (vBufA).
As both addresses access the same register, remove the definition of
'anh' and use only 'a' (with VIA_REG_ANH and VIA_REG_A).
Fixes: 51f233ec92cd ("misc: introduce new mos6522 VIA device and enable it for ppc builds")
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20191220214054.76525-1-laurent@vivier.eu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/misc/mos6522.c | 16 ++++++++--------
include/hw/misc/mos6522.h | 1 -
2 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index cecf0be59e..10b85bf751 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -244,6 +244,9 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned size)
val = s->b;
break;
case VIA_REG_A:
+ qemu_log_mask(LOG_UNIMP, "Read access to register A with handshake");
+ /* fall through */
+ case VIA_REG_ANH:
val = s->a;
break;
case VIA_REG_DIRB:
@@ -297,9 +300,7 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned size)
val = s->ier | 0x80;
break;
default:
- case VIA_REG_ANH:
- val = s->anh;
- break;
+ g_assert_not_reached();
}
if (addr != VIA_REG_IFR || val != 0) {
@@ -322,6 +323,9 @@ void mos6522_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
mdc->portB_write(s);
break;
case VIA_REG_A:
+ qemu_log_mask(LOG_UNIMP, "Write access to register A with handshake");
+ /* fall through */
+ case VIA_REG_ANH:
s->a = (s->a & ~s->dira) | (val & s->dira);
mdc->portA_write(s);
break;
@@ -395,9 +399,7 @@ void mos6522_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
break;
default:
- case VIA_REG_ANH:
- s->anh = val;
- break;
+ g_assert_not_reached();
}
}
@@ -439,7 +441,6 @@ const VMStateDescription vmstate_mos6522 = {
VMSTATE_UINT8(pcr, MOS6522State),
VMSTATE_UINT8(ifr, MOS6522State),
VMSTATE_UINT8(ier, MOS6522State),
- VMSTATE_UINT8(anh, MOS6522State),
VMSTATE_STRUCT_ARRAY(timers, MOS6522State, 2, 0,
vmstate_mos6522_timer, MOS6522Timer),
VMSTATE_END_OF_LIST()
@@ -460,7 +461,6 @@ static void mos6522_reset(DeviceState *dev)
s->ifr = 0;
s->ier = 0;
/* s->ier = T1_INT | SR_INT; */
- s->anh = 0;
s->timers[0].frequency = s->frequency;
s->timers[0].latch = 0xffff;
diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h
index 493c907537..97384c6e02 100644
--- a/include/hw/misc/mos6522.h
+++ b/include/hw/misc/mos6522.h
@@ -115,7 +115,6 @@ typedef struct MOS6522State {
uint8_t pcr;
uint8_t ifr;
uint8_t ier;
- uint8_t anh;
MOS6522Timer timers[2];
uint64_t frequency;
--
2.24.1
next prev parent reply other threads:[~2020-01-08 5:33 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-08 5:22 [PULL 00/26] ppc-for-5.0 queue 20200108 David Gibson
2020-01-08 5:22 ` [PULL 01/26] target/ppc: Remove unused PPC_INPUT_INT defines David Gibson
2020-01-08 5:22 ` [PULL 02/26] target/ppc: Handle AIL=0 in ppc_excp_vector_offset David Gibson
2020-01-08 5:22 ` [PULL 03/26] linux-headers: Update David Gibson
2020-01-08 5:22 ` [PULL 04/26] ppc/spapr: Support reboot of secure pseries guest David Gibson
2020-01-08 5:22 ` [PULL 05/26] ppc/pnv: Modify the powerdown notifier to get the PowerNV machine David Gibson
2020-01-08 5:22 ` David Gibson [this message]
2020-01-08 5:22 ` [PULL 07/26] spapr/xive: Use device_class_set_parent_realize() David Gibson
2020-01-08 5:22 ` [PULL 08/26] ppc/spapr: Don't call KVM_SVM_OFF ioctl on TCG David Gibson
2020-01-08 5:22 ` [PULL 09/26] spapr.c: remove 'out' label in spapr_dt_cas_updates() David Gibson
2020-01-08 5:22 ` [PULL 10/26] ppc440_bamboo.c: remove label from bamboo_load_device_tree() David Gibson
2020-01-08 5:22 ` [PULL 11/26] ppc/pnv: Drop "num-chips" machine property David Gibson
2020-01-08 5:22 ` [PULL 12/26] spapr/xive: remove redundant check in spapr_match_nvt() David Gibson
2020-01-08 5:22 ` [PULL 13/26] ppc/pnv: Introduce a "xics" property alias under the PSI model David Gibson
2020-01-08 5:23 ` [PULL 14/26] ppc/pnv: Introduce a "xics" property under the POWER8 chip David Gibson
2020-01-08 5:23 ` [PULL 15/26] pnv/xive: Use device_class_set_parent_realize() David Gibson
2020-01-08 5:23 ` [PULL 16/26] spapr, pnv, xive: Add a "xive-fabric" link to the XIVE router David Gibson
2020-01-08 5:23 ` [PULL 17/26] xive: Use the XIVE fabric link under " David Gibson
2020-01-08 5:23 ` [PULL 18/26] ppc/pnv: Add an "nr-threads" property to the base chip class David Gibson
2020-01-08 5:23 ` [PULL 19/26] ppc/pnv: Add a "pnor" const link property to the BMC internal simulator David Gibson
2020-01-08 5:23 ` [PULL 20/26] xive: Add a "presenter" link property to the TCTX object David Gibson
2020-01-08 5:23 ` [PULL 21/26] spapr/xive: Deduce the SpaprXive pointer from XiveTCTX::xptr David Gibson
2020-01-08 5:23 ` [PULL 22/26] pnv/xive: Deduce the PnvXive " David Gibson
2020-01-08 5:23 ` [PULL 23/26] pnv/psi: Add device reset hook David Gibson
2020-01-08 5:23 ` [PULL 24/26] pnv/psi: Consolidate some duplicated code in pnv_psi_realize() David Gibson
2020-01-08 5:23 ` [PULL 25/26] ppc/pnv: check return value of blk_pwrite() David Gibson
2020-01-08 5:23 ` [PULL 26/26] ppc/pnv: fix check on return value of blk_getlength() David Gibson
2020-01-10 17:16 ` [PULL 00/26] ppc-for-5.0 queue 20200108 Peter Maydell
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