How to tell DMA controller in qemu to terminate transfer ?

How to tell DMA controller in qemu to terminate transfer ?

[Guenter Roeck]

Hi,

I am trying to fix DMA support with Exynos4210. The original commit
59520dc65e ("hw/arm/exynos4210: Add DMA support for the Exynos4210") doesn't
really work, primarily because it assigns wrong interrupt lines (no idea
how I thought I tested that).

Problem I have right now is that the pl330 peripheral DMA in Exynos4210
depends on a signal from the peripheral device (here: serial ports)
to end a DMA transfer. To make this work, I need a signal from
exynos4210_uart.c to pl330.c to terminate the DMA after the receive
buffer is empty.

How can I implement this in qemu ?

Thanks,
Guenter

Re: How to tell DMA controller in qemu to terminate transfer ?

[Peter Maydell]

On Wed, 8 Jan 2020 at 18:36, Guenter Roeck <linux@roeck-us.net> wrote:
>
> Hi,
>
> I am trying to fix DMA support with Exynos4210. The original commit
> 59520dc65e ("hw/arm/exynos4210: Add DMA support for the Exynos4210") doesn't
> really work, primarily because it assigns wrong interrupt lines (no idea
> how I thought I tested that).
>
> Problem I have right now is that the pl330 peripheral DMA in Exynos4210
> depends on a signal from the peripheral device (here: serial ports)
> to end a DMA transfer. To make this work, I need a signal from
> exynos4210_uart.c to pl330.c to terminate the DMA after the receive
> buffer is empty.
>
> How can I implement this in qemu ?

That depends. How does the UART signal the DMA controller
in real hardware? If there's a signal line of some kind,
then you can model that with a qemu_irq line which the UART
exposes and raises/lowers at the right time, that's then
plumbed through by the SoC to the DMA controller.

thanks
-- PMM

Re: How to tell DMA controller in qemu to terminate transfer ?

[Guenter Roeck]

Hi Peter,

On 1/10/20 2:36 AM, Peter Maydell wrote:
> On Wed, 8 Jan 2020 at 18:36, Guenter Roeck <linux@roeck-us.net> wrote:
>>
>> Hi,
>>
>> I am trying to fix DMA support with Exynos4210. The original commit
>> 59520dc65e ("hw/arm/exynos4210: Add DMA support for the Exynos4210") doesn't
>> really work, primarily because it assigns wrong interrupt lines (no idea
>> how I thought I tested that).
>>
>> Problem I have right now is that the pl330 peripheral DMA in Exynos4210
>> depends on a signal from the peripheral device (here: serial ports)
>> to end a DMA transfer. To make this work, I need a signal from
>> exynos4210_uart.c to pl330.c to terminate the DMA after the receive
>> buffer is empty.
>>
>> How can I implement this in qemu ?
> 
> That depends. How does the UART signal the DMA controller
> in real hardware? If there's a signal line of some kind,

Yes, that is my understanding.

> then you can model that with a qemu_irq line which the UART
> exposes and raises/lowers at the right time, that's then
> plumbed through by the SoC to the DMA controller.
> 

Makes sense. Can you give me some hints on how to do that, or point me
to an example ?

The pl330 dma code registers a set of gpio pins tied to pl330_dma_stop_irq().
I suspect that is what I am looking for, I just have no idea how to tie
it to the serial driver code.

Thanks,
Guenter

Re: How to tell DMA controller in qemu to terminate transfer ?

[Guenter Roeck]

On Fri, Jan 10, 2020 at 10:36:20AM +0000, Peter Maydell wrote:
> On Wed, 8 Jan 2020 at 18:36, Guenter Roeck <linux@roeck-us.net> wrote:
> >
> > Hi,
> >
> > I am trying to fix DMA support with Exynos4210. The original commit
> > 59520dc65e ("hw/arm/exynos4210: Add DMA support for the Exynos4210") doesn't
> > really work, primarily because it assigns wrong interrupt lines (no idea
> > how I thought I tested that).
> >
> > Problem I have right now is that the pl330 peripheral DMA in Exynos4210
> > depends on a signal from the peripheral device (here: serial ports)
> > to end a DMA transfer. To make this work, I need a signal from
> > exynos4210_uart.c to pl330.c to terminate the DMA after the receive
> > buffer is empty.
> >
> > How can I implement this in qemu ?
> 
> That depends. How does the UART signal the DMA controller
> in real hardware? If there's a signal line of some kind,
> then you can model that with a qemu_irq line which the UART
> exposes and raises/lowers at the right time, that's then
> plumbed through by the SoC to the DMA controller.
> 
Never mind my previous e-mail; the above was enough to get it working.

Thanks!
Guenter