From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, alex.bennee@linaro.org,
qemu-stable@nongnu.org, jeff.kubascik@dornerworks.com
Subject: [PATCH v2 2/2] target/arm: Set ISSIs16Bit in make_issinfo
Date: Thu, 16 Jan 2020 14:46:18 -1000 [thread overview]
Message-ID: <20200117004618.2742-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200117004618.2742-1-richard.henderson@linaro.org>
During the conversion to decodetree, the setting of
ISSIs16Bit got lost. This causes the guest os to
incorrectly adjust trapping memory operations.
Cc: qemu-stable@nongnu.org
Fixes: 46beb58efbb8a2a32 ("target/arm: Convert T16, load (literal)")
Reported-by: Jeff Kubascik <jeff.kubascik@dornerworks.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 5185e08641..c25921ef95 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -8556,6 +8556,9 @@ static ISSInfo make_issinfo(DisasContext *s, int rd, bool p, bool w)
/* ISS not valid if writeback */
if (p && !w) {
ret = rd;
+ if (s->base.pc_next - s->pc_curr == 2) {
+ ret |= ISSIs16Bit;
+ }
} else {
ret = ISSInvalid;
}
--
2.20.1
next prev parent reply other threads:[~2020-01-17 0:47 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-17 0:46 [PATCH v2 0/2] target/arm: Fix ISSIs16Bit Richard Henderson
2020-01-17 0:46 ` [PATCH v2 1/2] target/arm: Return correct IL bit in merge_syn_data_abort Richard Henderson
2020-01-17 0:46 ` Richard Henderson [this message]
2020-01-17 12:06 ` [PATCH v2 0/2] target/arm: Fix ISSIs16Bit Peter Maydell
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