From: "Cédric Le Goater" <clg@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: "Cédric Le Goater" <clg@kaod.org>,
qemu-ppc@nongnu.org, "Joel Stanley" <joel@jms.id.au>,
qemu-devel@nongnu.org
Subject: [PATCH 1/3] ppc/pnv: Add support for HRMOR on Radix host
Date: Mon, 27 Jan 2020 15:41:52 +0100 [thread overview]
Message-ID: <20200127144154.10170-2-clg@kaod.org> (raw)
In-Reply-To: <20200127144154.10170-1-clg@kaod.org>
When in HV mode, if EA[0] is 0, the Hypervisor Offset Real Mode
Register controls the access.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/mmu-radix64.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index 066e324464db..224e646c5094 100644
--- a/target/ppc/mmu-radix64.c
+++ b/target/ppc/mmu-radix64.c
@@ -235,6 +235,12 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
/* In real mode top 4 effective addr bits (mostly) ignored */
raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL;
+ /* In HV mode, add HRMOR if top EA bit is clear */
+ if (msr_hv || !env->has_hv_mode) {
+ if (!(eaddr >> 63)) {
+ raddr |= env->spr[SPR_HRMOR];
+ }
+ }
tlb_set_page(cs, eaddr & TARGET_PAGE_MASK, raddr & TARGET_PAGE_MASK,
PAGE_READ | PAGE_WRITE | PAGE_EXEC, mmu_idx,
TARGET_PAGE_SIZE);
--
2.21.1
next prev parent reply other threads:[~2020-01-27 14:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-27 14:41 [PATCH 0/3] ppc/pnv: Add a "hostboot" mode Cédric Le Goater
2020-01-27 14:41 ` Cédric Le Goater [this message]
2020-01-27 14:41 ` [PATCH 2/3] ppc/pnv: remove useless "core-pir" property alias Cédric Le Goater
2020-01-27 14:41 ` [PATCH 3/3] ppc/pnv: Add support for "hostboot" mode Cédric Le Goater
2020-01-29 2:04 ` [PATCH 0/3] ppc/pnv: Add a " David Gibson
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