From: Igor Mammedov <imammedo@redhat.com>
To: Babu Moger <babu.moger@amd.com>
Cc: ehabkost@redhat.com, mst@redhat.com, armbru@redhat.com,
qemu-devel@nongnu.org, pbonzini@redhat.com, rth@twiddle.net
Subject: Re: [PATCH v3 02/18] hw/i386: Introduce X86CPUTopoInfo to contain topology info
Date: Tue, 28 Jan 2020 16:44:16 +0100 [thread overview]
Message-ID: <20200128164416.39eb2db2@redhat.com> (raw)
In-Reply-To: <157541982831.46157.16635542688144831181.stgit@naples-babu.amd.com>
On Tue, 03 Dec 2019 18:37:08 -0600
Babu Moger <babu.moger@amd.com> wrote:
> This is an effort to re-arrange few data structure for better readability.
> Add X86CPUTopoInfo which will have all the topology informations required
> to build the cpu topology. There is no functional changes.
>
> Signed-off-by: Babu Moger <babu.moger@amd.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
> hw/i386/pc.c | 40 +++++++++++++++++++++++++++-------------
> include/hw/i386/topology.h | 38 ++++++++++++++++++++++++--------------
> 2 files changed, 51 insertions(+), 27 deletions(-)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 5bd2ffccb7..8c23b1e8c9 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -878,11 +878,15 @@ static uint32_t x86_cpu_apic_id_from_index(PCMachineState *pcms,
> {
> MachineState *ms = MACHINE(pcms);
> PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
> + X86CPUTopoInfo topo_info;
> uint32_t correct_id;
> static bool warned;
>
> - correct_id = x86_apicid_from_cpu_idx(pcms->smp_dies, ms->smp.cores,
> - ms->smp.threads, cpu_index);
> + topo_info.dies_per_pkg = pcms->smp_dies;
> + topo_info.cores_per_die = ms->smp.cores;
> + topo_info.threads_per_core = ms->smp.threads;
> +
> + correct_id = x86_apicid_from_cpu_idx(&topo_info, cpu_index);
> if (pcmc->compat_apic_id_mode) {
> if (cpu_index != correct_id && !warned && !qtest_enabled()) {
> error_report("APIC IDs set in compatibility mode, "
> @@ -2219,6 +2223,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
> PCMachineState *pcms = PC_MACHINE(hotplug_dev);
> unsigned int smp_cores = ms->smp.cores;
> unsigned int smp_threads = ms->smp.threads;
> + X86CPUTopoInfo topo_info;
>
> if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) {
> error_setg(errp, "Invalid CPU type, expected cpu type: '%s'",
> @@ -2226,6 +2231,10 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
> return;
> }
>
> + topo_info.dies_per_pkg = pcms->smp_dies;
> + topo_info.cores_per_die = smp_cores;
> + topo_info.threads_per_core = smp_threads;
> +
> env->nr_dies = pcms->smp_dies;
>
> /*
> @@ -2281,16 +2290,14 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
> topo_ids.die_id = cpu->die_id;
> topo_ids.core_id = cpu->core_id;
> topo_ids.smt_id = cpu->thread_id;
> - cpu->apic_id = apicid_from_topo_ids(pcms->smp_dies, smp_cores,
> - smp_threads, &topo_ids);
> + cpu->apic_id = apicid_from_topo_ids(&topo_info, &topo_ids);
> }
>
> cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx);
> if (!cpu_slot) {
> MachineState *ms = MACHINE(pcms);
>
> - x86_topo_ids_from_apicid(cpu->apic_id, pcms->smp_dies,
> - smp_cores, smp_threads, &topo_ids);
> + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
> error_setg(errp,
> "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
> " APIC ID %" PRIu32 ", valid index range 0:%d",
> @@ -2311,8 +2318,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
> /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
> * once -smp refactoring is complete and there will be CPU private
> * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
> - x86_topo_ids_from_apicid(cpu->apic_id, pcms->smp_dies,
> - smp_cores, smp_threads, &topo_ids);
> + x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
> if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) {
> error_setg(errp, "property socket-id: %u doesn't match set apic-id:"
> " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, topo_ids.pkg_id);
> @@ -2694,19 +2700,28 @@ static int64_t pc_get_default_cpu_node_id(const MachineState *ms, int idx)
> {
> X86CPUTopoIDs topo_ids;
> PCMachineState *pcms = PC_MACHINE(ms);
> + X86CPUTopoInfo topo_info;
> +
> + topo_info.dies_per_pkg = pcms->smp_dies;
> + topo_info.cores_per_die = ms->smp.cores;
> + topo_info.threads_per_core = ms->smp.threads;
>
> assert(idx < ms->possible_cpus->len);
> x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
> - pcms->smp_dies, ms->smp.cores,
> - ms->smp.threads, &topo_ids);
> + &topo_info, &topo_ids);
> return topo_ids.pkg_id % ms->numa_state->num_nodes;
> }
>
> static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms)
> {
> PCMachineState *pcms = PC_MACHINE(ms);
> - int i;
> unsigned int max_cpus = ms->smp.max_cpus;
> + X86CPUTopoInfo topo_info;
> + int i;
> +
> + topo_info.dies_per_pkg = pcms->smp_dies;
> + topo_info.cores_per_die = ms->smp.cores;
> + topo_info.threads_per_core = ms->smp.threads;
>
> if (ms->possible_cpus) {
> /*
> @@ -2727,8 +2742,7 @@ static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms)
> ms->possible_cpus->cpus[i].vcpus_count = 1;
> ms->possible_cpus->cpus[i].arch_id = x86_cpu_apic_id_from_index(pcms, i);
> x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
> - pcms->smp_dies, ms->smp.cores,
> - ms->smp.threads, &topo_ids);
> + &topo_info, &topo_ids);
> ms->possible_cpus->cpus[i].props.has_socket_id = true;
> ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id;
> if (pcms->smp_dies > 1) {
> diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h
> index 6c184f3115..cf1935d548 100644
> --- a/include/hw/i386/topology.h
> +++ b/include/hw/i386/topology.h
> @@ -52,6 +52,12 @@ typedef struct X86CPUTopoIDs {
> unsigned smt_id;
> } X86CPUTopoIDs;
>
> +typedef struct X86CPUTopoInfo {
> + unsigned dies_per_pkg;
> + unsigned cores_per_die;
> + unsigned threads_per_core;
> +} X86CPUTopoInfo;
> +
> /* Return the bit width needed for 'count' IDs
> */
> static unsigned apicid_bitwidth_for_count(unsigned count)
> @@ -119,11 +125,13 @@ static inline unsigned apicid_pkg_offset(unsigned nr_dies,
> *
> * The caller must make sure core_id < nr_cores and smt_id < nr_threads.
> */
> -static inline apic_id_t apicid_from_topo_ids(unsigned nr_dies,
> - unsigned nr_cores,
> - unsigned nr_threads,
> +static inline apic_id_t apicid_from_topo_ids(X86CPUTopoInfo *topo_info,
> const X86CPUTopoIDs *topo_ids)
> {
> + unsigned nr_dies = topo_info->dies_per_pkg;
> + unsigned nr_cores = topo_info->cores_per_die;
> + unsigned nr_threads = topo_info->threads_per_core;
> +
> return (topo_ids->pkg_id << apicid_pkg_offset(nr_dies, nr_cores, nr_threads)) |
> (topo_ids->die_id << apicid_die_offset(nr_dies, nr_cores, nr_threads)) |
> (topo_ids->core_id << apicid_core_offset(nr_dies, nr_cores, nr_threads)) |
> @@ -133,12 +141,14 @@ static inline apic_id_t apicid_from_topo_ids(unsigned nr_dies,
> /* Calculate thread/core/package IDs for a specific topology,
> * based on (contiguous) CPU index
> */
> -static inline void x86_topo_ids_from_idx(unsigned nr_dies,
> - unsigned nr_cores,
> - unsigned nr_threads,
> +static inline void x86_topo_ids_from_idx(X86CPUTopoInfo *topo_info,
> unsigned cpu_index,
> X86CPUTopoIDs *topo_ids)
> {
> + unsigned nr_dies = topo_info->dies_per_pkg;
> + unsigned nr_cores = topo_info->cores_per_die;
> + unsigned nr_threads = topo_info->threads_per_core;
> +
> topo_ids->pkg_id = cpu_index / (nr_dies * nr_cores * nr_threads);
> topo_ids->die_id = cpu_index / (nr_cores * nr_threads) % nr_dies;
> topo_ids->core_id = cpu_index / nr_threads % nr_cores;
> @@ -149,11 +159,13 @@ static inline void x86_topo_ids_from_idx(unsigned nr_dies,
> * based on APIC ID
> */
> static inline void x86_topo_ids_from_apicid(apic_id_t apicid,
> - unsigned nr_dies,
> - unsigned nr_cores,
> - unsigned nr_threads,
> + X86CPUTopoInfo *topo_info,
> X86CPUTopoIDs *topo_ids)
> {
> + unsigned nr_dies = topo_info->dies_per_pkg;
> + unsigned nr_cores = topo_info->cores_per_die;
> + unsigned nr_threads = topo_info->threads_per_core;
> +
> topo_ids->smt_id = apicid &
> ~(0xFFFFFFFFUL << apicid_smt_width(nr_dies, nr_cores, nr_threads));
> topo_ids->core_id =
> @@ -169,14 +181,12 @@ static inline void x86_topo_ids_from_apicid(apic_id_t apicid,
> *
> * 'cpu_index' is a sequential, contiguous ID for the CPU.
> */
> -static inline apic_id_t x86_apicid_from_cpu_idx(unsigned nr_dies,
> - unsigned nr_cores,
> - unsigned nr_threads,
> +static inline apic_id_t x86_apicid_from_cpu_idx(X86CPUTopoInfo *topo_info,
> unsigned cpu_index)
> {
> X86CPUTopoIDs topo_ids;
> - x86_topo_ids_from_idx(nr_dies, nr_cores, nr_threads, cpu_index, &topo_ids);
> - return apicid_from_topo_ids(nr_dies, nr_cores, nr_threads, &topo_ids);
> + x86_topo_ids_from_idx(topo_info, cpu_index, &topo_ids);
> + return apicid_from_topo_ids(topo_info, &topo_ids);
> }
>
> #endif /* HW_I386_TOPOLOGY_H */
>
>
next prev parent reply other threads:[~2020-01-28 15:46 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-04 0:36 [PATCH v3 00/18] APIC ID fixes for AMD EPYC CPU models Babu Moger
2019-12-04 0:37 ` [PATCH v3 01/18] hw/i386: Rename X86CPUTopoInfo structure to X86CPUTopoIDs Babu Moger
2020-02-03 15:08 ` Igor Mammedov
2020-02-03 18:25 ` Babu Moger
2019-12-04 0:37 ` [PATCH v3 02/18] hw/i386: Introduce X86CPUTopoInfo to contain topology info Babu Moger
2020-01-28 15:44 ` Igor Mammedov [this message]
2019-12-04 0:37 ` [PATCH v3 03/18] hw/i386: Consolidate topology functions Babu Moger
2020-01-28 15:46 ` Igor Mammedov
2019-12-04 0:37 ` [PATCH v3 04/18] hw/i386: Introduce initialize_topo_info to initialize X86CPUTopoInfo Babu Moger
2020-01-28 15:49 ` Igor Mammedov
2020-01-28 16:42 ` Babu Moger
2019-12-04 0:37 ` [PATCH v3 05/18] machine: Add SMP Sockets in CpuTopology Babu Moger
2019-12-04 0:37 ` [PATCH v3 06/18] hw/core: Add core complex id in X86CPU topology Babu Moger
2020-01-28 16:27 ` Igor Mammedov
2020-01-28 16:44 ` Babu Moger
2020-01-28 16:31 ` Eric Blake
2020-01-28 16:44 ` Babu Moger
2019-12-04 0:37 ` [PATCH v3 07/18] machine: Add a new function init_apicid_fn in MachineClass Babu Moger
2020-01-28 16:29 ` Igor Mammedov
2020-01-28 19:45 ` Babu Moger
2020-01-28 20:12 ` Eduardo Habkost
2020-01-29 9:14 ` Igor Mammedov
2020-01-29 16:17 ` Babu Moger
2020-02-03 15:17 ` Igor Mammedov
2020-02-03 21:49 ` Babu Moger
2020-02-04 7:38 ` Igor Mammedov
2020-01-29 16:32 ` Babu Moger
2020-01-29 16:51 ` Eduardo Habkost
2020-01-29 17:05 ` Babu Moger
2019-12-04 0:37 ` [PATCH v3 08/18] hw/i386: Update structures for nodes_per_pkg Babu Moger
2019-12-04 0:37 ` [PATCH v3 09/18] i386: Add CPUX86Family type in CPUX86State Babu Moger
2019-12-04 0:38 ` [PATCH v3 10/18] hw/386: Add EPYC mode topology decoding functions Babu Moger
2019-12-04 0:38 ` [PATCH v3 11/18] i386: Cleanup and use the EPYC mode topology functions Babu Moger
2019-12-04 0:38 ` [PATCH v3 12/18] numa: Split the numa initialization Babu Moger
2019-12-04 0:38 ` [PATCH v3 13/18] hw/i386: Introduce apicid_from_cpu_idx in PCMachineState Babu Moger
2019-12-04 0:38 ` [PATCH v3 14/18] hw/i386: Introduce topo_ids_from_apicid handler PCMachineState Babu Moger
2019-12-04 0:38 ` [PATCH v3 15/18] hw/i386: Introduce apic_id_from_topo_ids handler in PCMachineState Babu Moger
2019-12-04 0:38 ` [PATCH v3 16/18] hw/i386: Introduce EPYC mode function handlers Babu Moger
2020-01-28 20:04 ` Eduardo Habkost
2020-01-28 21:48 ` Babu Moger
2020-01-29 16:41 ` Eduardo Habkost
2019-12-04 0:38 ` [PATCH v3 17/18] i386: Fix pkg_id offset for epyc mode Babu Moger
2019-12-04 0:39 ` [PATCH v3 18/18] tests: Update the Unit tests Babu Moger
2020-02-03 14:59 ` [PATCH v3 00/18] APIC ID fixes for AMD EPYC CPU models Igor Mammedov
2020-02-03 19:31 ` Babu Moger
2020-02-04 8:02 ` Igor Mammedov
2020-02-04 19:08 ` Babu Moger
2020-02-05 9:38 ` Igor Mammedov
2020-02-05 16:10 ` Babu Moger
2020-02-05 16:56 ` Igor Mammedov
2020-02-05 19:07 ` Babu Moger
2020-02-06 13:08 ` Igor Mammedov
2020-02-06 15:32 ` Babu Moger
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