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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id a22sm6994442wmd.20.2020.01.30.08.15.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jan 2020 08:15:35 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 00/26] target-arm queue Date: Thu, 30 Jan 2020 16:15:07 +0000 Message-Id: <20200130161533.8180-1-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" target-arm queue. The big thing here is the landing of the 3-phase reset patches... -- PMM The following changes since commit 204aa60b37c23a89e690d418f49787d274303ca7: Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jan-29-2020' into staging (2020-01-30 14:18:45 +0000) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200130 for you to fetch changes up to dea101a1ae9968c9fec6ab0291489dad7c49f36f: target/arm/cpu: Add the kvm-no-adjvtime CPU property (2020-01-30 16:02:06 +0000) ---------------------------------------------------------------- target-arm queue: * hw/core/or-irq: Fix incorrect assert forbidding num-lines == MAX_OR_LINES * target/arm/arm-semi: Don't let the guest close stdin/stdout/stderr * aspeed: some minor bugfixes * aspeed: add eMMC controller model for AST2600 SoC * hw/arm/raspi: Remove obsolete use of -smp to set the soc 'enabled-cpus' * New 3-phase reset API for device models * hw/intc/arm_gicv3_kvm: Stop wrongly programming GICR_PENDBASER.PTZ bit * Arm KVM: stop/restart the guest counter when the VM is stopped and started ---------------------------------------------------------------- Andrew Jeffery (2): hw/sd: Configure number of slots exposed by the ASPEED SDHCI model hw/arm: ast2600: Wire up the eMMC controller Andrew Jones (6): target/arm/kvm: trivial: Clean up header documentation hw/arm/virt: Add missing 5.0 options call to 4.2 options target/arm/kvm64: kvm64 cpus have timer registers tests/arm-cpu-features: Check feature default values target/arm/kvm: Implement virtual time adjustment target/arm/cpu: Add the kvm-no-adjvtime CPU property Cédric Le Goater (2): ftgmac100: check RX and TX buffer alignment hw/arm/aspeed: add a 'execute-in-place' property to boot directly from CE0 Damien Hedde (11): add device_legacy_reset function to prepare for reset api change hw/core/qdev: add trace events to help with resettable transition hw/core: create Resettable QOM interface hw/core: add Resettable support to BusClass and DeviceClass hw/core/resettable: add support for changing parent hw/core/qdev: handle parent bus change regarding resettable hw/core/qdev: update hotplug reset regarding resettable hw/core: deprecate old reset functions and introduce new ones docs/devel/reset.rst: add doc about Resettable interface vl: replace deprecated qbus_reset_all registration hw/s390x/ipl: replace deprecated qdev_reset_all registration Joel Stanley (1): misc/pca9552: Add qom set and get Peter Maydell (2): hw/core/or-irq: Fix incorrect assert forbidding num-lines == MAX_OR_LINES target/arm/arm-semi: Don't let the guest close stdin/stdout/stderr Philippe Mathieu-Daudé (1): hw/arm/raspi: Remove obsolete use of -smp to set the soc 'enabled-cpus' Zenghui Yu (1): hw/intc/arm_gicv3_kvm: Stop wrongly programming GICR_PENDBASER.PTZ bit hw/core/Makefile.objs | 1 + tests/Makefile.include | 1 + include/hw/arm/aspeed.h | 2 + include/hw/arm/aspeed_soc.h | 2 + include/hw/arm/virt.h | 1 + include/hw/qdev-core.h | 58 +++++++- include/hw/resettable.h | 247 +++++++++++++++++++++++++++++++++ include/hw/sd/aspeed_sdhci.h | 1 + target/arm/cpu.h | 7 + target/arm/kvm_arm.h | 95 ++++++++++--- hw/arm/aspeed.c | 72 ++++++++-- hw/arm/aspeed_ast2600.c | 31 ++++- hw/arm/aspeed_soc.c | 2 + hw/arm/raspi.c | 2 - hw/arm/virt.c | 9 ++ hw/audio/intel-hda.c | 2 +- hw/core/bus.c | 102 ++++++++++++++ hw/core/or-irq.c | 2 +- hw/core/qdev.c | 160 ++++++++++++++++++++-- hw/core/resettable.c | 301 +++++++++++++++++++++++++++++++++++++++++ hw/hyperv/hyperv.c | 2 +- hw/i386/microvm.c | 2 +- hw/i386/pc.c | 2 +- hw/ide/microdrive.c | 8 +- hw/intc/arm_gicv3_kvm.c | 11 +- hw/intc/spapr_xive.c | 2 +- hw/misc/pca9552.c | 90 ++++++++++++ hw/net/ftgmac100.c | 13 ++ hw/ppc/pnv_psi.c | 4 +- hw/ppc/spapr_pci.c | 2 +- hw/ppc/spapr_vio.c | 2 +- hw/s390x/ipl.c | 10 +- hw/s390x/s390-pci-inst.c | 2 +- hw/scsi/vmw_pvscsi.c | 2 +- hw/sd/aspeed_sdhci.c | 11 +- hw/sd/omap_mmc.c | 2 +- hw/sd/pl181.c | 2 +- target/arm/arm-semi.c | 9 ++ target/arm/cpu.c | 2 + target/arm/cpu64.c | 1 + target/arm/kvm.c | 120 ++++++++++++++++ target/arm/kvm32.c | 3 + target/arm/kvm64.c | 4 + target/arm/machine.c | 7 + target/arm/monitor.c | 1 + tests/qtest/arm-cpu-features.c | 41 ++++-- vl.c | 10 +- docs/arm-cpu-features.rst | 37 ++++- docs/devel/index.rst | 1 + docs/devel/reset.rst | 289 +++++++++++++++++++++++++++++++++++++++ hw/core/trace-events | 27 ++++ 51 files changed, 1727 insertions(+), 90 deletions(-) create mode 100644 include/hw/resettable.h create mode 100644 hw/core/resettable.c create mode 100644 docs/devel/reset.rst