[NOTFORMERGE PATCH 0/2] hw/arm/raspi: Add the Raspberry Pi Zero machine

[NOTFORMERGE PATCH 0/2] hw/arm/raspi: Add the Raspberry Pi Zero machine

[Philippe Mathieu-Daudé]

Sharing these two patches to justify the refactor of previous
series [1]. It shows how easily we can add the raspi0 machine.

[1] https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg00226.html
"hw/arm/raspi: Dynamically create machines based on the board"
Based-on: <20200203082619.7426-1-f4bug@amsat.org>

Philippe Mathieu-Daudé (2):
  RFC hw/arm: Add the BCM2835 SoC
  RFC: hw/arm/raspi: Add the Raspberry Pi Zero machine

 include/hw/arm/bcm2836.h |  1 +
 hw/arm/bcm2836.c         | 35 +++++++++++++++++++++++++++++++----
 hw/arm/raspi.c           |  7 +++++++
 3 files changed, 39 insertions(+), 4 deletions(-)

-- 
2.21.1

[NOTFORMERGE PATCH 1/2] hw/arm: Add the BCM2835 SoC

[Philippe Mathieu-Daudé]

Add the BCM2835 SoC, which uses a ARM1176JZF-S core.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
TODO: better QOM modelling of core_count and intc

 include/hw/arm/bcm2836.h |  1 +
 hw/arm/bcm2836.c         | 35 +++++++++++++++++++++++++++++++----
 2 files changed, 32 insertions(+), 4 deletions(-)

diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
index 92a6544816..5c3f8958ef 100644
--- a/include/hw/arm/bcm2836.h
+++ b/include/hw/arm/bcm2836.h
@@ -24,6 +24,7 @@
  * them, code using these devices should always handle them via the
  * BCM283x base class, so they have no BCM2836(obj) etc macros.
  */
+#define TYPE_BCM2835 "bcm2835"
 #define TYPE_BCM2836 "bcm2836"
 #define TYPE_BCM2837 "bcm2837"
 
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 38e2941bab..e4a89f0381 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -21,13 +21,21 @@ struct BCM283XInfo {
     const char *cpu_type;
     hwaddr peri_base; /* Peripheral base address seen by the CPU */
     hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
+    int core_count;
     int clusterid;
 };
 
 static const BCM283XInfo bcm283x_socs[] = {
+    {
+        .name = TYPE_BCM2835,
+        .cpu_type = ARM_CPU_TYPE_NAME("arm1176"),
+        .core_count = 1,
+        .peri_base = 0x20000000,
+    },
     {
         .name = TYPE_BCM2836,
         .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),
+        .core_count = 4,
         .peri_base = 0x3f000000,
         .ctrl_base = 0x40000000,
         .clusterid = 0xf,
@@ -36,6 +44,7 @@ static const BCM283XInfo bcm283x_socs[] = {
     {
         .name = TYPE_BCM2837,
         .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"),
+        .core_count = 4,
         .peri_base = 0x3f000000,
         .ctrl_base = 0x40000000,
         .clusterid = 0x0,
@@ -50,14 +59,16 @@ static void bcm2836_init(Object *obj)
     const BCM283XInfo *info = bc->info;
     int n;
 
-    for (n = 0; n < BCM283X_NCPUS; n++) {
+    for (n = 0; n < info->core_count; n++) {
         object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
                                 sizeof(s->cpu[n].core), info->cpu_type,
                                 &error_abort, NULL);
     }
 
-    sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
-                          TYPE_BCM2836_CONTROL);
+    if (info->ctrl_base) {
+        sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
+                              TYPE_BCM2836_CONTROL);
+    }
 
     sysbus_init_child_obj(obj, "peripherals", &s->peripherals,
                           sizeof(s->peripherals), TYPE_BCM2835_PERIPHERALS);
@@ -107,6 +118,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
     sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
                             info->peri_base, 1);
 
+    if (info->ctrl_base) {
     /* bcm2836 interrupt controller (and mailboxes, etc.) */
     object_property_set_bool(OBJECT(&s->control), true, "realized", &err);
     if (err) {
@@ -120,8 +132,22 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
+    }
 
-    for (n = 0; n < BCM283X_NCPUS; n++) {
+    if (!info->ctrl_base) {
+        object_property_set_bool(OBJECT(&s->cpu[0].core), true,
+                                 "realized", &err);
+        if (err) {
+            error_propagate(errp, err);
+            return;
+        }
+        /* Connect irq/fiq outputs from the interrupt controller. */
+        sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
+                qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_IRQ));
+        sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
+                qdev_get_gpio_in(DEVICE(&s->cpu[0].core), ARM_CPU_FIQ));
+    } else {
+    for (n = 0; n < info->core_count; n++) {
         /* TODO: this should be converted to a property of ARM_CPU */
         s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
 
@@ -165,6 +191,7 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC,
                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
     }
+    }
 }
 
 static Property bcm2836_props[] = {
-- 
2.21.1

[NOTFORMERGE PATCH 2/2] RFC: hw/arm/raspi: Add the Raspberry Pi Zero machine

[Philippe Mathieu-Daudé]

Add a Raspberry Pi Zero machine.

  $ qemu-system-arm -M raspi0 -serial stdio \
      -kernel raspberrypi/firmware/boot/kernel.img \
      -dtb raspberrypi/firmware/boot/bcm2708-rpi-zero-w.dtb \
      -append 'printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0'
  [    0.000000] Booting Linux on physical CPU 0x0
  [    0.000000] Linux version 4.19.69+ (dom@buildbot) (gcc version 4.9.3 (crosstool-NG crosstool-ng-1.22.0-88-g8460611)) #1261 Tue Sep 3 20:21:01 BST 2019
  [    0.000000] CPU: ARMv6-compatible processor [410fb767] revision 7 (ARMv7), cr=00c5387d
  [    0.000000] CPU: VIPT aliasing data cache, unknown instruction cache
  [    0.000000] OF: fdt: Machine model: Raspberry Pi Zero W
  [    0.000000] earlycon: pl11 at MMIO 0x20201000 (options '')
  [    0.000000] bootconsole [pl11] enabled
  [    0.000000] Memory policy: Data cache writeback
  [    0.000000] cma: Reserved 8 MiB at 0x1b800000
  [    0.000000] random: get_random_bytes called from start_kernel+0x8c/0x49c with crng_init=0
  [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 113680
  [    0.000000] Kernel command line: printk.time=0 earlycon=pl011,0x20201000 console=ttyAMA0 root=/dev/mmcblk0 rootwait
  Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
  Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
  Memory: 434380K/458752K available (6971K kernel code, 635K rwdata, 2080K rodata, 464K init, 797K bss, 16180K reserved, 8192K cma-reserved)
  Virtual kernel memory layout:
      vector  : 0xffff0000 - 0xffff1000   (   4 kB)
      fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
      vmalloc : 0xdc800000 - 0xff800000   ( 560 MB)
      lowmem  : 0xc0000000 - 0xdc000000   ( 448 MB)
      modules : 0xbf000000 - 0xc0000000   (  16 MB)
        .text : 0x(ptrval) - 0x(ptrval)   (6973 kB)
        .init : 0x(ptrval) - 0x(ptrval)   ( 464 kB)
        .data : 0x(ptrval) - 0x(ptrval)   ( 636 kB)
         .bss : 0x(ptrval) - 0x(ptrval)   ( 798 kB)
  SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
  ftrace: allocating 25193 entries in 74 pages
  NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
  sched_clock: 32 bits at 1000kHz, resolution 1000ns, wraps every 2147483647500ns
  clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275 ns
  bcm2835: system timer (irq = 27)
  Console: colour dummy device 80x30
  ...

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
TODO: Add acceptance test

 hw/arm/raspi.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index aff5d57261..f2496a5590 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -33,6 +33,7 @@
 #define MACH_TYPE_BCM2708   3138 /* Linux board IDs */
 
 enum BoardIdChip {
+    C_BCM2835 = 0,
     C_BCM2836 = 1,
     C_BCM2837 = 2,
 };
@@ -41,6 +42,7 @@ static const struct {
     const char *soc_name;
     int cores_count;
 } soc_config[] = {
+    [C_BCM2835] = {TYPE_BCM2835, 1},
     [C_BCM2836] = {TYPE_BCM2836, BCM283X_NCPUS},
     [C_BCM2837] = {TYPE_BCM2837, BCM283X_NCPUS},
 };
@@ -80,6 +82,11 @@ typedef struct RaspiMachineClass {
      OBJECT_GET_CLASS(RaspiMachineClass, (obj), TYPE_RASPI_MACHINE)
 
 static const RaspiBoardInfo raspi_boards[] = {
+    {
+        .name = MACHINE_TYPE_NAME("raspi0"),
+        .desc = "Raspberry Pi Zero W",
+        .board_rev = 0x9000c1,
+    },
     {
         .name = MACHINE_TYPE_NAME("raspi2"),
         .desc = "Raspberry Pi 2B",
-- 
2.21.1