Re: [PULL 19/35] ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridge

[Greg Kurz <groug@kaod.org>]

On Wed, 5 Feb 2020 14:26:41 +0100
Laurent Vivier <lvivier@redhat.com> wrote:

> On 03/02/2020 07:11, David Gibson wrote:
> > From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > 
> > These changes introduces models for the PCIe Host Bridge (PHB4) of the
> > POWER9 processor. It includes the PowerBus logic interface (PBCQ),
> > IOMMU support, a single PCIe Gen.4 Root Complex, and support for MSI
> > and LSI interrupt sources as found on a POWER9 system using the XIVE
> > interrupt controller.
> > 
> > POWER9 processor comes with 3 PHB4 PEC (PCI Express Controller) and
> > each PEC can have several PHBs. By default,
> > 
> >   * PEC0 provides 1 PHB  (PHB0)
> >   * PEC1 provides 2 PHBs (PHB1 and PHB2)
> >   * PEC2 provides 3 PHBs (PHB3, PHB4 and PHB5)
> > 
> > Each PEC has a set  "global" registers and some "per-stack" (per-PHB)
> > registers. Those are organized in two XSCOM ranges, the "Nest" range
> > and the "PCI" range, each range contains both some "PEC" registers and
> > some "per-stack" registers.
> > 
> > No default device layout is provided and PCI devices can be added on
> > any of the available PCIe Root Port (pcie.0 .. 2 of a Power9 chip)
> > with address 0x0 as the firwware (skiboot) only accepts a single
> > device per root port. To run a simple system with a network and a
> > storage adapters, use a command line options such as :
> > 
> >   -device e1000e,netdev=net0,mac=C0:FF:EE:00:00:02,bus=pcie.0,addr=0x0
> >   -netdev bridge,id=net0,helper=/usr/libexec/qemu-bridge-helper,br=virbr0,id=hostnet0
> > 
> >   -device megasas,id=scsi0,bus=pcie.1,addr=0x0
> >   -drive file=$disk,if=none,id=drive-scsi0-0-0-0,format=qcow2,cache=none
> >   -device scsi-hd,bus=scsi0.0,channel=0,scsi-id=0,lun=0,drive=drive-scsi0-0-0-0,id=scsi0-0-0-0,bootindex=2
> > 
> > If more are needed, include a bridge.
> > 
> > Multi chip is supported, each chip adding its set of PHB4 controllers
> > and its PCI busses. The model doesn't emulate the EEH error handling.
> > 
> > This model is not ready for hotplug yet.
> > 
> > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > [ clg: - numerous cleanups
> >        - commit log
> >        - fix for broken LSI support
> >        - PHB pic printinfo
> >        - large QOM rework ]
> > Signed-off-by: Cédric Le Goater <clg@kaod.org>
> > Message-Id: <20200127144506.11132-2-clg@kaod.org>
> > [dwg: Use device_class_set_props()]
> > Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> > ---
> >  hw/pci-host/Makefile.objs           |    1 +
> >  hw/pci-host/pnv_phb4.c              | 1438 +++++++++++++++++++++++++++
> >  hw/pci-host/pnv_phb4_pec.c          |  593 +++++++++++
> >  hw/ppc/Kconfig                      |    2 +
> >  hw/ppc/pnv.c                        |  107 ++
> >  include/hw/pci-host/pnv_phb4.h      |  230 +++++
> >  include/hw/pci-host/pnv_phb4_regs.h |  553 ++++++++++
> >  include/hw/pci/pcie_port.h          |    1 +
> >  include/hw/ppc/pnv.h                |    7 +
> >  include/hw/ppc/pnv_xscom.h          |   11 +
> >  10 files changed, 2943 insertions(+)
> >  create mode 100644 hw/pci-host/pnv_phb4.c
> >  create mode 100644 hw/pci-host/pnv_phb4_pec.c
> >  create mode 100644 include/hw/pci-host/pnv_phb4.h
> >  create mode 100644 include/hw/pci-host/pnv_phb4_regs.h
> > 
> ...
> > diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
> > index e27efe9a24..354828bf13 100644
> > --- a/hw/ppc/Kconfig
> > +++ b/hw/ppc/Kconfig
> > @@ -135,6 +135,8 @@ config XIVE_SPAPR
> >      default y
> >      depends on PSERIES
> >      select XIVE
> > +    select PCI
> > +    select PCIE_PORT
> 
> This patch is about PowerNV, why do we add dependencies for pseries
> configuration?
> 

This looks like an error. These should rather be added to config POWERNV
I guess.

> Thanks,
> Laurent
>