From: Igor Mammedov <imammedo@redhat.com>
To: Tao Xu <tao3.xu@intel.com>
Cc: qemu-devel@nongnu.org, pbonzini@redhat.com, ehabkost@redhat.com,
rth@twiddle.net
Subject: Re: [PATCH v3 4/4] target/i386: Add notes for versioned CPU models
Date: Wed, 12 Feb 2020 10:00:07 +0100 [thread overview]
Message-ID: <20200212100007.08b5b221@redhat.com> (raw)
In-Reply-To: <20200212081328.7385-5-tao3.xu@intel.com>
On Wed, 12 Feb 2020 16:13:28 +0800
Tao Xu <tao3.xu@intel.com> wrote:
> Add which features are added or removed in this version. Remove the
> changed model-id in versioned CPU models, to keep the model name
> unchanged at /proc/cpuinfo inside the VM.
>
> Signed-off-by: Tao Xu <tao3.xu@intel.com>
> ---
>
> Changes in v2:
> - correct the note of Cascadelake v3 (Xiaoyao)
> ---
> target/i386/cpu.c | 54 ++++++++++++++++++++++-------------------------
> 1 file changed, 25 insertions(+), 29 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 81a039beb6..739ef4ce91 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -2278,10 +2278,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "Nehalem-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" },
> { /* end of list */ }
> }
> },
> @@ -2359,10 +2358,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "Westmere-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Westmere E56xx/L56xx/X56xx (IBRS update)" },
> { /* end of list */ }
> }
> },
> @@ -2445,10 +2443,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "SandyBridge-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Xeon E312xx (Sandy Bridge, IBRS update)" },
> { /* end of list */ }
> }
> },
> @@ -2537,10 +2534,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "IvyBridge-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)" },
> { /* end of list */ }
> }
> },
> @@ -2634,17 +2630,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "Haswell-noTSX",
> + .note = "no TSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> { "stepping", "1" },
> - { "model-id", "Intel Core Processor (Haswell, no TSX)", },
> { /* end of list */ }
> },
> },
> {
> .version = 3,
> .alias = "Haswell-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> /* Restore TSX features removed by -v2 above */
> { "hle", "on" },
> @@ -2655,21 +2652,18 @@ static X86CPUDefinition builtin_x86_defs[] = {
> */
> { "stepping", "4" },
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Core Processor (Haswell, IBRS)" },
> { /* end of list */ }
> }
> },
> {
> .version = 4,
> .alias = "Haswell-noTSX-IBRS",
> + .note = "no TSX, IBRS",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> /* spec-ctrl was already enabled by -v3 above */
> { "stepping", "1" },
> - { "model-id",
> - "Intel Core Processor (Haswell, no TSX, IBRS)" },
> { /* end of list */ }
> }
> },
> @@ -2765,35 +2759,33 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "Broadwell-noTSX",
> + .note = "no TSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> - { "model-id", "Intel Core Processor (Broadwell, no TSX)", },
> { /* end of list */ }
> },
> },
> {
> .version = 3,
> .alias = "Broadwell-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> /* Restore TSX features removed by -v2 above */
> { "hle", "on" },
> { "rtm", "on" },
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Core Processor (Broadwell, IBRS)" },
> { /* end of list */ }
> }
> },
> {
> .version = 4,
> .alias = "Broadwell-noTSX-IBRS",
> + .note = "no TSX, IBRS",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> /* spec-ctrl was already enabled by -v3 above */
> - { "model-id",
> - "Intel Core Processor (Broadwell, no TSX, IBRS)" },
> { /* end of list */ }
> }
> },
> @@ -2893,22 +2885,20 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "IBRS",
> .alias = "Skylake-Client-IBRS",
> .props = (PropValue[]) {
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Core Processor (Skylake, IBRS)" },
> { /* end of list */ }
> }
> },
> {
> .version = 3,
> .alias = "Skylake-Client-noTSX-IBRS",
> + .note = "no TSX, IBRS",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> - { "model-id",
> - "Intel Core Processor (Skylake, IBRS, no TSX)" },
> { /* end of list */ }
> }
> },
> @@ -3016,24 +3006,22 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "Skylake-Server-IBRS",
> + .note = "IBRS",
> .props = (PropValue[]) {
> /* clflushopt was not added to Skylake-Server-IBRS */
> /* TODO: add -v3 including clflushopt */
> { "clflushopt", "off" },
> { "spec-ctrl", "on" },
> - { "model-id",
> - "Intel Xeon Processor (Skylake, IBRS)" },
> { /* end of list */ }
> }
> },
> {
> .version = 3,
> .alias = "Skylake-Server-noTSX-IBRS",
> + .note = "no TSX, IBRS",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> - { "model-id",
> - "Intel Xeon Processor (Skylake, IBRS, no TSX)" },
> { /* end of list */ }
> }
> },
> @@ -3142,6 +3130,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> .versions = (X86CPUVersionDefinition[]) {
> { .version = 1 },
> { .version = 2,
> + .note = "ARCH_CAPABILITIES",
what's ARCH_CAPABILITIES?
> .props = (PropValue[]) {
> { "arch-capabilities", "on" },
> { "rdctl-no", "on" },
> @@ -3153,6 +3142,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> },
> { .version = 3,
> .alias = "Cascadelake-Server-noTSX",
> + .note = "ARCH_CAPABILITIES, no TSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> { "rtm", "off" },
> @@ -3374,6 +3364,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no TSX",
> .alias = "Icelake-Client-noTSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> @@ -3491,6 +3482,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no TSX",
> .alias = "Icelake-Server-noTSX",
> .props = (PropValue[]) {
> { "hle", "off" },
> @@ -3598,6 +3590,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no MPX, no MONITOR",
> .props = (PropValue[]) {
> { "monitor", "off" },
> { "mpx", "off" },
> @@ -3727,14 +3720,15 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no MPX",
> .props = (PropValue[]) {
> { "mpx", "off" },
> - { "model-id", "Intel Atom Processor (Snowridge, no MPX)" },
> { /* end of list */ },
> },
> },
> {
> .version = 3,
> + .note = "no MPX, no MONITOR",
> .props = (PropValue[]) {
> /* mpx was already removed by -v2 above */
> { "monitor", "off" },
> @@ -3856,6 +3850,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no MONITOR",
> .props = (PropValue[]) {
> { "monitor", "off" },
> { /* end of list */ },
> @@ -3980,15 +3975,15 @@ static X86CPUDefinition builtin_x86_defs[] = {
> {
> .version = 2,
> .alias = "EPYC-IBPB",
> + .note = "IBPB",
> .props = (PropValue[]) {
> { "ibpb", "on" },
> - { "model-id",
> - "AMD EPYC Processor (with IBPB)" },
> { /* end of list */ }
> }
> },
> {
> .version = 3,
> + .note = "IBPB, no MONITOR",
> .props = (PropValue[]) {
> /* ibpb was already enabled by -v2 above */
> { "monitor", "off" },
> @@ -4051,6 +4046,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> { .version = 1 },
> {
> .version = 2,
> + .note = "no MONITOR",
> .props = (PropValue[]) {
> { "monitor", "off" },
> { /* end of list */ },
next prev parent reply other threads:[~2020-02-12 9:01 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-12 8:13 [PATCH v3 0/4] Add extra information to versioned CPU models Tao Xu
2020-02-12 8:13 ` [PATCH v3 1/4] target/i386: Add Denverton-v2 (no MPX) CPU model Tao Xu
2020-02-28 21:46 ` Eduardo Habkost
2020-02-12 8:13 ` [PATCH v3 2/4] target/i386: Remove monitor from some CPU models Tao Xu
2020-02-28 21:39 ` Eduardo Habkost
2020-03-02 11:47 ` Tao Xu
2020-03-02 17:19 ` Eduardo Habkost
2020-03-03 0:18 ` Tao Xu
2020-02-12 8:13 ` [PATCH v3 3/4] target/i386: Add new property note to versioned " Tao Xu
2020-02-28 21:53 ` Eduardo Habkost
2020-02-12 8:13 ` [PATCH v3 4/4] target/i386: Add notes for " Tao Xu
2020-02-12 9:00 ` Igor Mammedov [this message]
2020-02-13 6:55 ` Tao Xu
2020-02-28 21:52 ` Eduardo Habkost
2020-03-02 12:01 ` Tao Xu
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