From: "Daniel P. Berrangé" <berrange@redhat.com>
To: Yubo Miao <miaoyubo@huawei.com>
Cc: peter.maydell@linaro.org, mst@redhat.com, qemu-devel@nongnu.org,
xiexiangyou@huawei.com, shannon.zhaosl@gmail.com,
imammedo@redhat.com
Subject: Re: [RFC 2/2] pci-expender-bus:Add pcie-root-port to pxb-pcie under arm.
Date: Thu, 13 Feb 2020 13:51:45 +0000 [thread overview]
Message-ID: <20200213135145.GN594756@redhat.com> (raw)
In-Reply-To: <20200213074952.544-3-miaoyubo@huawei.com>
On Thu, Feb 13, 2020 at 03:49:52PM +0800, Yubo Miao wrote:
> From: miaoyubo <miaoyubo@huawei.com>
>
> Since devices could not directly plugged into pxb-pcie, under arm, one
> pcie-root port is plugged into pxb-pcie. Due to the bus for each pxb-pcie
> is defined as 2 in acpi dsdt tables(one for pxb-pcie, one for pcie-root-port),
> only one device could be plugged into one pxb-pcie.
What is the cause of this arm specific requirement for pxb-pcie and
more importantly can be fix it so that we don't need this patch ?
I think it is highly undesirable to have such a per-arch difference
in configuration of the pxb-pcie device. It means any mgmt app
which already supports pxb-pcie will be broken and need to special
case arm.
>
> Signed-off-by: miaoyubo <miaoyubo@huawei.com>
> ---
> hw/pci-bridge/pci_expander_bridge.c | 9 +++++++++
> include/hw/pci/pcie_port.h | 1 +
> 2 files changed, 10 insertions(+)
>
> diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
> index 47aaaf8fd1..3d896dd452 100644
> --- a/hw/pci-bridge/pci_expander_bridge.c
> +++ b/hw/pci-bridge/pci_expander_bridge.c
> @@ -15,6 +15,7 @@
> #include "hw/pci/pci.h"
> #include "hw/pci/pci_bus.h"
> #include "hw/pci/pci_host.h"
> +#include "hw/pci/pcie_port.h"
> #include "hw/qdev-properties.h"
> #include "hw/pci/pci_bridge.h"
> #include "qemu/range.h"
> @@ -233,7 +234,15 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp)
>
> ds = qdev_create(NULL, TYPE_PXB_HOST);
> if (pcie) {
> +#ifdef __aarch64__
> + bus = pci_root_bus_new(ds, "pxb-pcie-internal",
> + NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
> + bds = qdev_create(BUS(bus), "pcie-root-port");
> + bds->id = dev_name;
> + qdev_prop_set_uint8(bds, PCIE_ROOT_PORT_PROP_CHASSIS, pxb->bus_nr);
> +#else
> bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
> +#endif
> } else {
> bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
> bds = qdev_create(BUS(bus), "pci-bridge");
> diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
> index 4b3d254b08..b41d473220 100644
> --- a/include/hw/pci/pcie_port.h
> +++ b/include/hw/pci/pcie_port.h
> @@ -64,6 +64,7 @@ int pcie_chassis_add_slot(struct PCIESlot *slot);
> void pcie_chassis_del_slot(PCIESlot *s);
>
> #define TYPE_PCIE_ROOT_PORT "pcie-root-port-base"
> +#define PCIE_ROOT_PORT_PROP_CHASSIS "chassis"
> #define PCIE_ROOT_PORT_CLASS(klass) \
> OBJECT_CLASS_CHECK(PCIERootPortClass, (klass), TYPE_PCIE_ROOT_PORT)
> #define PCIE_ROOT_PORT_GET_CLASS(obj) \
> --
> 2.19.1
>
>
>
Regards,
Daniel
--
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next prev parent reply other threads:[~2020-02-13 13:53 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-13 7:49 [RFC 0/2] pci_expander_brdige:acpi:Support pxb-pcie for ARM Yubo Miao
2020-02-13 7:49 ` [RFC 1/2] arm: acpi: pci-expender-bus: Make arm to support PXB-PCIE Yubo Miao
2020-02-13 10:23 ` Michael S. Tsirkin
2020-02-14 7:28 ` miaoyubo
2020-02-13 7:49 ` [RFC 2/2] pci-expender-bus:Add pcie-root-port to pxb-pcie under arm Yubo Miao
2020-02-13 10:17 ` Michael S. Tsirkin
2020-02-14 7:30 ` miaoyubo
2020-02-13 13:51 ` Daniel P. Berrangé [this message]
2020-02-14 7:25 ` miaoyubo
2020-02-14 10:24 ` Daniel P. Berrangé
2020-02-15 8:59 ` miaoyubo
2020-02-24 12:36 ` Daniel P. Berrangé
2020-02-25 1:54 ` miaoyubo
2020-02-13 16:06 ` [RFC 0/2] pci_expander_brdige:acpi:Support pxb-pcie for ARM no-reply
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