From: Anup Patel <anup.patel@wdc.com>
To: Peter Maydell <peter.maydell@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Atish Patra <atish.patra@wdc.com>,
Anup Patel <anup.patel@wdc.com>,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
Anup Patel <anup@brainfault.org>
Subject: [PATCH 0/3] RISC-V Spike machine improvements
Date: Fri, 14 Feb 2020 12:51:24 +0530 [thread overview]
Message-ID: <20200214072127.64330-1-anup.patel@wdc.com> (raw)
This series improves QEMU Spike machine to:
1. Allow loading OpenBI firmware using -bios option
2. Allow more than one CPUs
Anup Patel (3):
hw/riscv: Add optional symbol callback ptr to riscv_load_firmware()
hw/riscv/spike: Allow loading firmware separately using -bios option
hw/riscv/spike: Allow more than one CPUs
hw/riscv/boot.c | 13 ++++++++-----
hw/riscv/sifive_u.c | 2 +-
hw/riscv/spike.c | 26 ++++++++++++++++++++++++--
hw/riscv/virt.c | 2 +-
include/hw/riscv/boot.h | 6 ++++--
5 files changed, 38 insertions(+), 11 deletions(-)
--
2.17.1
next reply other threads:[~2020-02-14 7:23 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-14 7:21 Anup Patel [this message]
2020-02-14 7:21 ` [PATCH 1/3] hw/riscv: Add optional symbol callback ptr to riscv_load_firmware() Anup Patel
2020-02-21 19:48 ` Alistair Francis
2020-02-14 7:21 ` [PATCH 2/3] hw/riscv/spike: Allow loading firmware separately using -bios option Anup Patel
2020-02-21 19:49 ` Alistair Francis
2020-02-14 7:21 ` [PATCH 3/3] hw/riscv/spike: Allow more than one CPUs Anup Patel
2020-02-14 20:42 ` Alistair Francis
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