From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Andrew Baumann" <Andrew.Baumann@microsoft.com>,
qemu-arm@nongnu.org, "Igor Mammedov" <imammedo@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PATCH 08/12] hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs
Date: Sat, 15 Feb 2020 20:15:39 +0100 [thread overview]
Message-ID: <20200215191543.3235-9-f4bug@amsat.org> (raw)
In-Reply-To: <20200215191543.3235-1-f4bug@amsat.org>
It makes no sense to set enabled-cpus=0 on single core SoCs.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/bcm2836.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 3b95ad11e9..caaa4b625e 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -32,6 +32,9 @@ typedef struct BCM283XClass {
#define BCM283X_GET_CLASS(obj) \
OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X)
+static Property bcm2836_enabled_cores_property =
+ DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus, 0);
+
static void bcm2836_init(Object *obj)
{
BCM283XState *s = BCM283X(obj);
@@ -43,6 +46,10 @@ static void bcm2836_init(Object *obj)
sizeof(s->cpu[n].core), bc->cpu_type,
&error_abort, NULL);
}
+ if (bc->core_count) {
+ qdev_property_add_static(DEVICE(obj), &bcm2836_enabled_cores_property);
+ qdev_prop_set_uint32(DEVICE(obj), "enabled-cpus", bc->core_count);
+ }
sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
TYPE_BCM2836_CONTROL);
@@ -154,12 +161,6 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
}
}
-static Property bcm2836_props[] = {
- DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus,
- BCM283X_NCPUS),
- DEFINE_PROP_END_OF_LIST()
-};
-
static void bcm283x_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -179,7 +180,6 @@ static void bcm2836_class_init(ObjectClass *oc, void *data)
bc->ctrl_base = 0x40000000;
bc->clusterid = 0xf;
dc->realize = bcm2836_realize;
- device_class_set_props(dc, bcm2836_props);
};
#ifdef TARGET_AARCH64
@@ -194,7 +194,6 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
bc->ctrl_base = 0x40000000;
bc->clusterid = 0x0;
dc->realize = bcm2836_realize;
- device_class_set_props(dc, bcm2836_props);
};
#endif
--
2.21.1
next prev parent reply other threads:[~2020-02-15 19:18 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-15 19:15 [PATCH 00/12] hw/arm: Add raspi0 and raspi1 machines Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 01/12] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2 Philippe Mathieu-Daudé
2020-02-16 2:16 ` Richard Henderson
2020-02-15 19:15 ` [PATCH 02/12] hw/arm/raspi: Avoid using TypeInfo::class_data pointer Philippe Mathieu-Daudé
2020-02-16 2:19 ` Richard Henderson
2020-02-15 19:15 ` [PATCH 03/12] hw/arm/raspi: Introduce RaspiProcessorId enum Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 04/12] hw/arm/raspi: Remove use of the 'version' value in the board code Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 05/12] hw/arm/bcm2836: Restrict BCM283XClass declaration to C source Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 06/12] hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 07/12] hw/arm/bcm2836: Introduce BCM283XClass::core_count Philippe Mathieu-Daudé
2020-02-15 19:15 ` Philippe Mathieu-Daudé [this message]
2020-02-15 19:15 ` [PATCH 09/12] hw/arm/bcm2836: Split out common realize() code Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 10/12] hw/arm/bcm2836: Introduce the BCM2835 SoC Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 11/12] hw/arm/raspi: Add the Raspberry Pi B+ machine Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 12/12] hw/arm/raspi: Add the Raspberry Pi Zero machine Philippe Mathieu-Daudé
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