From: Vitaly Kuznetsov <vkuznets@redhat.com>
To: qemu-devel@nongnu.org
Cc: Eduardo Habkost <ehabkost@redhat.com>,
kvm@vger.kernel.org, Marcelo Tosatti <mtosatti@redhat.com>,
Liran Alon <liran.alon@oracle.com>,
Roman Kagan <rkagan@virtuozzo.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>
Subject: [PATCH RFC] target/i386: filter out VMX_PIN_BASED_POSTED_INTR when enabling SynIC
Date: Tue, 18 Feb 2020 15:44:15 +0100 [thread overview]
Message-ID: <20200218144415.94722-1-vkuznets@redhat.com> (raw)
When a multi-vCPU guest is created with hv_synic, secondary vCPUs fail
to initialize with
qemu-system-x86_64: error: failed to set MSR 0x48d to 0xff00000016
This is caused by SynIC enablement on the boot CPU: when we do this
KVM disables apicv for the whole guest so we can't set
VMX_PIN_BASED_POSTED_INTR bit in MSR_IA32_VMX_TRUE_PINBASED_CTLS anymore.
(see nested_vmx_setup_ctls_msrs() in KVM).
This used to work before fine-grained VMX feature enablement because
we were not setting VMX MSRs.
Fix the issue by filtering out VMX_PIN_BASED_POSTED_INTR when enabling
SynIC. We also need to re-order kvm_init_msrs() with hyperv_init_vcpu()
so filtering on secondary CPUs happens before.
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
---
RFC: This is somewhat similar to eVMCS breakage and it is likely possible
to fix this in KVM. I decided to try QEMU first as this is a single
control and unlike eVMCS we don't need to keep a list of things to disable.
---
target/i386/kvm.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 69eb43d796e6..6829b597fdbf 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -1366,6 +1366,7 @@ static Error *hv_no_nonarch_cs_mig_blocker;
static int hyperv_init_vcpu(X86CPU *cpu)
{
CPUState *cs = CPU(cpu);
+ CPUX86State *env = &cpu->env;
Error *local_err = NULL;
int ret;
@@ -1431,6 +1432,9 @@ static int hyperv_init_vcpu(X86CPU *cpu)
return ret;
}
+ /* When SynIC is enabled, APICv controls become unavailable */
+ env->features[FEAT_VMX_PINBASED_CTLS] &= ~VMX_PIN_BASED_POSTED_INTR;
+
if (!cpu->hyperv_synic_kvm_only) {
ret = hyperv_x86_synic_add(cpu);
if (ret < 0) {
@@ -1845,13 +1849,13 @@ int kvm_arch_init_vcpu(CPUState *cs)
has_msr_tsc_aux = false;
}
- kvm_init_msrs(cpu);
-
r = hyperv_init_vcpu(cpu);
if (r) {
goto fail;
}
+ kvm_init_msrs(cpu);
+
return 0;
fail:
--
2.24.1
next reply other threads:[~2020-02-18 14:46 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-18 14:44 Vitaly Kuznetsov [this message]
2020-02-18 16:13 ` [PATCH RFC] target/i386: filter out VMX_PIN_BASED_POSTED_INTR when enabling SynIC Paolo Bonzini
2020-02-18 17:08 ` Vitaly Kuznetsov
2020-02-18 17:47 ` Paolo Bonzini
2020-02-19 9:54 ` Vitaly Kuznetsov
2020-02-18 16:56 ` no-reply
2020-02-18 17:14 ` Vitaly Kuznetsov
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