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From: Igor Mammedov <imammedo@redhat.com>
To: Babu Moger <babu.moger@amd.com>
Cc: ehabkost@redhat.com, mst@redhat.com, qemu-devel@nongnu.org,
	pbonzini@redhat.com, rth@twiddle.net
Subject: Re: [PATCH v4 08/16] hw/386: Add EPYC mode topology decoding functions
Date: Mon, 24 Feb 2020 09:50:21 +0100	[thread overview]
Message-ID: <20200224095021.78472314@redhat.com> (raw)
In-Reply-To: <158161783872.48948.1827981450074223928.stgit@naples-babu.amd.com>

On Thu, 13 Feb 2020 12:17:18 -0600
Babu Moger <babu.moger@amd.com> wrote:

> These functions add support for building EPYC mode topology given the smp
> details like numa nodes, cores, threads and sockets.
> 
> The new apic id decoding is mostly similar to current apic id decoding
> except that it adds a new field llc_id when numa configured. Removes all

llc_id/nodes_per_pkg

> the hardcoded values. Subsequent patches will use these functions to build
> the topology.
> 
> Following functions are added.
> apicid_llc_width_epyc
> apicid_llc_offset_epyc
> apicid_pkg_offset_epyc
> apicid_from_topo_ids_epyc
> x86_topo_ids_from_idx_epyc
> x86_topo_ids_from_apicid_epyc
> x86_apicid_from_cpu_idx_epyc
> 
> The topology details are available in Processor Programming Reference (PPR)
> for AMD Family 17h Model 01h, Revision B1 Processors.
> https://www.amd.com/system/files/TechDocs/55570-B1_PUB.zip

also checkpatch doesn't like this patch for too long strings.
with that fixed
  Acked-by: Igor Mammedov <imammedo@redhat.com>


PS:
similar checkpatch warnings should be fixed in preceding patches


> 
> Signed-off-by: Babu Moger <babu.moger@amd.com>
> ---
>  include/hw/i386/topology.h |   93 ++++++++++++++++++++++++++++++++++++++++++++
>  include/hw/i386/x86.h      |    1 
>  2 files changed, 94 insertions(+)
> 
> diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h
> index 3158157430..d9319dc2ac 100644
> --- a/include/hw/i386/topology.h
> +++ b/include/hw/i386/topology.h
> @@ -83,6 +83,11 @@ static inline unsigned apicid_die_width(X86CPUTopoInfo *topo_info)
>      return apicid_bitwidth_for_count(topo_info->dies_per_pkg);
>  }
>  
> +/* Bit width of the node_id field per socket */
> +static inline unsigned apicid_node_width_epyc(X86CPUTopoInfo *topo_info)
> +{
> +    return apicid_bitwidth_for_count(MAX(topo_info->nodes_per_pkg, 1));
> +}
>  /* Bit offset of the Core_ID field
>   */
>  static inline unsigned apicid_core_offset(X86CPUTopoInfo *topo_info)
> @@ -103,6 +108,94 @@ static inline unsigned apicid_pkg_offset(X86CPUTopoInfo *topo_info)
>      return apicid_die_offset(topo_info) + apicid_die_width(topo_info);
>  }
>  
> +#define LLC_OFFSET 3 /* Minimum LLC offset if numa configured */
> +
> +/* Bit offset of the node_id field */
> +static inline unsigned apicid_node_offset_epyc(X86CPUTopoInfo *topo_info)
> +{
> +    unsigned offset = apicid_die_offset(topo_info) +
> +                      apicid_die_width(topo_info);
> +
> +    if (topo_info->nodes_per_pkg) {
> +        return MAX(LLC_OFFSET, offset);
> +    } else {
> +        return offset;
> +    }
> +}
> +
> +/* Bit offset of the Pkg_ID (socket ID) field */
> +static inline unsigned apicid_pkg_offset_epyc(X86CPUTopoInfo *topo_info)
> +{
> +    return apicid_node_offset_epyc(topo_info) + apicid_node_width_epyc(topo_info);
> +}
> +
> +/*
> + * Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID
> + *
> + * The caller must make sure core_id < nr_cores and smt_id < nr_threads.
> + */
> +static inline apic_id_t x86_apicid_from_topo_ids_epyc(X86CPUTopoInfo *topo_info,
> +                                                      const X86CPUTopoIDs *topo_ids)
> +{
> +    return (topo_ids->pkg_id  << apicid_pkg_offset_epyc(topo_info)) |
> +           (topo_ids->node_id << apicid_node_offset_epyc(topo_info)) |
> +           (topo_ids->die_id  << apicid_die_offset(topo_info)) |
> +           (topo_ids->core_id << apicid_core_offset(topo_info)) |
> +           topo_ids->smt_id;
> +}
> +
> +static inline void x86_topo_ids_from_idx_epyc(X86CPUTopoInfo *topo_info,
> +                                              unsigned cpu_index,
> +                                              X86CPUTopoIDs *topo_ids)
> +{
> +    unsigned nr_nodes = MAX(topo_info->nodes_per_pkg, 1);
> +    unsigned nr_dies = topo_info->dies_per_pkg;
> +    unsigned nr_cores = topo_info->cores_per_die;
> +    unsigned nr_threads = topo_info->threads_per_core;
> +    unsigned cores_per_node = DIV_ROUND_UP((nr_dies * nr_cores * nr_threads),
> +                                            nr_nodes);
> +
> +    topo_ids->pkg_id = cpu_index / (nr_dies * nr_cores * nr_threads);
> +    topo_ids->node_id = (cpu_index / cores_per_node) % nr_nodes;
> +    topo_ids->die_id = cpu_index / (nr_cores * nr_threads) % nr_dies;
> +    topo_ids->core_id = cpu_index / nr_threads % nr_cores;
> +    topo_ids->smt_id = cpu_index % nr_threads;
> +}
> +
> +/*
> + * Calculate thread/core/package IDs for a specific topology,
> + * based on APIC ID
> + */
> +static inline void x86_topo_ids_from_apicid_epyc(apic_id_t apicid,
> +                                            X86CPUTopoInfo *topo_info,
> +                                            X86CPUTopoIDs *topo_ids)
> +{
> +    topo_ids->smt_id = apicid &
> +            ~(0xFFFFFFFFUL << apicid_smt_width(topo_info));
> +    topo_ids->core_id =
> +            (apicid >> apicid_core_offset(topo_info)) &
> +            ~(0xFFFFFFFFUL << apicid_core_width(topo_info));
> +    topo_ids->die_id =
> +            (apicid >> apicid_die_offset(topo_info)) &
> +            ~(0xFFFFFFFFUL << apicid_die_width(topo_info));
> +    topo_ids->node_id =
> +            (apicid >> apicid_node_offset_epyc(topo_info)) &
> +            ~(0xFFFFFFFFUL << apicid_node_width_epyc(topo_info));
> +    topo_ids->pkg_id = apicid >> apicid_pkg_offset_epyc(topo_info);
> +}
> +
> +/*
> + * Make APIC ID for the CPU 'cpu_index'
> + *
> + * 'cpu_index' is a sequential, contiguous ID for the CPU.
> + */
> +static inline apic_id_t x86_apicid_from_cpu_idx_epyc(X86CPUTopoInfo *topo_info,
> +                                                     unsigned cpu_index)
> +{
> +    X86CPUTopoIDs topo_ids;
> +    x86_topo_ids_from_idx_epyc(topo_info, cpu_index, &topo_ids);
> +    return x86_apicid_from_topo_ids_epyc(topo_info, &topo_ids);
> +}
>  /* Make APIC ID for the CPU based on Pkg_ID, Core_ID, SMT_ID
>   *
>   * The caller must make sure core_id < nr_cores and smt_id < nr_threads.
> diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
> index d76fd0bbb1..38c2d27910 100644
> --- a/include/hw/i386/x86.h
> +++ b/include/hw/i386/x86.h
> @@ -42,6 +42,7 @@ typedef uint32_t apic_id_t;
>  
>  typedef struct X86CPUTopoIDs {
>      unsigned pkg_id;
> +    unsigned node_id;
>      unsigned die_id;
>      unsigned core_id;
>      unsigned smt_id;
> 



  reply	other threads:[~2020-02-24  8:51 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-13 18:16 [PATCH v4 00/16] APIC ID fixes for AMD EPYC CPU model Babu Moger
2020-02-13 18:16 ` [PATCH v4 01/16] hw/i386: Rename X86CPUTopoInfo structure to X86CPUTopoIDs Babu Moger
2020-02-13 18:16 ` [PATCH v4 02/16] hw/i386: Introduce X86CPUTopoInfo to contain topology info Babu Moger
2020-02-13 18:16 ` [PATCH v4 03/16] hw/i386: Consolidate topology functions Babu Moger
2020-02-13 18:16 ` [PATCH v4 04/16] hw/i386: Introduce init_topo_info to initialize X86CPUTopoInfo Babu Moger
2020-02-21 17:05   ` Igor Mammedov
2020-02-21 17:51     ` Babu Moger
2020-02-24  8:18       ` Igor Mammedov
2020-02-24 16:54         ` Babu Moger
2020-02-13 18:16 ` [PATCH v4 05/16] machine: Add SMP Sockets in CpuTopology Babu Moger
2020-02-24  8:37   ` Igor Mammedov
2020-02-13 18:17 ` [PATCH v4 06/16] hw/i386: Update structures for nodes_per_pkg Babu Moger
2020-02-24  8:34   ` Igor Mammedov
2020-02-24 17:12     ` Babu Moger
2020-02-25  7:42       ` Igor Mammedov
2020-02-13 18:17 ` [PATCH v4 07/16] hw/i386: Rename apicid_from_topo_ids to x86_apicid_from_topo_ids Babu Moger
2020-02-20 12:43   ` Igor Mammedov
2020-02-13 18:17 ` [PATCH v4 08/16] hw/386: Add EPYC mode topology decoding functions Babu Moger
2020-02-24  8:50   ` Igor Mammedov [this message]
2020-02-24 17:24     ` Babu Moger
2020-02-13 18:17 ` [PATCH v4 09/16] target/i386: Cleanup and use the EPYC mode topology functions Babu Moger
2020-02-24  8:52   ` Igor Mammedov
2020-02-24 17:29     ` Babu Moger
2020-02-25  7:49       ` Igor Mammedov
2020-02-25 15:10         ` Babu Moger
2020-03-02 17:09         ` Babu Moger
2020-03-03  8:47           ` Igor Mammedov
2020-02-13 18:17 ` [PATCH v4 10/16] hw/i386: Introduce apicid functions inside X86MachineState Babu Moger
2020-02-24 17:01   ` Igor Mammedov
2020-02-24 17:30     ` Babu Moger
2020-02-13 18:17 ` [PATCH v4 11/16] target/i386: Load apicid model specific handlers from X86CPUDefinition Babu Moger
2020-02-13 18:17 ` [PATCH v4 12/16] hw/i386: Use the apicid handlers from X86MachineState Babu Moger
2020-02-24 17:19   ` Igor Mammedov
2020-02-24 17:58     ` Babu Moger
2020-02-24 22:31       ` Eduardo Habkost
2020-02-24 23:13         ` Babu Moger
2020-02-25 15:32           ` Eduardo Habkost
2020-02-25 15:41             ` Babu Moger
2020-02-25  8:16         ` Igor Mammedov
2020-02-25 15:26           ` Eduardo Habkost
2020-02-13 18:17 ` [PATCH v4 13/16] target/i386: Add EPYC model specific handlers Babu Moger
2020-02-13 18:17 ` [PATCH v4 14/16] hw/i386: Move arch_id decode inside x86_cpus_init Babu Moger
2020-02-13 18:18 ` [PATCH v4 15/16] i386: Fix pkg_id offset for EPYC cpu models Babu Moger
2020-02-13 18:18 ` [PATCH v4 16/16] tests: Update the Unit tests Babu Moger

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