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From: Greg Kurz <groug@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: lvivier@redhat.com, Thomas Huth <thuth@redhat.com>,
	Xiao Guangrong <xiaoguangrong.eric@gmail.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	aik@ozlabs.ru, farosas@linux.ibm.com,
	Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
	qemu-devel@nongnu.org, Igor Mammedov <imammedo@redhat.com>,
	qemu-ppc@nongnu.org, clg@kaod.org,
	Paolo Bonzini <pbonzini@redhat.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	paulus@samba.org
Subject: Re: [PATCH v6 07/18] target/ppc: Remove RMOR register from POWER9 & POWER10
Date: Tue, 25 Feb 2020 12:30:42 +0100	[thread overview]
Message-ID: <20200225123042.03ef02b4@bahia.home> (raw)
In-Reply-To: <20200224233724.46415-8-david@gibson.dropbear.id.au>

On Tue, 25 Feb 2020 10:37:13 +1100
David Gibson <david@gibson.dropbear.id.au> wrote:

> Currently we create the Real Mode Offset Register (RMOR) on all Book3S cpus
> from POWER7 onwards.  However the translation mode which the RMOR controls
> is no longer supported in POWER9, and so the register has been removed from
> the architecture.
> 
> Remove it from our model on POWER9 and POWER10.
> 
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> Reviewed-by: Cédric Le Goater <clg@kaod.org>
> ---

Reviewed-by: Greg Kurz <groug@kaod.org>

>  target/ppc/translate_init.inc.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
> index ab79975fec..925bc31ca5 100644
> --- a/target/ppc/translate_init.inc.c
> +++ b/target/ppc/translate_init.inc.c
> @@ -8015,12 +8015,16 @@ static void gen_spr_book3s_ids(CPUPPCState *env)
>                   SPR_NOACCESS, SPR_NOACCESS,
>                   &spr_read_generic, &spr_write_generic,
>                   0x00000000);
> -    spr_register_hv(env, SPR_RMOR, "RMOR",
> +    spr_register_hv(env, SPR_HRMOR, "HRMOR",
>                   SPR_NOACCESS, SPR_NOACCESS,
>                   SPR_NOACCESS, SPR_NOACCESS,
>                   &spr_read_generic, &spr_write_generic,
>                   0x00000000);
> -    spr_register_hv(env, SPR_HRMOR, "HRMOR",
> +}
> +
> +static void gen_spr_rmor(CPUPPCState *env)
> +{
> +    spr_register_hv(env, SPR_RMOR, "RMOR",
>                   SPR_NOACCESS, SPR_NOACCESS,
>                   SPR_NOACCESS, SPR_NOACCESS,
>                   &spr_read_generic, &spr_write_generic,
> @@ -8535,6 +8539,7 @@ static void init_proc_POWER7(CPUPPCState *env)
>  
>      /* POWER7 Specific Registers */
>      gen_spr_book3s_ids(env);
> +    gen_spr_rmor(env);
>      gen_spr_amr(env);
>      gen_spr_book3s_purr(env);
>      gen_spr_power5p_common(env);
> @@ -8676,6 +8681,7 @@ static void init_proc_POWER8(CPUPPCState *env)
>  
>      /* POWER8 Specific Registers */
>      gen_spr_book3s_ids(env);
> +    gen_spr_rmor(env);
>      gen_spr_amr(env);
>      gen_spr_iamr(env);
>      gen_spr_book3s_purr(env);



  reply	other threads:[~2020-02-25 11:32 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-24 23:37 [PATCH v6 00/18] target/ppc: Correct some errors with real mode handling David Gibson
2020-02-24 23:37 ` [PATCH v6 01/18] pseries: Update SLOF firmware image David Gibson
2020-02-24 23:37 ` [PATCH v6 02/18] ppc: Remove stub support for 32-bit hypervisor mode David Gibson
2020-02-25  6:31   ` Greg Kurz
2020-02-24 23:37 ` [PATCH v6 03/18] ppc: Remove stub of PPC970 HID4 implementation David Gibson
2020-02-24 23:37 ` [PATCH v6 04/18] target/ppc: Correct handling of real mode accesses with vhyp on hash MMU David Gibson
2020-02-25 10:29   ` Greg Kurz
2020-02-24 23:37 ` [PATCH v6 05/18] target/ppc: Introduce ppc_hash64_use_vrma() helper David Gibson
2020-02-25  0:12   ` Fabiano Rosas
2020-02-25 10:30   ` Greg Kurz
2020-02-24 23:37 ` [PATCH v6 06/18] spapr, ppc: Remove VPM0/RMLS hacks for POWER9 David Gibson
2020-02-25 11:29   ` Greg Kurz
2020-02-25 15:58     ` Greg Kurz
2020-02-26  1:00       ` David Gibson
2020-02-24 23:37 ` [PATCH v6 07/18] target/ppc: Remove RMOR register from POWER9 & POWER10 David Gibson
2020-02-25 11:30   ` Greg Kurz [this message]
2020-02-24 23:37 ` [PATCH v6 08/18] target/ppc: Use class fields to simplify LPCR masking David Gibson
2020-02-25 15:48   ` Greg Kurz
2020-02-24 23:37 ` [PATCH v6 09/18] target/ppc: Streamline calculation of RMA limit from LPCR[RMLS] David Gibson
2020-02-25 17:05   ` Greg Kurz
2020-02-25 22:47     ` Greg Kurz
2020-02-26  1:04       ` David Gibson
2020-02-26  7:56         ` Greg Kurz
2020-02-27  4:25           ` David Gibson
2020-02-24 23:37 ` [PATCH v6 10/18] target/ppc: Correct RMLS table David Gibson
2020-02-26  8:23   ` Greg Kurz
2020-02-24 23:37 ` [PATCH v6 11/18] target/ppc: Only calculate RMLS derived RMA limit on demand David Gibson
2020-02-26 13:24   ` Greg Kurz
2020-02-27  4:33     ` David Gibson
2020-02-24 23:37 ` [PATCH v6 12/18] target/ppc: Don't store VRMA SLBE persistently David Gibson
2020-02-25  0:25   ` Fabiano Rosas
2020-02-26 13:29   ` Greg Kurz
2020-02-24 23:37 ` [PATCH v6 13/18] spapr: Don't use weird units for MIN_RMA_SLOF David Gibson
2020-02-25  7:49   ` Cédric Le Goater
2020-02-26 13:32   ` Greg Kurz
2020-02-24 23:37 ` [PATCH v6 14/18] spapr,ppc: Simplify signature of kvmppc_rma_size() David Gibson
2020-02-24 23:37 ` [PATCH v6 15/18] spapr: Don't attempt to clamp RMA to VRMA constraint David Gibson
2020-02-24 23:37 ` [PATCH v6 16/18] spapr: Don't clamp RMA to 16GiB on new machine types David Gibson
2020-02-24 23:37 ` [PATCH v6 17/18] spapr: Clean up RMA size calculation David Gibson
2020-02-25 11:07   ` Philippe Mathieu-Daudé
2020-02-26  1:08     ` David Gibson
2020-02-26 13:37   ` Greg Kurz
2020-02-27  6:04     ` David Gibson
2020-02-24 23:37 ` [PATCH v6 18/18] spapr: Fold spapr_node0_size() into its only caller David Gibson
2020-02-26 14:47   ` Greg Kurz

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