From: Chenyi Qiang <chenyi.qiang@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Richard Henderson <rth@twiddle.net>
Cc: Xiaoyao Li <xiaoyao.li@intel.com>, qemu-devel@nongnu.org
Subject: [PATCH 1/3] target/i386: add missing vmx features for several CPU models
Date: Thu, 27 Feb 2020 17:08:06 +0800 [thread overview]
Message-ID: <20200227090808.17686-2-chenyi.qiang@intel.com> (raw)
In-Reply-To: <20200227090808.17686-1-chenyi.qiang@intel.com>
Add some missing VMX features in Skylake-Server, Cascadelake-Server and
Icelake-Server CPU models based on the output of Paolo's script.
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com>
---
target/i386/cpu.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 92fafa2659..4e105029ca 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3007,6 +3007,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
VMX_SECONDARY_EXEC_RDRAND_EXITING | VMX_SECONDARY_EXEC_ENABLE_INVPCID |
VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS |
VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML,
+ .features[FEAT_VMX_VMFUNC] = MSR_VMX_VMFUNC_EPT_SWITCHING,
.xlevel = 0x80000008,
.model_id = "Intel Xeon Processor (Skylake)",
.versions = (X86CPUVersionDefinition[]) {
@@ -3135,6 +3136,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
VMX_SECONDARY_EXEC_RDRAND_EXITING | VMX_SECONDARY_EXEC_ENABLE_INVPCID |
VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS |
VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML,
+ .features[FEAT_VMX_VMFUNC] = MSR_VMX_VMFUNC_EPT_SWITCHING,
.xlevel = 0x80000008,
.model_id = "Intel Xeon Processor (Cascadelake)",
.versions = (X86CPUVersionDefinition[]) {
@@ -3482,7 +3484,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
VMX_SECONDARY_EXEC_APIC_REGISTER_VIRT |
VMX_SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
VMX_SECONDARY_EXEC_RDRAND_EXITING | VMX_SECONDARY_EXEC_ENABLE_INVPCID |
- VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS,
+ VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS |
+ VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML,
+ .features[FEAT_VMX_VMFUNC] = MSR_VMX_VMFUNC_EPT_SWITCHING,
.xlevel = 0x80000008,
.model_id = "Intel Xeon Processor (Icelake)",
.versions = (X86CPUVersionDefinition[]) {
--
2.17.1
next prev parent reply other threads:[~2020-02-27 9:10 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-27 9:08 [PATCH 0/3] Fix Skylake, Cascadelake and Icelake Server CPU models Chenyi Qiang
2020-02-27 9:08 ` Chenyi Qiang [this message]
2020-02-27 9:08 ` [PATCH 2/3] target/i386: add two missing features for Icelake-Server CPU model Chenyi Qiang
2020-02-27 9:08 ` [PATCH 3/3] target/i386: modify Icelake-Client and Icelake-Server CPU model number Chenyi Qiang
2020-02-27 9:48 ` Jack Wang
2020-02-28 0:30 ` Chenyi Qiang
2020-03-18 8:02 ` [PATCH 0/3] Fix Skylake, Cascadelake and Icelake Server CPU models Chenyi Qiang
2020-03-27 7:45 ` Chenyi Qiang
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