From: Chenyi Qiang <chenyi.qiang@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Richard Henderson <rth@twiddle.net>
Cc: Xiaoyao Li <xiaoyao.li@intel.com>, qemu-devel@nongnu.org
Subject: [PATCH 2/3] target/i386: add two missing features for Icelake-Server CPU model
Date: Thu, 27 Feb 2020 17:08:07 +0800 [thread overview]
Message-ID: <20200227090808.17686-3-chenyi.qiang@intel.com> (raw)
In-Reply-To: <20200227090808.17686-1-chenyi.qiang@intel.com>
Add the SHA_NI and AVX512IFMA feature bits in FEAT_7_0_EBX.
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com>
---
target/i386/cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 4e105029ca..c0be0f83b4 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3419,7 +3419,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLWB |
CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ |
CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD |
- CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT,
+ CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT |
+ CPUID_7_0_EBX_SHA_NI | CPUID_7_0_EBX_AVX512IFMA,
.features[FEAT_7_0_ECX] =
CPUID_7_0_ECX_AVX512_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX_PKU |
CPUID_7_0_ECX_AVX512_VBMI2 | CPUID_7_0_ECX_GFNI |
--
2.17.1
next prev parent reply other threads:[~2020-02-27 9:09 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-27 9:08 [PATCH 0/3] Fix Skylake, Cascadelake and Icelake Server CPU models Chenyi Qiang
2020-02-27 9:08 ` [PATCH 1/3] target/i386: add missing vmx features for several " Chenyi Qiang
2020-02-27 9:08 ` Chenyi Qiang [this message]
2020-02-27 9:08 ` [PATCH 3/3] target/i386: modify Icelake-Client and Icelake-Server CPU model number Chenyi Qiang
2020-02-27 9:48 ` Jack Wang
2020-02-28 0:30 ` Chenyi Qiang
2020-03-18 8:02 ` [PATCH 0/3] Fix Skylake, Cascadelake and Icelake Server CPU models Chenyi Qiang
2020-03-27 7:45 ` Chenyi Qiang
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