From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [PATCH v5 02/12] target/arm: Add HCR_EL2 bit definitions from ARMv8.6
Date: Fri, 28 Feb 2020 17:28:01 -0800 [thread overview]
Message-ID: <20200229012811.24129-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200229012811.24129-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 0b84742b66..0ae07a72e4 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1410,6 +1410,7 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask)
#define HCR_TERR (1ULL << 36)
#define HCR_TEA (1ULL << 37)
#define HCR_MIOCNCE (1ULL << 38)
+/* RES0 bit 39 */
#define HCR_APK (1ULL << 40)
#define HCR_API (1ULL << 41)
#define HCR_NV (1ULL << 42)
@@ -1418,13 +1419,19 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask)
#define HCR_NV2 (1ULL << 45)
#define HCR_FWB (1ULL << 46)
#define HCR_FIEN (1ULL << 47)
+/* RES0 bit 48 */
#define HCR_TID4 (1ULL << 49)
#define HCR_TICAB (1ULL << 50)
+#define HCR_AMVOFFEN (1ULL << 51)
#define HCR_TOCU (1ULL << 52)
+#define HCR_ENSCXT (1ULL << 53)
#define HCR_TTLBIS (1ULL << 54)
#define HCR_TTLBOS (1ULL << 55)
#define HCR_ATA (1ULL << 56)
#define HCR_DCT (1ULL << 57)
+#define HCR_TID5 (1ULL << 58)
+#define HCR_TWEDEN (1ULL << 59)
+#define HCR_TWEDEL MAKE_64BIT_MASK(60, 4)
#define SCR_NS (1U << 0)
#define SCR_IRQ (1U << 1)
--
2.20.1
next prev parent reply other threads:[~2020-02-29 1:29 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-29 1:27 [PATCH v5 00/12] target/arm: Honor more HCR_EL2 traps Richard Henderson
2020-02-29 1:28 ` [PATCH v5 01/12] target/arm: Improve masking of HCR/HCR2 RES0 bits Richard Henderson
2020-02-29 1:28 ` Richard Henderson [this message]
2020-02-29 1:28 ` [PATCH v5 03/12] target/arm: Disable has_el2 and has_el3 for user-only Richard Henderson
2020-02-29 1:28 ` [PATCH v5 04/12] target/arm: Remove EL2 and EL3 setup from user-only Richard Henderson
2020-02-29 1:28 ` [PATCH v5 05/12] target/arm: Improve masking in arm_hcr_el2_eff Richard Henderson
2020-02-29 1:28 ` [PATCH v5 06/12] target/arm: Honor the HCR_EL2.{TVM,TRVM} bits Richard Henderson
2020-02-29 1:28 ` [PATCH v5 07/12] target/arm: Honor the HCR_EL2.TSW bit Richard Henderson
2020-02-29 1:28 ` [PATCH v5 08/12] target/arm: Honor the HCR_EL2.TACR bit Richard Henderson
2020-02-29 1:28 ` [PATCH v5 09/12] target/arm: Honor the HCR_EL2.TPCP bit Richard Henderson
2020-02-29 1:28 ` [PATCH v5 10/12] target/arm: Honor the HCR_EL2.TPU bit Richard Henderson
2020-02-29 1:28 ` [PATCH v5 11/12] target/arm: Honor the HCR_EL2.TTLB bit Richard Henderson
2020-02-29 1:28 ` [PATCH v5 12/12] tests/tcg/aarch64: Add newline in pauth-1 printf Richard Henderson
2020-03-02 15:22 ` [PATCH v5 00/12] target/arm: Honor more HCR_EL2 traps Peter Maydell
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