From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [PATCH v2 0/9] target/arm: Misc cleanups surrounding TBI
Date: Mon, 2 Mar 2020 09:58:20 -0800 [thread overview]
Message-ID: <20200302175829.2183-1-richard.henderson@linaro.org> (raw)
Changes for v2:
* Improve commit message in "Optimize cpu_mmu_index".
* Add "Introduce core_to_aa64_mmu_idx".
* Use it in "Apply TBI to ESR_ELx in helper_exception_return".
Blurb for v1:
We have a bug at present wherein we do not supply the memory tag to
the memory system, so that on fault FAR_ELx does not contain the
correct value.
For system mode, we already handle ignoring TBI in get_phys_addr_lpae,
as long as we don't actually drop the tag during translation.
For user mode, we don't have that option, so for now we must simply
accept that we'll get the wrong value in the siginfo_t.
In the process of looking at all that I found:
* Exception return was not applying TBI in copying ELR_ELx to PC,
- Extracting the current mmu_idx can be improved,
- Replicating the TBI bits can allow bit 55 to be used
unconditionally, eliminating a test.
* DC_ZVA was not handling TBI (now only for user-mode)
- The helper need not have been in op_helper.c,
- The helper could have better tcg markup.
* TBI still applies when translation is disabled, and we weren't
raising AddressSpace for bad physical addresses.
* SVE hasn't been updated to handle TBI. I have done nothing about
this for now. For the moment, system mode will work properly, while
user-only will only work without tags. I'll have to touch the same
places to add MTE support, so it'll get done shortly.
r~
Richard Henderson (9):
target/arm: Replicate TBI/TBID bits for single range regimes
target/arm: Optimize cpu_mmu_index
target/arm: Introduce core_to_aa64_mmu_idx
target/arm: Apply TBI to ESR_ELx in helper_exception_return
target/arm: Move helper_dc_zva to helper-a64.c
target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva
target/arm: Clean address for DC ZVA
target/arm: Check addresses for disabled regimes
target/arm: Disable clean_data_tbi for system mode
target/arm/cpu.h | 23 ++++----
target/arm/helper-a64.h | 1 +
target/arm/helper.h | 1 -
target/arm/internals.h | 6 ++
target/arm/helper-a64.c | 114 ++++++++++++++++++++++++++++++++++++-
target/arm/helper.c | 44 +++++++++++---
target/arm/op_helper.c | 93 ------------------------------
target/arm/translate-a64.c | 15 ++++-
8 files changed, 182 insertions(+), 115 deletions(-)
--
2.20.1
next reply other threads:[~2020-03-02 17:59 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-02 17:58 Richard Henderson [this message]
2020-03-02 17:58 ` [PATCH v2 1/9] target/arm: Replicate TBI/TBID bits for single range regimes Richard Henderson
2020-03-02 23:51 ` Philippe Mathieu-Daudé
2020-03-02 17:58 ` [PATCH v2 2/9] target/arm: Optimize cpu_mmu_index Richard Henderson
2020-03-05 14:23 ` Peter Maydell
2020-03-02 17:58 ` [PATCH v2 3/9] target/arm: Introduce core_to_aa64_mmu_idx Richard Henderson
2020-03-02 23:50 ` Philippe Mathieu-Daudé
2020-03-05 14:23 ` Peter Maydell
2020-03-02 17:58 ` [PATCH v2 4/9] target/arm: Apply TBI to ESR_ELx in helper_exception_return Richard Henderson
2020-03-05 14:24 ` Peter Maydell
2020-03-02 17:58 ` [PATCH v2 5/9] target/arm: Move helper_dc_zva to helper-a64.c Richard Henderson
2020-03-02 23:52 ` Philippe Mathieu-Daudé
2020-03-02 17:58 ` [PATCH v2 6/9] target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva Richard Henderson
2020-03-02 23:53 ` Philippe Mathieu-Daudé
2020-03-02 17:58 ` [PATCH v2 7/9] target/arm: Clean address for DC ZVA Richard Henderson
2020-03-02 17:58 ` [PATCH v2 8/9] target/arm: Check addresses for disabled regimes Richard Henderson
2020-03-05 14:21 ` Peter Maydell
2020-03-05 15:57 ` Richard Henderson
2020-03-02 17:58 ` [PATCH v2 9/9] target/arm: Disable clean_data_tbi for system mode Richard Henderson
2020-03-05 15:12 ` [PATCH v2 0/9] target/arm: Misc cleanups surrounding TBI Peter Maydell
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