From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [PATCH v2 3/9] target/arm: Introduce core_to_aa64_mmu_idx
Date: Mon, 2 Mar 2020 09:58:23 -0800 [thread overview]
Message-ID: <20200302175829.2183-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200302175829.2183-1-richard.henderson@linaro.org>
If by context we know that we're in AArch64 mode, we need not
test for M-profile when reconstructing the full ARMMMUIdx.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/internals.h | 6 ++++++
target/arm/translate-a64.c | 2 +-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 9f96a2359f..e633aff36e 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -783,6 +783,12 @@ static inline ARMMMUIdx core_to_arm_mmu_idx(CPUARMState *env, int mmu_idx)
}
}
+static inline ARMMMUIdx core_to_aa64_mmu_idx(int mmu_idx)
+{
+ /* AArch64 is always a-profile. */
+ return mmu_idx | ARM_MMU_IDX_A;
+}
+
int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx);
/*
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 579180af0a..c910a49b4e 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -14300,7 +14300,7 @@ static void aarch64_tr_init_disas_context(DisasContextBase *dcbase,
dc->condexec_mask = 0;
dc->condexec_cond = 0;
core_mmu_idx = FIELD_EX32(tb_flags, TBFLAG_ANY, MMUIDX);
- dc->mmu_idx = core_to_arm_mmu_idx(env, core_mmu_idx);
+ dc->mmu_idx = core_to_aa64_mmu_idx(core_mmu_idx);
dc->tbii = FIELD_EX32(tb_flags, TBFLAG_A64, TBII);
dc->tbid = FIELD_EX32(tb_flags, TBFLAG_A64, TBID);
dc->current_el = arm_mmu_idx_to_el(dc->mmu_idx);
--
2.20.1
next prev parent reply other threads:[~2020-03-02 18:04 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-02 17:58 [PATCH v2 0/9] target/arm: Misc cleanups surrounding TBI Richard Henderson
2020-03-02 17:58 ` [PATCH v2 1/9] target/arm: Replicate TBI/TBID bits for single range regimes Richard Henderson
2020-03-02 23:51 ` Philippe Mathieu-Daudé
2020-03-02 17:58 ` [PATCH v2 2/9] target/arm: Optimize cpu_mmu_index Richard Henderson
2020-03-05 14:23 ` Peter Maydell
2020-03-02 17:58 ` Richard Henderson [this message]
2020-03-02 23:50 ` [PATCH v2 3/9] target/arm: Introduce core_to_aa64_mmu_idx Philippe Mathieu-Daudé
2020-03-05 14:23 ` Peter Maydell
2020-03-02 17:58 ` [PATCH v2 4/9] target/arm: Apply TBI to ESR_ELx in helper_exception_return Richard Henderson
2020-03-05 14:24 ` Peter Maydell
2020-03-02 17:58 ` [PATCH v2 5/9] target/arm: Move helper_dc_zva to helper-a64.c Richard Henderson
2020-03-02 23:52 ` Philippe Mathieu-Daudé
2020-03-02 17:58 ` [PATCH v2 6/9] target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva Richard Henderson
2020-03-02 23:53 ` Philippe Mathieu-Daudé
2020-03-02 17:58 ` [PATCH v2 7/9] target/arm: Clean address for DC ZVA Richard Henderson
2020-03-02 17:58 ` [PATCH v2 8/9] target/arm: Check addresses for disabled regimes Richard Henderson
2020-03-05 14:21 ` Peter Maydell
2020-03-05 15:57 ` Richard Henderson
2020-03-02 17:58 ` [PATCH v2 9/9] target/arm: Disable clean_data_tbi for system mode Richard Henderson
2020-03-05 15:12 ` [PATCH v2 0/9] target/arm: Misc cleanups surrounding TBI Peter Maydell
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