From: Igor Mammedov <imammedo@redhat.com>
To: Babu Moger <babu.moger@amd.com>
Cc: ehabkost@redhat.com, mst@redhat.com, qemu-devel@nongnu.org,
pbonzini@redhat.com, rth@twiddle.net
Subject: Re: [PATCH v5 12/16] hw/i386: Use the apicid handlers from X86MachineState
Date: Mon, 9 Mar 2020 16:01:57 +0100 [thread overview]
Message-ID: <20200309160157.0509fa8d@Igors-MacBook-Pro> (raw)
In-Reply-To: <158326548999.40452.9247570542382737462.stgit@naples-babu.amd.com>
On Tue, 03 Mar 2020 13:58:10 -0600
Babu Moger <babu.moger@amd.com> wrote:
> Check and Load the apicid handlers from X86CPUDefinition if available.
> Update the calling convention for the apicid handlers.
>
> Signed-off-by: Babu Moger <babu.moger@amd.com>
> ---
> hw/i386/pc.c | 6 +++---
> hw/i386/x86.c | 11 +++++++----
> 2 files changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 17cce3f074..c600ba0432 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -1581,14 +1581,14 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
> topo_ids.die_id = cpu->die_id;
> topo_ids.core_id = cpu->core_id;
> topo_ids.smt_id = cpu->thread_id;
> - cpu->apic_id = x86_apicid_from_topo_ids(&topo_info, &topo_ids);
> + cpu->apic_id = x86ms->apicid_from_topo_ids(&topo_info, &topo_ids);
> }
>
> cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx);
> if (!cpu_slot) {
> MachineState *ms = MACHINE(pcms);
>
> - x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
> + x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
this (including other similar) change(s) to callbacks should go to 11/16
> error_setg(errp,
> "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
> " APIC ID %" PRIu32 ", valid index range 0:%d",
> @@ -1609,7 +1609,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
> /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
> * once -smp refactoring is complete and there will be CPU private
> * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
> - x86_topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
> + x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids);
> if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) {
> error_setg(errp, "property socket-id: %u doesn't match set apic-id:"
> " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id,
> diff --git a/hw/i386/x86.c b/hw/i386/x86.c
> index 15b7815bb0..d46dd4ad9e 100644
> --- a/hw/i386/x86.c
> +++ b/hw/i386/x86.c
> @@ -86,7 +86,7 @@ uint32_t x86_cpu_apic_id_from_index(X86MachineState *x86ms,
>
> init_topo_info(&topo_info, x86ms);
>
> - correct_id = x86_apicid_from_cpu_idx(&topo_info, cpu_index);
> + correct_id = x86ms->apicid_from_cpu_idx(&topo_info, cpu_index);
> if (x86mc->compat_apic_id_mode) {
> if (cpu_index != correct_id && !warned && !qtest_enabled()) {
> error_report("APIC IDs set in compatibility mode, "
> @@ -158,8 +158,8 @@ int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx)
> init_topo_info(&topo_info, x86ms);
>
> assert(idx < ms->possible_cpus->len);
> - x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
> - &topo_info, &topo_ids);
> + x86ms->topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
> + &topo_info, &topo_ids);
> return topo_ids.pkg_id % ms->numa_state->num_nodes;
> }
>
> @@ -179,6 +179,9 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms)
> return ms->possible_cpus;
> }
>
> + /* Initialize apicid handlers */
> + cpu_x86_init_apicid_fns(ms);
> +
> ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
> sizeof(CPUArchId) * max_cpus);
> ms->possible_cpus->len = max_cpus;
> @@ -192,7 +195,7 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms)
> ms->possible_cpus->cpus[i].vcpus_count = 1;
> ms->possible_cpus->cpus[i].arch_id =
> x86_cpu_apic_id_from_index(x86ms, i);
> - x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
> + x86ms->topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
> &topo_info, &topo_ids);
not aligned properly
> ms->possible_cpus->cpus[i].props.has_socket_id = true;
> ms->possible_cpus->cpus[i].props.socket_id = topo_ids.pkg_id;
>
next prev parent reply other threads:[~2020-03-09 15:03 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-03 19:56 [PATCH v5 00/16] APIC ID fixes for AMD EPYC CPU model Babu Moger
2020-03-03 19:56 ` [PATCH v5 01/16] hw/i386: Rename X86CPUTopoInfo structure to X86CPUTopoIDs Babu Moger
2020-03-03 19:57 ` [PATCH v5 02/16] hw/i386: Introduce X86CPUTopoInfo to contain topology info Babu Moger
2020-03-09 14:10 ` Igor Mammedov
2020-03-10 23:04 ` Eduardo Habkost
2020-03-03 19:57 ` [PATCH v5 03/16] hw/i386: Consolidate topology functions Babu Moger
2020-03-03 19:57 ` [PATCH v5 04/16] machine: Add SMP Sockets in CpuTopology Babu Moger
2020-03-09 14:17 ` Igor Mammedov
2020-03-09 18:01 ` Babu Moger
2020-03-03 19:57 ` [PATCH v5 05/16] hw/i386: Remove unnecessary initialization in x86_cpu_new Babu Moger
2020-03-09 14:18 ` Igor Mammedov
2020-03-03 19:57 ` [PATCH v5 06/16] hw/i386: Update structures to save the number of nodes per package Babu Moger
2020-03-09 14:26 ` Igor Mammedov
2020-03-03 19:57 ` [PATCH v5 07/16] hw/i386: Rename apicid_from_topo_ids to x86_apicid_from_topo_ids Babu Moger
2020-03-03 19:57 ` [PATCH v5 08/16] hw/386: Add EPYC mode topology decoding functions Babu Moger
2020-03-03 19:57 ` [PATCH v5 09/16] target/i386: Cleanup and use the EPYC mode topology functions Babu Moger
2020-03-03 19:57 ` [PATCH v5 10/16] hw/i386: Introduce apicid functions inside X86MachineState Babu Moger
2020-03-09 14:34 ` Igor Mammedov
2020-03-03 19:58 ` [PATCH v5 11/16] target/i386: Load apicid model specific handlers from X86CPUDefinition Babu Moger
2020-03-09 14:49 ` Igor Mammedov
2020-03-09 14:55 ` Igor Mammedov
2020-03-09 19:04 ` Babu Moger
2020-03-10 8:27 ` Igor Mammedov
2020-03-03 19:58 ` [PATCH v5 12/16] hw/i386: Use the apicid handlers from X86MachineState Babu Moger
2020-03-09 15:01 ` Igor Mammedov [this message]
2020-03-09 19:08 ` Babu Moger
2020-03-10 8:31 ` Igor Mammedov
2020-03-03 19:58 ` [PATCH v5 13/16] target/i386: Add EPYC model specific handlers Babu Moger
2020-03-09 15:03 ` Igor Mammedov
2020-03-09 19:12 ` Babu Moger
2020-03-10 8:25 ` Igor Mammedov
2020-03-03 19:58 ` [PATCH v5 14/16] hw/i386: Move arch_id decode inside x86_cpus_init Babu Moger
2020-03-09 15:21 ` Igor Mammedov
2020-03-09 19:31 ` Babu Moger
2020-03-10 8:35 ` Igor Mammedov
2020-03-10 20:05 ` Babu Moger
2020-03-03 19:58 ` [PATCH v5 15/16] i386: Fix pkg_id offset for EPYC cpu models Babu Moger
2020-03-09 15:22 ` Igor Mammedov
2020-03-03 19:58 ` [PATCH v5 16/16] tests: Update the Unit tests Babu Moger
2020-03-10 23:06 ` Eduardo Habkost
2020-03-10 23:09 ` Moger, Babu
2020-03-08 13:25 ` [PATCH v5 00/16] APIC ID fixes for AMD EPYC CPU model Michael S. Tsirkin
2020-03-09 17:50 ` Babu Moger
2020-03-10 8:40 ` Igor Mammedov
2020-03-10 20:07 ` Babu Moger
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