From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org
Subject: [PATCH v6 37/42] target/arm: Implement data cache set allocation tags
Date: Thu, 12 Mar 2020 12:42:14 -0700 [thread overview]
Message-ID: <20200312194219.24406-38-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200312194219.24406-1-richard.henderson@linaro.org>
This is DC GVA and DC GZVA, and the tag check for DC ZVA.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v2: Use allocation_tag_mem + memset.
v3: Require pre-cleaned addresses.
v6: Move DCZ block size assert to cpu realize.
Perform a tag check for DC ZVA.
---
target/arm/cpu.h | 4 +++-
target/arm/helper.c | 16 ++++++++++++++++
target/arm/translate-a64.c | 39 ++++++++++++++++++++++++++++++++++++++
3 files changed, 58 insertions(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 67164d56a1..b78bf2be4a 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2337,7 +2337,9 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid)
#define ARM_CP_NZCV (ARM_CP_SPECIAL | 0x0300)
#define ARM_CP_CURRENTEL (ARM_CP_SPECIAL | 0x0400)
#define ARM_CP_DC_ZVA (ARM_CP_SPECIAL | 0x0500)
-#define ARM_LAST_SPECIAL ARM_CP_DC_ZVA
+#define ARM_CP_DC_GVA (ARM_CP_SPECIAL | 0x0600)
+#define ARM_CP_DC_GZVA (ARM_CP_SPECIAL | 0x0700)
+#define ARM_LAST_SPECIAL ARM_CP_DC_GZVA
#define ARM_CP_FPU 0x1000
#define ARM_CP_SVE 0x2000
#define ARM_CP_NO_GDB 0x4000
diff --git a/target/arm/helper.c b/target/arm/helper.c
index e4b4366af7..44e7c0d19b 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6983,6 +6983,22 @@ static const ARMCPRegInfo mte_el0_cacheop_reginfo[] = {
.opc0 = 1, .opc1 = 3, .crn = 7, .crm = 14, .opc2 = 5,
.type = ARM_CP_NOP, .access = PL0_W,
.accessfn = aa64_cacheop_poc_access },
+ { .name = "DC_GVA", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 4, .opc2 = 3,
+ .access = PL0_W, .type = ARM_CP_DC_GVA,
+#ifndef CONFIG_USER_ONLY
+ /* Avoid overhead of an access check that always passes in user-mode */
+ .accessfn = aa64_zva_access,
+#endif
+ },
+ { .name = "DC_GZVA", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 4, .opc2 = 4,
+ .access = PL0_W, .type = ARM_CP_DC_GZVA,
+#ifndef CONFIG_USER_ONLY
+ /* Avoid overhead of an access check that always passes in user-mode */
+ .accessfn = aa64_zva_access,
+#endif
+ },
REGINFO_SENTINEL
};
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 1314b200e0..f33f174584 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -1919,6 +1919,45 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
}
gen_helper_dc_zva(cpu_env, tcg_rt);
return;
+ case ARM_CP_DC_GVA:
+ {
+ TCGv_i64 clean_addr, tag;
+
+ /*
+ * DC_GVA, like DC_ZVA, requires that we supply the original
+ * pointer for an invalid page. Probe that address first.
+ */
+ tcg_rt = cpu_reg(s, rt);
+ clean_addr = clean_data_tbi(s, tcg_rt);
+ gen_probe_access(s, clean_addr, MMU_DATA_STORE, MO_8);
+
+ if (s->ata) {
+ /* Extract the tag from the register to match STZGM. */
+ tag = tcg_temp_new_i64();
+ tcg_gen_shri_i64(tag, tcg_rt, 56);
+ gen_helper_stzgm_tags(cpu_env, clean_addr, tag);
+ tcg_temp_free_i64(tag);
+ }
+ }
+ return;
+ case ARM_CP_DC_GZVA:
+ {
+ TCGv_i64 clean_addr, tag;
+
+ /* For DC_GZVA, we can rely on DC_ZVA for the proper fault. */
+ tcg_rt = cpu_reg(s, rt);
+ clean_addr = clean_data_tbi(s, tcg_rt);
+ gen_helper_dc_zva(cpu_env, clean_addr);
+
+ if (s->ata) {
+ /* Extract the tag from the register to match STZGM. */
+ tag = tcg_temp_new_i64();
+ tcg_gen_shri_i64(tag, tcg_rt, 56);
+ gen_helper_stzgm_tags(cpu_env, clean_addr, tag);
+ tcg_temp_free_i64(tag);
+ }
+ }
+ return;
default:
break;
}
--
2.20.1
next prev parent reply other threads:[~2020-03-12 19:52 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-12 19:41 [PATCH v6 00/42] target/arm: Implement ARMv8.5-MemTag, system mode Richard Henderson
2020-03-12 19:41 ` [PATCH v6 01/42] target/arm: Add isar tests for mte Richard Henderson
2020-03-12 19:41 ` [PATCH v6 02/42] target/arm: Improve masking of SCR RES0 bits Richard Henderson
2020-03-12 19:41 ` [PATCH v6 03/42] target/arm: Add support for MTE to SCTLR_ELx Richard Henderson
2020-03-12 19:41 ` [PATCH v6 04/42] target/arm: Add support for MTE to HCR_EL2 and SCR_EL3 Richard Henderson
2020-03-12 19:41 ` [PATCH v6 05/42] target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXIT Richard Henderson
2020-03-12 19:41 ` [PATCH v6 06/42] target/arm: Add DISAS_UPDATE_NOCHAIN Richard Henderson
2020-03-12 19:41 ` [PATCH v6 07/42] target/arm: Add MTE system registers Richard Henderson
2020-03-12 19:41 ` [PATCH v6 08/42] target/arm: Add MTE bits to tb_flags Richard Henderson
2020-03-12 19:41 ` [PATCH v6 09/42] target/arm: Implement the IRG instruction Richard Henderson
2020-03-12 19:41 ` [PATCH v6 10/42] target/arm: Implement the ADDG, SUBG instructions Richard Henderson
2020-03-12 19:41 ` [PATCH v6 11/42] target/arm: Implement the GMI instruction Richard Henderson
2020-03-12 19:41 ` [PATCH v6 12/42] target/arm: Implement the SUBP instruction Richard Henderson
2020-03-12 19:41 ` [PATCH v6 13/42] target/arm: Define arm_cpu_do_unaligned_access for user-only Richard Henderson
2020-03-12 19:41 ` [PATCH v6 14/42] target/arm: Add helper_probe_access Richard Henderson
2020-03-12 19:41 ` [PATCH v6 15/42] target/arm: Implement LDG, STG, ST2G instructions Richard Henderson
2020-03-12 19:41 ` [PATCH v6 16/42] target/arm: Implement the STGP instruction Richard Henderson
2020-03-12 19:41 ` [PATCH v6 17/42] target/arm: Restrict the values of DCZID.BS under TCG Richard Henderson
2020-03-12 19:41 ` [PATCH v6 18/42] target/arm: Simplify DC_ZVA Richard Henderson
2020-03-12 19:41 ` [PATCH v6 19/42] target/arm: Implement the LDGM, STGM, STZGM instructions Richard Henderson
2020-03-12 19:41 ` [PATCH v6 20/42] target/arm: Implement the access tag cache flushes Richard Henderson
2020-03-12 19:41 ` [PATCH v6 21/42] target/arm: Move regime_el to internals.h Richard Henderson
2020-03-12 19:41 ` [PATCH v6 22/42] target/arm: Move regime_tcr " Richard Henderson
2020-03-12 19:42 ` [PATCH v6 23/42] target/arm: Add gen_mte_check1 Richard Henderson
2020-03-12 19:42 ` [PATCH v6 24/42] target/arm: Add gen_mte_checkN Richard Henderson
2020-03-12 19:42 ` [PATCH v6 25/42] target/arm: Implement helper_mte_check1 Richard Henderson
2020-03-12 19:42 ` [PATCH v6 26/42] target/arm: Implement helper_mte_checkN Richard Henderson
2020-03-12 19:42 ` [PATCH v6 27/42] target/arm: Add helper_mte_check_zva Richard Henderson
2020-03-12 19:42 ` [PATCH v6 28/42] target/arm: Use mte_checkN for sve unpredicated loads Richard Henderson
2020-03-12 19:42 ` [PATCH v6 29/42] target/arm: Use mte_checkN for sve unpredicated stores Richard Henderson
2020-03-12 19:42 ` [PATCH v6 30/42] target/arm: Use mte_check1 for sve LD1R Richard Henderson
2020-03-12 19:42 ` [PATCH v6 31/42] target/arm: Add mte helpers for sve scalar + int loads Richard Henderson
2020-03-12 19:42 ` [PATCH v6 32/42] target/arm: Add mte helpers for sve scalar + int stores Richard Henderson
2020-03-12 19:42 ` [PATCH v6 33/42] target/arm: Add mte helpers for sve scalar + int ff/nf loads Richard Henderson
2020-03-12 19:42 ` [PATCH v6 34/42] target/arm: Handle TBI for sve scalar + int memory ops Richard Henderson
2020-03-12 19:42 ` [PATCH v6 35/42] target/arm: Add mte helpers for sve scatter/gather " Richard Henderson
2020-03-12 19:42 ` [PATCH v6 36/42] target/arm: Complete TBI clearing for user-only for SVE Richard Henderson
2020-03-12 19:42 ` Richard Henderson [this message]
2020-03-12 19:42 ` [PATCH v6 38/42] target/arm: Set PSTATE.TCO on exception entry Richard Henderson
2020-03-12 19:42 ` [PATCH v6 39/42] target/arm: Enable MTE Richard Henderson
2020-03-12 19:42 ` [PATCH v6 40/42] target/arm: Cache the Tagged bit for a page in MemTxAttrs Richard Henderson
2020-03-12 19:42 ` [PATCH v6 41/42] target/arm: Create tagged ram when MTE is enabled Richard Henderson
2020-03-12 19:42 ` [PATCH v6 42/42] target/arm: Add allocation tag storage for system mode Richard Henderson
2020-05-18 14:46 ` [PATCH v6 00/42] target/arm: Implement ARMv8.5-MemTag, " Peter Maydell
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