From: David Gibson <david@gibson.dropbear.id.au>
To: Vitaly Chikunov <vt@altlinux.org>
Cc: qemu-ppc@nongnu.org,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org, mdroth@us.ibm.com, qemu-stable@nongnu.org
Subject: Re: [PATCH] target/ppc: Fix rlwinm on ppc64
Date: Mon, 16 Mar 2020 13:57:04 +1100 [thread overview]
Message-ID: <20200316025704.GG2013@umbus.fritz.box> (raw)
In-Reply-To: <20200311130022.sswvce3wx3dii4mf@altlinux.org>
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On Wed, Mar 11, 2020 at 04:00:22PM +0300, Vitaly Chikunov wrote:
> David,
>
> On Wed, Mar 11, 2020 at 10:15:03AM +1100, David Gibson wrote:
> > On Mon, Mar 09, 2020 at 11:45:57PM +0300, Vitaly Chikunov wrote:
> > > rlwinm cannot just AND with Mask if shift value is zero on ppc64 when
> > > Mask Begin is greater than Mask End and high bits are set to 1.
> > >
> > > Note that PowerISA 3.0B says that for `rlwinm' ROTL32 is used, and
> > > ROTL32 is defined (in 3.3.14) so that rotated value should have two
> > > copies of lower word of the source value.
> > >
> > > This seems to be another incarnation of the fix from 820724d170
> > > ("target-ppc: Fix rlwimi, rlwinm, rlwnm again"), except I leave
> > > optimization when Mask value is less than 32 bits.
> > >
> > > Fixes: 7b4d326f47 ("target-ppc: Use the new deposit and extract ops")
> > > Cc: qemu-stable@nongnu.org
> > > Signed-off-by: Vitaly Chikunov <vt@altlinux.org>
> >
> > Applied to ppc-for-5.0.
>
> Thanks! FYI, there is at least one real case of this bug:
> https://github.com/iovisor/bcc/issues/2771
> so this is not theoretical, and, probably, should go to the stable
> too.
Adding CC to Mike Roth who looks after the stable branch.
Can you include this one, please.
>
> Thanks,
>
>
> >
> > > ---
> > > target/ppc/translate.c | 20 +++++++++++---------
> > > 1 file changed, 11 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> > > index 36fa27367c..127c82a24e 100644
> > > --- a/target/ppc/translate.c
> > > +++ b/target/ppc/translate.c
> > > @@ -1938,15 +1938,17 @@ static void gen_rlwinm(DisasContext *ctx)
> > > me += 32;
> > > #endif
> > > mask = MASK(mb, me);
> > > - if (sh == 0) {
> > > - tcg_gen_andi_tl(t_ra, t_rs, mask);
> > > - } else if (mask <= 0xffffffffu) {
> > > - TCGv_i32 t0 = tcg_temp_new_i32();
> > > - tcg_gen_trunc_tl_i32(t0, t_rs);
> > > - tcg_gen_rotli_i32(t0, t0, sh);
> > > - tcg_gen_andi_i32(t0, t0, mask);
> > > - tcg_gen_extu_i32_tl(t_ra, t0);
> > > - tcg_temp_free_i32(t0);
> > > + if (mask <= 0xffffffffu) {
> > > + if (sh == 0) {
> > > + tcg_gen_andi_tl(t_ra, t_rs, mask);
> > > + } else {
> > > + TCGv_i32 t0 = tcg_temp_new_i32();
> > > + tcg_gen_trunc_tl_i32(t0, t_rs);
> > > + tcg_gen_rotli_i32(t0, t0, sh);
> > > + tcg_gen_andi_i32(t0, t0, mask);
> > > + tcg_gen_extu_i32_tl(t_ra, t0);
> > > + tcg_temp_free_i32(t0);
> > > + }
> > > } else {
> > > #if defined(TARGET_PPC64)
> > > tcg_gen_deposit_i64(t_ra, t_rs, t_rs, 32, 32);
> >
>
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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prev parent reply other threads:[~2020-03-16 3:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-09 20:45 [PATCH] target/ppc: Fix rlwinm on ppc64 Vitaly Chikunov
2020-03-09 22:15 ` no-reply
2020-03-10 2:34 ` David Gibson
2020-03-10 4:13 ` Richard Henderson
2020-03-10 23:15 ` David Gibson
2020-03-11 13:00 ` Vitaly Chikunov
2020-03-16 2:57 ` David Gibson [this message]
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