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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Fam Zheng" <fam@euphon.net>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Thomas Huth" <thuth@redhat.com>,
	kvm@vger.kernel.org, "Alex Bennée" <alex.bennee@linaro.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	qemu-arm@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PATCH v3 10/19] target/arm: Restrict ARMv4 cpus to TCG accel
Date: Mon, 16 Mar 2020 17:06:25 +0100	[thread overview]
Message-ID: <20200316160634.3386-11-philmd@redhat.com> (raw)
In-Reply-To: <20200316160634.3386-1-philmd@redhat.com>

KVM requires a cpu based on (at least) the ARMv7 architecture.

Only enable the following ARMv4 CPUs when TCG is available:

  - StrongARM (SA1100/1110)
  - OMAP1510 (TI925T)

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 default-configs/arm-softmmu.mak |  2 -
 target/arm/cpu.c                | 33 -----------------
 target/arm/cpu_v4.c             | 65 +++++++++++++++++++++++++++++++++
 hw/arm/Kconfig                  |  2 +
 target/arm/Kconfig              |  4 ++
 target/arm/Makefile.objs        |  2 +
 6 files changed, 73 insertions(+), 35 deletions(-)
 create mode 100644 target/arm/cpu_v4.c

diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 8b89d8c4c0..0652396296 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -17,8 +17,6 @@ CONFIG_INTEGRATOR=y
 CONFIG_FSL_IMX31=y
 CONFIG_MUSICPAL=y
 CONFIG_MUSCA=y
-CONFIG_CHEETAH=y
-CONFIG_SX1=y
 CONFIG_NSERIES=y
 CONFIG_STELLARIS=y
 CONFIG_REALVIEW=y
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index d2813eb81a..b08b6933be 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2459,36 +2459,6 @@ static void cortex_a15_initfn(Object *obj)
     define_arm_cp_regs(cpu, cortexa15_cp_reginfo);
 }
 
-static void ti925t_initfn(Object *obj)
-{
-    ARMCPU *cpu = ARM_CPU(obj);
-    set_feature(&cpu->env, ARM_FEATURE_V4T);
-    set_feature(&cpu->env, ARM_FEATURE_OMAPCP);
-    cpu->midr = ARM_CPUID_TI925T;
-    cpu->ctr = 0x5109149;
-    cpu->reset_sctlr = 0x00000070;
-}
-
-static void sa1100_initfn(Object *obj)
-{
-    ARMCPU *cpu = ARM_CPU(obj);
-
-    cpu->dtb_compatible = "intel,sa1100";
-    set_feature(&cpu->env, ARM_FEATURE_STRONGARM);
-    set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
-    cpu->midr = 0x4401A11B;
-    cpu->reset_sctlr = 0x00000070;
-}
-
-static void sa1110_initfn(Object *obj)
-{
-    ARMCPU *cpu = ARM_CPU(obj);
-    set_feature(&cpu->env, ARM_FEATURE_STRONGARM);
-    set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
-    cpu->midr = 0x6901B119;
-    cpu->reset_sctlr = 0x00000070;
-}
-
 static void pxa250_initfn(Object *obj)
 {
     ARMCPU *cpu = ARM_CPU(obj);
@@ -2727,9 +2697,6 @@ static const ARMCPUInfo arm_cpus[] = {
     { .name = "cortex-a8",   .initfn = cortex_a8_initfn },
     { .name = "cortex-a9",   .initfn = cortex_a9_initfn },
     { .name = "cortex-a15",  .initfn = cortex_a15_initfn },
-    { .name = "ti925t",      .initfn = ti925t_initfn },
-    { .name = "sa1100",      .initfn = sa1100_initfn },
-    { .name = "sa1110",      .initfn = sa1110_initfn },
     { .name = "pxa250",      .initfn = pxa250_initfn },
     { .name = "pxa255",      .initfn = pxa255_initfn },
     { .name = "pxa260",      .initfn = pxa260_initfn },
diff --git a/target/arm/cpu_v4.c b/target/arm/cpu_v4.c
new file mode 100644
index 0000000000..1de00a03ee
--- /dev/null
+++ b/target/arm/cpu_v4.c
@@ -0,0 +1,65 @@
+/*
+ * ARM generic helpers.
+ *
+ * This code is licensed under the GNU GPL v2 or later.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "internals.h"
+
+/* CPU models. These are not needed for the AArch64 linux-user build. */
+#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
+
+static void ti925t_initfn(Object *obj)
+{
+    ARMCPU *cpu = ARM_CPU(obj);
+    set_feature(&cpu->env, ARM_FEATURE_V4T);
+    set_feature(&cpu->env, ARM_FEATURE_OMAPCP);
+    cpu->midr = ARM_CPUID_TI925T;
+    cpu->ctr = 0x5109149;
+    cpu->reset_sctlr = 0x00000070;
+}
+
+static void sa1100_initfn(Object *obj)
+{
+    ARMCPU *cpu = ARM_CPU(obj);
+
+    cpu->dtb_compatible = "intel,sa1100";
+    set_feature(&cpu->env, ARM_FEATURE_STRONGARM);
+    set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
+    cpu->midr = 0x4401A11B;
+    cpu->reset_sctlr = 0x00000070;
+}
+
+static void sa1110_initfn(Object *obj)
+{
+    ARMCPU *cpu = ARM_CPU(obj);
+    set_feature(&cpu->env, ARM_FEATURE_STRONGARM);
+    set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
+    cpu->midr = 0x6901B119;
+    cpu->reset_sctlr = 0x00000070;
+}
+
+static const ARMCPUInfo arm_v4_cpus[] = {
+    { .name = "ti925t",      .initfn = ti925t_initfn },
+    { .name = "sa1100",      .initfn = sa1100_initfn },
+    { .name = "sa1110",      .initfn = sa1110_initfn },
+    { .name = NULL }
+};
+
+static void arm_v4_cpu_register_types(void)
+{
+    const ARMCPUInfo *info = arm_v4_cpus;
+
+    while (info->name) {
+        arm_cpu_register(info);
+        info++;
+    }
+}
+
+type_init(arm_v4_cpu_register_types)
+
+#endif
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index e3d7e7694a..7fc0cff776 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -28,6 +28,7 @@ config ARM_VIRT
 
 config CHEETAH
     bool
+    select ARM_V4
     select OMAP
     select TSC210X
 
@@ -242,6 +243,7 @@ config COLLIE
 
 config SX1
     bool
+    select ARM_V4
     select OMAP
 
 config VERSATILE
diff --git a/target/arm/Kconfig b/target/arm/Kconfig
index e68c71a6ff..0d496d318a 100644
--- a/target/arm/Kconfig
+++ b/target/arm/Kconfig
@@ -1,2 +1,6 @@
+config ARM_V4
+    depends on TCG
+    bool
+
 config ARM_V7M
     bool
diff --git a/target/arm/Makefile.objs b/target/arm/Makefile.objs
index fa278bb4c1..bc0f63ebbc 100644
--- a/target/arm/Makefile.objs
+++ b/target/arm/Makefile.objs
@@ -68,6 +68,8 @@ obj-y += crypto_helper.o
 obj-y += iwmmxt_helper.o vec_helper.o neon_helper.o
 obj-y += m_helper.o
 
+obj-$(CONFIG_ARM_V4) += cpu_v4.o
+
 obj-$(CONFIG_SOFTMMU) += psci.o
 
 obj-$(TARGET_AARCH64) += translate-a64.o helper-a64.o
-- 
2.21.1



  parent reply	other threads:[~2020-03-16 17:35 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-16 16:06 [PATCH v3 00/19] Support disabling TCG on ARM (part 2) Philippe Mathieu-Daudé
2020-03-16 16:06 ` [PATCH v3 01/19] target/arm: Rename KVM set_feature() as kvm_set_feature() Philippe Mathieu-Daudé
2020-03-16 20:16   ` Richard Henderson
2020-03-17  9:09     ` Philippe Mathieu-Daudé
2020-04-19 16:31       ` Philippe Mathieu-Daudé
2020-04-19 19:58         ` Peter Maydell
2020-04-20 10:44           ` Philippe Mathieu-Daudé
2020-03-16 16:06 ` [PATCH v3 02/19] target/arm: Make set_feature() available for other files Philippe Mathieu-Daudé
2020-03-16 16:06 ` [PATCH v3 03/19] target/arm: Restrict DC-CVAP instruction to TCG accel Philippe Mathieu-Daudé
2020-03-16 19:36   ` Richard Henderson
2020-03-16 20:11     ` Peter Maydell
2020-04-17 13:49       ` Philippe Mathieu-Daudé
2020-04-17 13:54         ` Peter Maydell
2020-04-17 14:19           ` Philippe Mathieu-Daudé
2020-04-17 14:24             ` Peter Maydell
2020-03-16 16:06 ` [PATCH v3 04/19] target/arm: Restric the Address Translate operations " Philippe Mathieu-Daudé
2020-03-16 19:37   ` Richard Henderson
2020-03-16 16:06 ` [PATCH v3 05/19] target/arm: Restrict Virtualization Host Extensions instructions to TCG Philippe Mathieu-Daudé
2020-03-16 20:17   ` Richard Henderson
2020-04-20 10:49     ` Philippe Mathieu-Daudé
2020-03-16 16:06 ` [PATCH v3 06/19] target/arm: Move Makefile variable restricted to CONFIG_TCG Philippe Mathieu-Daudé
2020-03-16 16:06 ` [PATCH v3 07/19] target/arm: Make cpu_register() available for other files Philippe Mathieu-Daudé
2020-03-16 20:10   ` Richard Henderson
2020-03-16 16:06 ` [PATCH v3 08/19] target/arm: Add semihosting stub to allow building without TCG Philippe Mathieu-Daudé
2020-03-16 19:46   ` Richard Henderson
2020-03-16 16:06 ` [PATCH v3 09/19] target/arm: Move ARM_V7M Kconfig from hw/ to target/ Philippe Mathieu-Daudé
2020-03-16 20:09   ` Richard Henderson
2020-03-16 16:06 ` Philippe Mathieu-Daudé [this message]
2020-03-16 19:50   ` [PATCH v3 10/19] target/arm: Restrict ARMv4 cpus to TCG accel Richard Henderson
2020-03-16 19:51     ` Richard Henderson
2020-04-23  8:36   ` Philippe Mathieu-Daudé
2020-03-16 16:06 ` [PATCH v3 11/19] target/arm: Restrict ARMv5 " Philippe Mathieu-Daudé
2020-03-16 19:52   ` Richard Henderson
2020-03-16 16:06 ` [PATCH v3 12/19] target/arm: Restrict ARMv6 " Philippe Mathieu-Daudé
2020-03-16 19:54   ` Richard Henderson
2020-03-16 16:06 ` [PATCH v3 13/19] target/arm: Restrict ARMv7 R-profile " Philippe Mathieu-Daudé
2020-03-16 19:55   ` Richard Henderson
2020-03-16 16:06 ` [PATCH v3 14/19] target/arm: Restrict ARMv7 M-profile " Philippe Mathieu-Daudé
2020-03-16 19:57   ` Richard Henderson
2020-03-16 16:06 ` [PATCH v3 15/19] target/arm: Make m_helper.c optional via CONFIG_ARM_V7M Philippe Mathieu-Daudé
2020-03-16 19:59   ` Richard Henderson
2020-03-16 16:06 ` [PATCH v3 16/19] target/arm: Do not build TCG objects when TCG is off Philippe Mathieu-Daudé
2020-03-16 16:06 ` [PATCH v3 17/19] hw/arm: Automatically select the 'virt' machine on KVM Philippe Mathieu-Daudé
2020-03-16 20:06   ` Richard Henderson
2020-09-29 18:26     ` Philippe Mathieu-Daudé
2020-09-29 20:06   ` Peter Maydell
2020-09-29 20:11     ` Peter Maydell
2020-09-29 20:36       ` Philippe Mathieu-Daudé
2020-10-01  7:38         ` Paolo Bonzini
2020-10-01 15:05           ` Philippe Mathieu-Daudé
2020-10-05  9:22             ` Philippe Mathieu-Daudé
2020-10-05 10:53               ` Paolo Bonzini
2020-03-16 16:06 ` [PATCH v3 18/19] hw/arm: Do not build to 'virt' machine on Xen Philippe Mathieu-Daudé
2020-03-16 17:05   ` Stefano Stabellini
2020-03-16 17:11   ` Peter Maydell
2020-03-16 19:00     ` Philippe Mathieu-Daudé
2020-03-16 16:06 ` [PATCH v3 19/19] .travis.yml: Add a KVM-only Aarch64 job Philippe Mathieu-Daudé
2020-03-16 20:03 ` [PATCH v3 00/19] Support disabling TCG on ARM (part 2) no-reply
2020-03-16 23:10 ` no-reply

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