* [PATCH v1 01/28] tests/docker: Install tools to cross-debug and build Linux kernels
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 02/28] tests/docker: Update VirGL git repository URL Alex Bennée
` (27 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Philippe Mathieu-Daudé, qemu-arm,
Alex Bennée, Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
We often run Linux kernels to test QEMU. We sometimes need
to build them manually to use non-default features. We only
miss the tiny 'bc' tool.
The ncurses library is helpful to run 'make menuconfig'.
Finally, gdb-multiarch allow us to debug a TCG guest when its
architecture is different than the host.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20200212202738.12986-1-philmd@redhat.com>
---
tests/docker/dockerfiles/debian10.docker | 3 +++
tests/docker/dockerfiles/debian9.docker | 3 +++
2 files changed, 6 insertions(+)
diff --git a/tests/docker/dockerfiles/debian10.docker b/tests/docker/dockerfiles/debian10.docker
index 5de79ae5527..2fcdc406e83 100644
--- a/tests/docker/dockerfiles/debian10.docker
+++ b/tests/docker/dockerfiles/debian10.docker
@@ -17,14 +17,17 @@ RUN apt update && \
DEBIAN_FRONTEND=noninteractive apt install -yy eatmydata && \
DEBIAN_FRONTEND=noninteractive eatmydata \
apt install -y --no-install-recommends \
+ bc \
bison \
build-essential \
ca-certificates \
clang \
dbus \
flex \
+ gdb-multiarch \
gettext \
git \
+ libncurses5-dev \
pkg-config \
psmisc \
python3 \
diff --git a/tests/docker/dockerfiles/debian9.docker b/tests/docker/dockerfiles/debian9.docker
index 8cbd742bb5f..92edbbf0f48 100644
--- a/tests/docker/dockerfiles/debian9.docker
+++ b/tests/docker/dockerfiles/debian9.docker
@@ -17,13 +17,16 @@ RUN apt update && \
DEBIAN_FRONTEND=noninteractive apt install -yy eatmydata && \
DEBIAN_FRONTEND=noninteractive eatmydata \
apt install -y --no-install-recommends \
+ bc \
bison \
build-essential \
ca-certificates \
clang \
flex \
+ gdb-multiarch \
gettext \
git \
+ libncurses5-dev \
pkg-config \
psmisc \
python3 \
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 02/28] tests/docker: Update VirGL git repository URL
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
2020-03-16 17:21 ` [PATCH v1 01/28] tests/docker: Install tools to cross-debug and build Linux kernels Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 03/28] tests/docker: Remove obsolete VirGL --with-glx configure option Alex Bennée
` (26 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Alex Bennée, qemu-arm,
Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <philmd@redhat.com>
freedesktop.org is moving to a GitLab instance,
use the new url.
- https://www.fooishbar.org/blog/gitlab-fdo-introduction/
- https://gitlab.freedesktop.org/freedesktop/freedesktop/-/wikis/home
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20200212202709.12665-2-philmd@redhat.com>
---
tests/docker/dockerfiles/debian-amd64.docker | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/docker/dockerfiles/debian-amd64.docker b/tests/docker/dockerfiles/debian-amd64.docker
index 3b860af1068..b67fad54cb7 100644
--- a/tests/docker/dockerfiles/debian-amd64.docker
+++ b/tests/docker/dockerfiles/debian-amd64.docker
@@ -27,7 +27,7 @@ RUN apt update && \
libegl1-mesa-dev \
libepoxy-dev \
libgbm-dev
-RUN git clone https://anongit.freedesktop.org/git/virglrenderer.git /usr/src/virglrenderer && \
+RUN git clone https://gitlab.freedesktop.org/virgl/virglrenderer.git /usr/src/virglrenderer && \
cd /usr/src/virglrenderer && git checkout virglrenderer-0.7.0
RUN cd /usr/src/virglrenderer && ./autogen.sh && ./configure --with-glx --disable-tests && make install
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 03/28] tests/docker: Remove obsolete VirGL --with-glx configure option
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
2020-03-16 17:21 ` [PATCH v1 01/28] tests/docker: Install tools to cross-debug and build Linux kernels Alex Bennée
2020-03-16 17:21 ` [PATCH v1 02/28] tests/docker: Update VirGL git repository URL Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 04/28] tests/docker: Update VirGL to v0.8.0 Alex Bennée
` (25 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Alex Bennée, qemu-arm,
Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <philmd@redhat.com>
The GLX configure option has been removed in 71c75f201d [*].
We missed that when updating to v0.7.0 in commit fab3220f97.
This silents:
configure: creating ./config.status
config.status: creating virglrenderer.pc
...
configure: WARNING: unrecognized options: --with-glx
[*] https://gitlab.freedesktop.org/virgl/virglrenderer/commit/71c75f201d
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20200212202709.12665-3-philmd@redhat.com>
---
tests/docker/dockerfiles/debian-amd64.docker | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/docker/dockerfiles/debian-amd64.docker b/tests/docker/dockerfiles/debian-amd64.docker
index b67fad54cb7..a1d40a56fa1 100644
--- a/tests/docker/dockerfiles/debian-amd64.docker
+++ b/tests/docker/dockerfiles/debian-amd64.docker
@@ -29,7 +29,7 @@ RUN apt update && \
libgbm-dev
RUN git clone https://gitlab.freedesktop.org/virgl/virglrenderer.git /usr/src/virglrenderer && \
cd /usr/src/virglrenderer && git checkout virglrenderer-0.7.0
-RUN cd /usr/src/virglrenderer && ./autogen.sh && ./configure --with-glx --disable-tests && make install
+RUN cd /usr/src/virglrenderer && ./autogen.sh && ./configure --disable-tests && make install
# netmap
RUN apt update && \
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 04/28] tests/docker: Update VirGL to v0.8.0
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (2 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 03/28] tests/docker: Remove obsolete VirGL --with-glx configure option Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 05/28] travis.yml: Set G_MESSAGES_DEBUG do report GLib errors Alex Bennée
` (24 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Alex Bennée, qemu-arm,
Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <philmd@redhat.com>
Building the qemu:debian-amd64 fails when building VirGL:
make[2]: Entering directory '/usr/src/virglrenderer/src/gallium/auxiliary'
CC cso_cache/cso_cache.lo
CC cso_cache/cso_hash.lo
CC os/os_misc.lo
CC util/u_debug.lo
CC util/u_debug_describe.lo
CC util/u_format.lo
GEN util/u_format_table.c
Traceback (most recent call last):
File "./util/u_format_table.py", line 168, in <module>
main()
File "./util/u_format_table.py", line 164, in main
write_format_table(formats)
File "./util/u_format_table.py", line 132, in write_format_table
print(" %s,\t/* is_array */" % (bool_map(format.is_array()),))
File "/usr/src/virglrenderer/src/gallium/auxiliary/util/u_format_parse.py", line 164, in is_array
return self.array_element() != None
File "/usr/src/virglrenderer/src/gallium/auxiliary/util/u_format_parse.py", line 73, in __eq__
return self.type == other.type and self.norm == other.norm and self.pure == other.pure and self.size == other.size
AttributeError: 'NoneType' object has no attribute 'type'
make[2]: Leaving directory '/usr/src/virglrenderer/src/gallium/auxiliary'
make[2]: *** [Makefile:906: util/u_format_table.c] Error 1
make[1]: *** [Makefile:631: install-recursive] Error 1
VirGL commits a8962eda1..a613dcc82 fix this problem.
Update to VirGL 0.8.0 which contains them.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20200212202709.12665-4-philmd@redhat.com>
---
tests/docker/dockerfiles/debian-amd64.docker | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/docker/dockerfiles/debian-amd64.docker b/tests/docker/dockerfiles/debian-amd64.docker
index a1d40a56fa1..c70c916343e 100644
--- a/tests/docker/dockerfiles/debian-amd64.docker
+++ b/tests/docker/dockerfiles/debian-amd64.docker
@@ -28,7 +28,7 @@ RUN apt update && \
libepoxy-dev \
libgbm-dev
RUN git clone https://gitlab.freedesktop.org/virgl/virglrenderer.git /usr/src/virglrenderer && \
- cd /usr/src/virglrenderer && git checkout virglrenderer-0.7.0
+ cd /usr/src/virglrenderer && git checkout virglrenderer-0.8.0
RUN cd /usr/src/virglrenderer && ./autogen.sh && ./configure --disable-tests && make install
# netmap
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 05/28] travis.yml: Set G_MESSAGES_DEBUG do report GLib errors
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (3 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 04/28] tests/docker: Update VirGL to v0.8.0 Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 06/28] gdbstub: make GDBState static and have common init function Alex Bennée
` (23 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Fam Zheng, Alex Bennée, qemu-arm,
Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé <philmd@redhat.com>
Since commit f5852efa293 we can display GLib errors with the QEMU
error reporting API. Set it to the 'error' level, as this helps
understanding failures from QEMU calls to GLib on Travis-CI.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20200316101544.22361-1-philmd@redhat.com>
---
.travis.yml | 1 +
1 file changed, 1 insertion(+)
diff --git a/.travis.yml b/.travis.yml
index b92798ac3b9..ccf68aa9abc 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -79,6 +79,7 @@ env:
- MAIN_SOFTMMU_TARGETS="aarch64-softmmu,mips64-softmmu,ppc64-softmmu,riscv64-softmmu,s390x-softmmu,x86_64-softmmu"
- CCACHE_SLOPPINESS="include_file_ctime,include_file_mtime"
- CCACHE_MAXSIZE=1G
+ - G_MESSAGES_DEBUG=error
git:
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 06/28] gdbstub: make GDBState static and have common init function
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (4 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 05/28] travis.yml: Set G_MESSAGES_DEBUG do report GLib errors Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 07/28] gdbstub: stop passing GDBState * around and use global Alex Bennée
` (22 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Damien Hedde, Richard Henderson, qemu-arm, Alex Bennée,
Philippe Mathieu-Daudé
Instead of allocating make this entirely static. We shall reduce the
size of the structure in later commits and dynamically allocate parts
of it. We introduce an init and reset helper function to keep all the
manipulation in one place.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Damien Hedde <damien.hedde@greensocs.com>
---
v2
- made entirely static, dropped dh/rth r-b tags due to changes
---
gdbstub.c | 168 ++++++++++++++++++++++++++----------------------------
1 file changed, 81 insertions(+), 87 deletions(-)
diff --git a/gdbstub.c b/gdbstub.c
index 22a2d630cdc..57d6e50ddfc 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -342,6 +342,7 @@ enum RSState {
RS_CHKSUM2,
};
typedef struct GDBState {
+ bool init; /* have we been initialised? */
CPUState *c_cpu; /* current CPU for step/continue ops */
CPUState *g_cpu; /* current CPU for other ops */
CPUState *query_cpu; /* for q{f|s}ThreadInfo */
@@ -372,7 +373,23 @@ typedef struct GDBState {
*/
static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
-static GDBState *gdbserver_state;
+static GDBState gdbserver_state;
+
+static void init_gdbserver_state(void)
+{
+ g_assert(!gdbserver_state.init);
+ memset(&gdbserver_state, 0, sizeof(GDBState));
+ gdbserver_state.init = true;
+}
+
+#ifndef CONFIG_USER_ONLY
+static void reset_gdbserver_state(void)
+{
+ g_free(gdbserver_state.processes);
+ gdbserver_state.processes = NULL;
+ gdbserver_state.process_num = 0;
+}
+#endif
bool gdb_has_xml;
@@ -425,8 +442,8 @@ int use_gdb_syscalls(void)
/* -semihosting-config target=auto */
/* On the first call check if gdb is connected and remember. */
if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
- gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
- : GDB_SYS_DISABLED);
+ gdb_syscall_mode = gdbserver_state.init ?
+ GDB_SYS_ENABLED : GDB_SYS_DISABLED;
}
return gdb_syscall_mode == GDB_SYS_ENABLED;
}
@@ -984,7 +1001,7 @@ static int gdb_breakpoint_insert(int type, target_ulong addr, target_ulong len)
int err = 0;
if (kvm_enabled()) {
- return kvm_insert_breakpoint(gdbserver_state->c_cpu, addr, len, type);
+ return kvm_insert_breakpoint(gdbserver_state.c_cpu, addr, len, type);
}
switch (type) {
@@ -1021,7 +1038,7 @@ static int gdb_breakpoint_remove(int type, target_ulong addr, target_ulong len)
int err = 0;
if (kvm_enabled()) {
- return kvm_remove_breakpoint(gdbserver_state->c_cpu, addr, len, type);
+ return kvm_remove_breakpoint(gdbserver_state.c_cpu, addr, len, type);
}
switch (type) {
@@ -1074,7 +1091,7 @@ static void gdb_breakpoint_remove_all(void)
CPUState *cpu;
if (kvm_enabled()) {
- kvm_remove_all_breakpoints(gdbserver_state->c_cpu);
+ kvm_remove_all_breakpoints(gdbserver_state.c_cpu);
return;
}
@@ -2601,7 +2618,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
void gdb_set_stop_cpu(CPUState *cpu)
{
- GDBProcess *p = gdb_get_cpu_process(gdbserver_state, cpu);
+ GDBProcess *p = gdb_get_cpu_process(&gdbserver_state, cpu);
if (!p->attached) {
/*
@@ -2611,14 +2628,14 @@ void gdb_set_stop_cpu(CPUState *cpu)
return;
}
- gdbserver_state->c_cpu = cpu;
- gdbserver_state->g_cpu = cpu;
+ gdbserver_state.c_cpu = cpu;
+ gdbserver_state.g_cpu = cpu;
}
#ifndef CONFIG_USER_ONLY
static void gdb_vm_state_change(void *opaque, int running, RunState state)
{
- GDBState *s = gdbserver_state;
+ GDBState *s = &gdbserver_state;
CPUState *cpu = s->c_cpu;
char buf[256];
char thread_id[16];
@@ -2722,17 +2739,16 @@ void gdb_do_syscallv(gdb_syscall_complete_cb cb, const char *fmt, va_list va)
char *p_end;
target_ulong addr;
uint64_t i64;
- GDBState *s;
- s = gdbserver_state;
- if (!s)
+ if (!gdbserver_state.init)
return;
- s->current_syscall_cb = cb;
+
+ gdbserver_state.current_syscall_cb = cb;
#ifndef CONFIG_USER_ONLY
vm_stop(RUN_STATE_DEBUG);
#endif
- p = s->syscall_buf;
- p_end = &s->syscall_buf[sizeof(s->syscall_buf)];
+ p = &gdbserver_state.syscall_buf[0];
+ p_end = &gdbserver_state.syscall_buf[sizeof(gdbserver_state.syscall_buf)];
*(p++) = 'F';
while (*fmt) {
if (*fmt == '%') {
@@ -2765,14 +2781,14 @@ void gdb_do_syscallv(gdb_syscall_complete_cb cb, const char *fmt, va_list va)
}
*p = 0;
#ifdef CONFIG_USER_ONLY
- put_packet(s, s->syscall_buf);
+ put_packet(&gdbserver_state, gdbserver_state.syscall_buf);
/* Return control to gdb for it to process the syscall request.
* Since the protocol requires that gdb hands control back to us
* using a "here are the results" F packet, we don't need to check
* gdb_handlesig's return value (which is the signal to deliver if
* execution was resumed via a continue packet).
*/
- gdb_handlesig(s->c_cpu, 0);
+ gdb_handlesig(gdbserver_state.c_cpu, 0);
#else
/* In this case wait to send the syscall packet until notification that
the CPU has stopped. This must be done because if the packet is sent
@@ -2780,7 +2796,7 @@ void gdb_do_syscallv(gdb_syscall_complete_cb cb, const char *fmt, va_list va)
is still in the running state, which can cause packets to be dropped
and state transition 'T' packets to be sent while the syscall is still
being processed. */
- qemu_cpu_kick(s->c_cpu);
+ qemu_cpu_kick(gdbserver_state.c_cpu);
#endif
}
@@ -2941,15 +2957,13 @@ static void gdb_read_byte(GDBState *s, uint8_t ch)
/* Tell the remote gdb that the process has exited. */
void gdb_exit(CPUArchState *env, int code)
{
- GDBState *s;
char buf[4];
- s = gdbserver_state;
- if (!s) {
+ if (!gdbserver_state.init) {
return;
}
#ifdef CONFIG_USER_ONLY
- if (gdbserver_fd < 0 || s->fd < 0) {
+ if (gdbserver_fd < 0 || gdbserver_state.fd < 0) {
return;
}
#endif
@@ -2957,10 +2971,10 @@ void gdb_exit(CPUArchState *env, int code)
trace_gdbstub_op_exiting((uint8_t)code);
snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
- put_packet(s, buf);
+ put_packet(&gdbserver_state, buf);
#ifndef CONFIG_USER_ONLY
- qemu_chr_fe_deinit(&s->chr, true);
+ qemu_chr_fe_deinit(&gdbserver_state.chr, true);
#endif
}
@@ -2993,12 +3007,10 @@ static void create_default_process(GDBState *s)
int
gdb_handlesig(CPUState *cpu, int sig)
{
- GDBState *s;
char buf[256];
int n;
- s = gdbserver_state;
- if (gdbserver_fd < 0 || s->fd < 0) {
+ if (gdbserver_fd < 0 || gdbserver_state.fd < 0) {
return sig;
}
@@ -3008,58 +3020,55 @@ gdb_handlesig(CPUState *cpu, int sig)
if (sig != 0) {
snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb(sig));
- put_packet(s, buf);
+ put_packet(&gdbserver_state, buf);
}
/* put_packet() might have detected that the peer terminated the
connection. */
- if (s->fd < 0) {
+ if (gdbserver_state.fd < 0) {
return sig;
}
sig = 0;
- s->state = RS_IDLE;
- s->running_state = 0;
- while (s->running_state == 0) {
- n = read(s->fd, buf, 256);
+ gdbserver_state.state = RS_IDLE;
+ gdbserver_state.running_state = 0;
+ while (gdbserver_state.running_state == 0) {
+ n = read(gdbserver_state.fd, buf, 256);
if (n > 0) {
int i;
for (i = 0; i < n; i++) {
- gdb_read_byte(s, buf[i]);
+ gdb_read_byte(&gdbserver_state, buf[i]);
}
} else {
/* XXX: Connection closed. Should probably wait for another
connection before continuing. */
if (n == 0) {
- close(s->fd);
+ close(gdbserver_state.fd);
}
- s->fd = -1;
+ gdbserver_state.fd = -1;
return sig;
}
}
- sig = s->signal;
- s->signal = 0;
+ sig = gdbserver_state.signal;
+ gdbserver_state.signal = 0;
return sig;
}
/* Tell the remote gdb that the process has exited due to SIG. */
void gdb_signalled(CPUArchState *env, int sig)
{
- GDBState *s;
char buf[4];
- s = gdbserver_state;
- if (gdbserver_fd < 0 || s->fd < 0) {
+ if (gdbserver_fd < 0 || gdbserver_state.fd < 0) {
return;
}
snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb(sig));
- put_packet(s, buf);
+ put_packet(&gdbserver_state, buf);
}
static bool gdb_accept(void)
{
- GDBState *s;
struct sockaddr_in sockaddr;
socklen_t len;
int fd;
@@ -3083,15 +3092,13 @@ static bool gdb_accept(void)
return false;
}
- s = g_malloc0(sizeof(GDBState));
- create_default_process(s);
- s->processes[0].attached = true;
- s->c_cpu = gdb_first_attached_cpu(s);
- s->g_cpu = s->c_cpu;
- s->fd = fd;
+ init_gdbserver_state();
+ create_default_process(&gdbserver_state);
+ gdbserver_state.processes[0].attached = true;
+ gdbserver_state.c_cpu = gdb_first_attached_cpu(&gdbserver_state);
+ gdbserver_state.g_cpu = gdbserver_state.c_cpu;
+ gdbserver_state.fd = fd;
gdb_has_xml = false;
-
- gdbserver_state = s;
return true;
}
@@ -3144,13 +3151,11 @@ int gdbserver_start(int port)
/* Disable gdb stub for child processes. */
void gdbserver_fork(CPUState *cpu)
{
- GDBState *s = gdbserver_state;
-
- if (gdbserver_fd < 0 || s->fd < 0) {
+ if (gdbserver_fd < 0 || gdbserver_state.fd < 0) {
return;
}
- close(s->fd);
- s->fd = -1;
+ close(gdbserver_state.fd);
+ gdbserver_state.fd = -1;
cpu_breakpoint_remove_all(cpu, BP_GDB);
cpu_watchpoint_remove_all(cpu, BP_GDB);
}
@@ -3167,7 +3172,7 @@ static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
int i;
for (i = 0; i < size; i++) {
- gdb_read_byte(gdbserver_state, buf[i]);
+ gdb_read_byte(&gdbserver_state, buf[i]);
}
}
@@ -3210,13 +3215,13 @@ static int gdb_monitor_write(Chardev *chr, const uint8_t *buf, int len)
const char *p = (const char *)buf;
int max_sz;
- max_sz = (sizeof(gdbserver_state->last_packet) - 2) / 2;
+ max_sz = (sizeof(gdbserver_state.last_packet) - 2) / 2;
for (;;) {
if (len <= max_sz) {
- gdb_monitor_output(gdbserver_state, p, len);
+ gdb_monitor_output(&gdbserver_state, p, len);
break;
}
- gdb_monitor_output(gdbserver_state, p, max_sz);
+ gdb_monitor_output(&gdbserver_state, p, max_sz);
p += max_sz;
len -= max_sz;
}
@@ -3308,18 +3313,10 @@ static void create_processes(GDBState *s)
create_default_process(s);
}
-static void cleanup_processes(GDBState *s)
-{
- g_free(s->processes);
- s->process_num = 0;
- s->processes = NULL;
-}
-
int gdbserver_start(const char *device)
{
trace_gdbstub_op_start(device);
- GDBState *s;
char gdbstub_device_name[128];
Chardev *chr = NULL;
Chardev *mon_chr;
@@ -3357,10 +3354,8 @@ int gdbserver_start(const char *device)
return -1;
}
- s = gdbserver_state;
- if (!s) {
- s = g_malloc0(sizeof(GDBState));
- gdbserver_state = s;
+ if (!gdbserver_state.init) {
+ init_gdbserver_state();
qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL);
@@ -3369,31 +3364,30 @@ int gdbserver_start(const char *device)
NULL, NULL, &error_abort);
monitor_init_hmp(mon_chr, false, &error_abort);
} else {
- qemu_chr_fe_deinit(&s->chr, true);
- mon_chr = s->mon_chr;
- cleanup_processes(s);
- memset(s, 0, sizeof(GDBState));
- s->mon_chr = mon_chr;
+ qemu_chr_fe_deinit(&gdbserver_state.chr, true);
+ mon_chr = gdbserver_state.mon_chr;
+ reset_gdbserver_state();
}
- create_processes(s);
+ create_processes(&gdbserver_state);
if (chr) {
- qemu_chr_fe_init(&s->chr, chr, &error_abort);
- qemu_chr_fe_set_handlers(&s->chr, gdb_chr_can_receive, gdb_chr_receive,
- gdb_chr_event, NULL, s, NULL, true);
+ qemu_chr_fe_init(&gdbserver_state.chr, chr, &error_abort);
+ qemu_chr_fe_set_handlers(&gdbserver_state.chr, gdb_chr_can_receive,
+ gdb_chr_receive, gdb_chr_event,
+ NULL, &gdbserver_state, NULL, true);
}
- s->state = chr ? RS_IDLE : RS_INACTIVE;
- s->mon_chr = mon_chr;
- s->current_syscall_cb = NULL;
+ gdbserver_state.state = chr ? RS_IDLE : RS_INACTIVE;
+ gdbserver_state.mon_chr = mon_chr;
+ gdbserver_state.current_syscall_cb = NULL;
return 0;
}
void gdbserver_cleanup(void)
{
- if (gdbserver_state) {
- put_packet(gdbserver_state, "W00");
+ if (gdbserver_state.init) {
+ put_packet(&gdbserver_state, "W00");
}
}
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 07/28] gdbstub: stop passing GDBState * around and use global
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (5 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 06/28] gdbstub: make GDBState static and have common init function Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 08/28] gdbstub: move str_buf to GDBState and use GString Alex Bennée
` (21 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Damien Hedde, Richard Henderson, qemu-arm, Alex Bennée,
Philippe Mathieu-Daudé
We only have one GDBState which should be allocated at the time we
process any commands. This will make further clean-up a bit easier.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Damien Hedde <damien.hedde@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
v3
- remove final *s paramters from function calls
v4
- a few fixups for coding style
---
gdbstub.c | 561 +++++++++++++++++++++++++++---------------------------
1 file changed, 278 insertions(+), 283 deletions(-)
diff --git a/gdbstub.c b/gdbstub.c
index 57d6e50ddfc..7243a2f7af9 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -397,21 +397,21 @@ bool gdb_has_xml;
/* XXX: This is not thread safe. Do we care? */
static int gdbserver_fd = -1;
-static int get_char(GDBState *s)
+static int get_char(void)
{
uint8_t ch;
int ret;
for(;;) {
- ret = qemu_recv(s->fd, &ch, 1, 0);
+ ret = qemu_recv(gdbserver_state.fd, &ch, 1, 0);
if (ret < 0) {
if (errno == ECONNRESET)
- s->fd = -1;
+ gdbserver_state.fd = -1;
if (errno != EINTR)
return -1;
} else if (ret == 0) {
- close(s->fd);
- s->fd = -1;
+ close(gdbserver_state.fd);
+ gdbserver_state.fd = -1;
return -1;
} else {
break;
@@ -449,11 +449,11 @@ int use_gdb_syscalls(void)
}
/* Resume execution. */
-static inline void gdb_continue(GDBState *s)
+static inline void gdb_continue(void)
{
#ifdef CONFIG_USER_ONLY
- s->running_state = 1;
+ gdbserver_state.running_state = 1;
trace_gdbstub_op_continue();
#else
if (!runstate_needs_reset()) {
@@ -467,7 +467,7 @@ static inline void gdb_continue(GDBState *s)
* Resume execution, per CPU actions. For user-mode emulation it's
* equivalent to gdb_continue.
*/
-static int gdb_continue_partial(GDBState *s, char *newstates)
+static int gdb_continue_partial(char *newstates)
{
CPUState *cpu;
int res = 0;
@@ -482,7 +482,7 @@ static int gdb_continue_partial(GDBState *s, char *newstates)
cpu_single_step(cpu, sstep_flags);
}
}
- s->running_state = 1;
+ gdbserver_state.running_state = 1;
#else
int flag = 0;
@@ -520,13 +520,13 @@ static int gdb_continue_partial(GDBState *s, char *newstates)
return res;
}
-static void put_buffer(GDBState *s, const uint8_t *buf, int len)
+static void put_buffer(const uint8_t *buf, int len)
{
#ifdef CONFIG_USER_ONLY
int ret;
while (len > 0) {
- ret = send(s->fd, buf, len, 0);
+ ret = send(gdbserver_state.fd, buf, len, 0);
if (ret < 0) {
if (errno != EINTR)
return;
@@ -538,7 +538,7 @@ static void put_buffer(GDBState *s, const uint8_t *buf, int len)
#else
/* XXX this blocks entire thread. Rewrite to use
* qemu_chr_fe_write and background I/O callbacks */
- qemu_chr_fe_write_all(&s->chr, buf, len);
+ qemu_chr_fe_write_all(&gdbserver_state.chr, buf, len);
#endif
}
@@ -620,17 +620,18 @@ static void hexdump(const char *buf, int len,
}
/* return -1 if error, 0 if OK */
-static int put_packet_binary(GDBState *s, const char *buf, int len, bool dump)
+static int put_packet_binary(const char *buf, int len, bool dump)
{
int csum, i;
uint8_t *p;
+ uint8_t *ps = &gdbserver_state.last_packet[0];
if (dump && trace_event_get_state_backends(TRACE_GDBSTUB_IO_BINARYREPLY)) {
hexdump(buf, len, trace_gdbstub_io_binaryreply);
}
for(;;) {
- p = s->last_packet;
+ p = ps;
*(p++) = '$';
memcpy(p, buf, len);
p += len;
@@ -642,11 +643,11 @@ static int put_packet_binary(GDBState *s, const char *buf, int len, bool dump)
*(p++) = tohex((csum >> 4) & 0xf);
*(p++) = tohex((csum) & 0xf);
- s->last_packet_len = p - s->last_packet;
- put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
+ gdbserver_state.last_packet_len = p - ps;
+ put_buffer(ps, gdbserver_state.last_packet_len);
#ifdef CONFIG_USER_ONLY
- i = get_char(s);
+ i = get_char();
if (i < 0)
return -1;
if (i == '+')
@@ -659,11 +660,11 @@ static int put_packet_binary(GDBState *s, const char *buf, int len, bool dump)
}
/* return -1 if error, 0 if OK */
-static int put_packet(GDBState *s, const char *buf)
+static int put_packet(const char *buf)
{
trace_gdbstub_io_reply(buf);
- return put_packet_binary(s, buf, strlen(buf), false);
+ return put_packet_binary(buf, strlen(buf), false);
}
/* Encode data using the encoding for 'x' packets. */
@@ -687,37 +688,38 @@ static int memtox(char *buf, const char *mem, int len)
return p - buf;
}
-static uint32_t gdb_get_cpu_pid(const GDBState *s, CPUState *cpu)
+static uint32_t gdb_get_cpu_pid(CPUState *cpu)
{
/* TODO: In user mode, we should use the task state PID */
if (cpu->cluster_index == UNASSIGNED_CLUSTER_INDEX) {
/* Return the default process' PID */
- return s->processes[s->process_num - 1].pid;
+ int index = gdbserver_state.process_num - 1;
+ return gdbserver_state.processes[index].pid;
}
return cpu->cluster_index + 1;
}
-static GDBProcess *gdb_get_process(const GDBState *s, uint32_t pid)
+static GDBProcess *gdb_get_process(uint32_t pid)
{
int i;
if (!pid) {
/* 0 means any process, we take the first one */
- return &s->processes[0];
+ return &gdbserver_state.processes[0];
}
- for (i = 0; i < s->process_num; i++) {
- if (s->processes[i].pid == pid) {
- return &s->processes[i];
+ for (i = 0; i < gdbserver_state.process_num; i++) {
+ if (gdbserver_state.processes[i].pid == pid) {
+ return &gdbserver_state.processes[i];
}
}
return NULL;
}
-static GDBProcess *gdb_get_cpu_process(const GDBState *s, CPUState *cpu)
+static GDBProcess *gdb_get_cpu_process(CPUState *cpu)
{
- return gdb_get_process(s, gdb_get_cpu_pid(s, cpu));
+ return gdb_get_process(gdb_get_cpu_pid(cpu));
}
static CPUState *find_cpu(uint32_t thread_id)
@@ -733,13 +735,12 @@ static CPUState *find_cpu(uint32_t thread_id)
return NULL;
}
-static CPUState *get_first_cpu_in_process(const GDBState *s,
- GDBProcess *process)
+static CPUState *get_first_cpu_in_process(GDBProcess *process)
{
CPUState *cpu;
CPU_FOREACH(cpu) {
- if (gdb_get_cpu_pid(s, cpu) == process->pid) {
+ if (gdb_get_cpu_pid(cpu) == process->pid) {
return cpu;
}
}
@@ -747,13 +748,13 @@ static CPUState *get_first_cpu_in_process(const GDBState *s,
return NULL;
}
-static CPUState *gdb_next_cpu_in_process(const GDBState *s, CPUState *cpu)
+static CPUState *gdb_next_cpu_in_process(CPUState *cpu)
{
- uint32_t pid = gdb_get_cpu_pid(s, cpu);
+ uint32_t pid = gdb_get_cpu_pid(cpu);
cpu = CPU_NEXT(cpu);
while (cpu) {
- if (gdb_get_cpu_pid(s, cpu) == pid) {
+ if (gdb_get_cpu_pid(cpu) == pid) {
break;
}
@@ -764,12 +765,12 @@ static CPUState *gdb_next_cpu_in_process(const GDBState *s, CPUState *cpu)
}
/* Return the cpu following @cpu, while ignoring unattached processes. */
-static CPUState *gdb_next_attached_cpu(const GDBState *s, CPUState *cpu)
+static CPUState *gdb_next_attached_cpu(CPUState *cpu)
{
cpu = CPU_NEXT(cpu);
while (cpu) {
- if (gdb_get_cpu_process(s, cpu)->attached) {
+ if (gdb_get_cpu_process(cpu)->attached) {
break;
}
@@ -780,29 +781,29 @@ static CPUState *gdb_next_attached_cpu(const GDBState *s, CPUState *cpu)
}
/* Return the first attached cpu */
-static CPUState *gdb_first_attached_cpu(const GDBState *s)
+static CPUState *gdb_first_attached_cpu(void)
{
CPUState *cpu = first_cpu;
- GDBProcess *process = gdb_get_cpu_process(s, cpu);
+ GDBProcess *process = gdb_get_cpu_process(cpu);
if (!process->attached) {
- return gdb_next_attached_cpu(s, cpu);
+ return gdb_next_attached_cpu(cpu);
}
return cpu;
}
-static CPUState *gdb_get_cpu(const GDBState *s, uint32_t pid, uint32_t tid)
+static CPUState *gdb_get_cpu(uint32_t pid, uint32_t tid)
{
GDBProcess *process;
CPUState *cpu;
if (!pid && !tid) {
/* 0 means any process/thread, we take the first attached one */
- return gdb_first_attached_cpu(s);
+ return gdb_first_attached_cpu();
} else if (pid && !tid) {
/* any thread in a specific process */
- process = gdb_get_process(s, pid);
+ process = gdb_get_process(pid);
if (process == NULL) {
return NULL;
@@ -812,7 +813,7 @@ static CPUState *gdb_get_cpu(const GDBState *s, uint32_t pid, uint32_t tid)
return NULL;
}
- return get_first_cpu_in_process(s, process);
+ return get_first_cpu_in_process(process);
} else {
/* a specific thread */
cpu = find_cpu(tid);
@@ -821,7 +822,7 @@ static CPUState *gdb_get_cpu(const GDBState *s, uint32_t pid, uint32_t tid)
return NULL;
}
- process = gdb_get_cpu_process(s, cpu);
+ process = gdb_get_cpu_process(cpu);
if (pid && process->pid != pid) {
return NULL;
@@ -835,13 +836,13 @@ static CPUState *gdb_get_cpu(const GDBState *s, uint32_t pid, uint32_t tid)
}
}
-static const char *get_feature_xml(const GDBState *s, const char *p,
- const char **newp, GDBProcess *process)
+static const char *get_feature_xml(const char *p, const char **newp,
+ GDBProcess *process)
{
size_t len;
int i;
const char *name;
- CPUState *cpu = get_first_cpu_in_process(s, process);
+ CPUState *cpu = get_first_cpu_in_process(process);
CPUClass *cc = CPU_GET_CLASS(cpu);
len = 0;
@@ -1076,13 +1077,13 @@ static inline void gdb_cpu_breakpoint_remove_all(CPUState *cpu)
#endif
}
-static void gdb_process_breakpoint_remove_all(const GDBState *s, GDBProcess *p)
+static void gdb_process_breakpoint_remove_all(GDBProcess *p)
{
- CPUState *cpu = get_first_cpu_in_process(s, p);
+ CPUState *cpu = get_first_cpu_in_process(p);
while (cpu) {
gdb_cpu_breakpoint_remove_all(cpu);
- cpu = gdb_next_cpu_in_process(s, cpu);
+ cpu = gdb_next_cpu_in_process(cpu);
}
}
@@ -1100,20 +1101,19 @@ static void gdb_breakpoint_remove_all(void)
}
}
-static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
+static void gdb_set_cpu_pc(target_ulong pc)
{
- CPUState *cpu = s->c_cpu;
+ CPUState *cpu = gdbserver_state.c_cpu;
cpu_synchronize_state(cpu);
cpu_set_pc(cpu, pc);
}
-static char *gdb_fmt_thread_id(const GDBState *s, CPUState *cpu,
- char *buf, size_t buf_size)
+static char *gdb_fmt_thread_id(CPUState *cpu, char *buf, size_t buf_size)
{
- if (s->multiprocess) {
+ if (gdbserver_state.multiprocess) {
snprintf(buf, buf_size, "p%02x.%02x",
- gdb_get_cpu_pid(s, cpu), cpu_gdb_index(cpu));
+ gdb_get_cpu_pid(cpu), cpu_gdb_index(cpu));
} else {
snprintf(buf, buf_size, "%02x", cpu_gdb_index(cpu));
}
@@ -1180,7 +1180,7 @@ static GDBThreadIdKind read_thread_id(const char *buf, const char **end_buf,
* returns -ENOTSUP if a command is unsupported, -EINVAL or -ERANGE if there is
* a format error, 0 on success.
*/
-static int gdb_handle_vcont(GDBState *s, const char *p)
+static int gdb_handle_vcont(const char *p)
{
int res, signal = 0;
char cur_action;
@@ -1255,36 +1255,36 @@ static int gdb_handle_vcont(GDBState *s, const char *p)
goto out;
case GDB_ALL_PROCESSES:
- cpu = gdb_first_attached_cpu(s);
+ cpu = gdb_first_attached_cpu();
while (cpu) {
if (newstates[cpu->cpu_index] == 1) {
newstates[cpu->cpu_index] = cur_action;
}
- cpu = gdb_next_attached_cpu(s, cpu);
+ cpu = gdb_next_attached_cpu(cpu);
}
break;
case GDB_ALL_THREADS:
- process = gdb_get_process(s, pid);
+ process = gdb_get_process(pid);
if (!process->attached) {
res = -EINVAL;
goto out;
}
- cpu = get_first_cpu_in_process(s, process);
+ cpu = get_first_cpu_in_process(process);
while (cpu) {
if (newstates[cpu->cpu_index] == 1) {
newstates[cpu->cpu_index] = cur_action;
}
- cpu = gdb_next_cpu_in_process(s, cpu);
+ cpu = gdb_next_cpu_in_process(cpu);
}
break;
case GDB_ONE_THREAD:
- cpu = gdb_get_cpu(s, pid, tid);
+ cpu = gdb_get_cpu(pid, tid);
/* invalid CPU/thread specified */
if (!cpu) {
@@ -1299,8 +1299,8 @@ static int gdb_handle_vcont(GDBState *s, const char *p)
break;
}
}
- s->signal = signal;
- gdb_continue_partial(s, newstates);
+ gdbserver_state.signal = signal;
+ gdb_continue_partial(newstates);
out:
g_free(newstates);
@@ -1409,7 +1409,6 @@ static int cmd_parse_params(const char *data, const char *schema,
}
typedef struct GdbCmdContext {
- GDBState *s;
GdbCmdVariant *params;
int num_params;
uint8_t mem_buf[MAX_PACKET_LENGTH];
@@ -1453,7 +1452,7 @@ static inline int startswith(const char *string, const char *pattern)
return !strncmp(string, pattern, strlen(pattern));
}
-static int process_string_cmd(GDBState *s, void *user_ctx, const char *data,
+static int process_string_cmd(void *user_ctx, const char *data,
const GdbCmdParseEntry *cmds, int num_cmds)
{
int i, schema_len, max_num_params = 0;
@@ -1490,7 +1489,6 @@ static int process_string_cmd(GDBState *s, void *user_ctx, const char *data,
return -1;
}
- gdb_ctx.s = s;
cmd->handler(&gdb_ctx, user_ctx);
return 0;
}
@@ -1498,8 +1496,7 @@ static int process_string_cmd(GDBState *s, void *user_ctx, const char *data,
return -1;
}
-static void run_cmd_parser(GDBState *s, const char *data,
- const GdbCmdParseEntry *cmd)
+static void run_cmd_parser(const char *data, const GdbCmdParseEntry *cmd)
{
if (!data) {
return;
@@ -1507,44 +1504,43 @@ static void run_cmd_parser(GDBState *s, const char *data,
/* In case there was an error during the command parsing we must
* send a NULL packet to indicate the command is not supported */
- if (process_string_cmd(s, NULL, data, cmd, 1)) {
- put_packet(s, "");
+ if (process_string_cmd(NULL, data, cmd, 1)) {
+ put_packet("");
}
}
static void handle_detach(GdbCmdContext *gdb_ctx, void *user_ctx)
{
GDBProcess *process;
- GDBState *s = gdb_ctx->s;
uint32_t pid = 1;
- if (s->multiprocess) {
+ if (gdbserver_state.multiprocess) {
if (!gdb_ctx->num_params) {
- put_packet(s, "E22");
+ put_packet("E22");
return;
}
pid = gdb_ctx->params[0].val_ul;
}
- process = gdb_get_process(s, pid);
- gdb_process_breakpoint_remove_all(s, process);
+ process = gdb_get_process(pid);
+ gdb_process_breakpoint_remove_all(process);
process->attached = false;
- if (pid == gdb_get_cpu_pid(s, s->c_cpu)) {
- s->c_cpu = gdb_first_attached_cpu(s);
+ if (pid == gdb_get_cpu_pid(gdbserver_state.c_cpu)) {
+ gdbserver_state.c_cpu = gdb_first_attached_cpu();
}
- if (pid == gdb_get_cpu_pid(s, s->g_cpu)) {
- s->g_cpu = gdb_first_attached_cpu(s);
+ if (pid == gdb_get_cpu_pid(gdbserver_state.g_cpu)) {
+ gdbserver_state.g_cpu = gdb_first_attached_cpu();
}
- if (!s->c_cpu) {
+ if (!gdbserver_state.c_cpu) {
/* No more process attached */
gdb_syscall_mode = GDB_SYS_DISABLED;
- gdb_continue(s);
+ gdb_continue();
}
- put_packet(s, "OK");
+ put_packet("OK");
}
static void handle_thread_alive(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1552,33 +1548,33 @@ static void handle_thread_alive(GdbCmdContext *gdb_ctx, void *user_ctx)
CPUState *cpu;
if (!gdb_ctx->num_params) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
if (gdb_ctx->params[0].thread_id.kind == GDB_READ_THREAD_ERR) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
- cpu = gdb_get_cpu(gdb_ctx->s, gdb_ctx->params[0].thread_id.pid,
+ cpu = gdb_get_cpu(gdb_ctx->params[0].thread_id.pid,
gdb_ctx->params[0].thread_id.tid);
if (!cpu) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
- put_packet(gdb_ctx->s, "OK");
+ put_packet("OK");
}
static void handle_continue(GdbCmdContext *gdb_ctx, void *user_ctx)
{
if (gdb_ctx->num_params) {
- gdb_set_cpu_pc(gdb_ctx->s, gdb_ctx->params[0].val_ull);
+ gdb_set_cpu_pc(gdb_ctx->params[0].val_ull);
}
- gdb_ctx->s->signal = 0;
- gdb_continue(gdb_ctx->s);
+ gdbserver_state.signal = 0;
+ gdb_continue();
}
static void handle_cont_with_sig(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1593,11 +1589,11 @@ static void handle_cont_with_sig(GdbCmdContext *gdb_ctx, void *user_ctx)
signal = gdb_ctx->params[0].val_ul;
}
- gdb_ctx->s->signal = gdb_signal_to_target(signal);
- if (gdb_ctx->s->signal == -1) {
- gdb_ctx->s->signal = 0;
+ gdbserver_state.signal = gdb_signal_to_target(signal);
+ if (gdbserver_state.signal == -1) {
+ gdbserver_state.signal = 0;
}
- gdb_continue(gdb_ctx->s);
+ gdb_continue();
}
static void handle_set_thread(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1605,24 +1601,24 @@ static void handle_set_thread(GdbCmdContext *gdb_ctx, void *user_ctx)
CPUState *cpu;
if (gdb_ctx->num_params != 2) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
if (gdb_ctx->params[1].thread_id.kind == GDB_READ_THREAD_ERR) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
if (gdb_ctx->params[1].thread_id.kind != GDB_ONE_THREAD) {
- put_packet(gdb_ctx->s, "OK");
+ put_packet("OK");
return;
}
- cpu = gdb_get_cpu(gdb_ctx->s, gdb_ctx->params[1].thread_id.pid,
+ cpu = gdb_get_cpu(gdb_ctx->params[1].thread_id.pid,
gdb_ctx->params[1].thread_id.tid);
if (!cpu) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
@@ -1632,15 +1628,15 @@ static void handle_set_thread(GdbCmdContext *gdb_ctx, void *user_ctx)
*/
switch (gdb_ctx->params[0].opcode) {
case 'c':
- gdb_ctx->s->c_cpu = cpu;
- put_packet(gdb_ctx->s, "OK");
+ gdbserver_state.c_cpu = cpu;
+ put_packet("OK");
break;
case 'g':
- gdb_ctx->s->g_cpu = cpu;
- put_packet(gdb_ctx->s, "OK");
+ gdbserver_state.g_cpu = cpu;
+ put_packet("OK");
break;
default:
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
break;
}
}
@@ -1650,7 +1646,7 @@ static void handle_insert_bp(GdbCmdContext *gdb_ctx, void *user_ctx)
int res;
if (gdb_ctx->num_params != 3) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
@@ -1658,14 +1654,14 @@ static void handle_insert_bp(GdbCmdContext *gdb_ctx, void *user_ctx)
gdb_ctx->params[1].val_ull,
gdb_ctx->params[2].val_ull);
if (res >= 0) {
- put_packet(gdb_ctx->s, "OK");
+ put_packet("OK");
return;
} else if (res == -ENOSYS) {
- put_packet(gdb_ctx->s, "");
+ put_packet("");
return;
}
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
}
static void handle_remove_bp(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1673,7 +1669,7 @@ static void handle_remove_bp(GdbCmdContext *gdb_ctx, void *user_ctx)
int res;
if (gdb_ctx->num_params != 3) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
@@ -1681,14 +1677,14 @@ static void handle_remove_bp(GdbCmdContext *gdb_ctx, void *user_ctx)
gdb_ctx->params[1].val_ull,
gdb_ctx->params[2].val_ull);
if (res >= 0) {
- put_packet(gdb_ctx->s, "OK");
+ put_packet("OK");
return;
} else if (res == -ENOSYS) {
- put_packet(gdb_ctx->s, "");
+ put_packet("");
return;
}
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
}
/*
@@ -1707,20 +1703,20 @@ static void handle_set_reg(GdbCmdContext *gdb_ctx, void *user_ctx)
int reg_size;
if (!gdb_has_xml) {
- put_packet(gdb_ctx->s, "");
+ put_packet("");
return;
}
if (gdb_ctx->num_params != 2) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
reg_size = strlen(gdb_ctx->params[1].data) / 2;
hextomem(gdb_ctx->mem_buf, gdb_ctx->params[1].data, reg_size);
- gdb_write_register(gdb_ctx->s->g_cpu, gdb_ctx->mem_buf,
+ gdb_write_register(gdbserver_state.g_cpu, gdb_ctx->mem_buf,
gdb_ctx->params[0].val_ull);
- put_packet(gdb_ctx->s, "OK");
+ put_packet("OK");
}
static void handle_get_reg(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1728,73 +1724,73 @@ static void handle_get_reg(GdbCmdContext *gdb_ctx, void *user_ctx)
int reg_size;
if (!gdb_has_xml) {
- put_packet(gdb_ctx->s, "");
+ put_packet("");
return;
}
if (!gdb_ctx->num_params) {
- put_packet(gdb_ctx->s, "E14");
+ put_packet("E14");
return;
}
- reg_size = gdb_read_register(gdb_ctx->s->g_cpu, gdb_ctx->mem_buf,
+ reg_size = gdb_read_register(gdbserver_state.g_cpu, gdb_ctx->mem_buf,
gdb_ctx->params[0].val_ull);
if (!reg_size) {
- put_packet(gdb_ctx->s, "E14");
+ put_packet("E14");
return;
}
memtohex(gdb_ctx->str_buf, gdb_ctx->mem_buf, reg_size);
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
static void handle_write_mem(GdbCmdContext *gdb_ctx, void *user_ctx)
{
if (gdb_ctx->num_params != 3) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
/* hextomem() reads 2*len bytes */
if (gdb_ctx->params[1].val_ull > strlen(gdb_ctx->params[2].data) / 2) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
hextomem(gdb_ctx->mem_buf, gdb_ctx->params[2].data,
gdb_ctx->params[1].val_ull);
- if (target_memory_rw_debug(gdb_ctx->s->g_cpu, gdb_ctx->params[0].val_ull,
+ if (target_memory_rw_debug(gdbserver_state.g_cpu, gdb_ctx->params[0].val_ull,
gdb_ctx->mem_buf,
gdb_ctx->params[1].val_ull, true)) {
- put_packet(gdb_ctx->s, "E14");
+ put_packet("E14");
return;
}
- put_packet(gdb_ctx->s, "OK");
+ put_packet("OK");
}
static void handle_read_mem(GdbCmdContext *gdb_ctx, void *user_ctx)
{
if (gdb_ctx->num_params != 2) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
/* memtohex() doubles the required space */
if (gdb_ctx->params[1].val_ull > MAX_PACKET_LENGTH / 2) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
- if (target_memory_rw_debug(gdb_ctx->s->g_cpu, gdb_ctx->params[0].val_ull,
+ if (target_memory_rw_debug(gdbserver_state.g_cpu, gdb_ctx->params[0].val_ull,
gdb_ctx->mem_buf,
gdb_ctx->params[1].val_ull, false)) {
- put_packet(gdb_ctx->s, "E14");
+ put_packet("E14");
return;
}
memtohex(gdb_ctx->str_buf, gdb_ctx->mem_buf, gdb_ctx->params[1].val_ull);
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
static void handle_write_all_regs(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1807,37 +1803,37 @@ static void handle_write_all_regs(GdbCmdContext *gdb_ctx, void *user_ctx)
return;
}
- cpu_synchronize_state(gdb_ctx->s->g_cpu);
+ cpu_synchronize_state(gdbserver_state.g_cpu);
registers = gdb_ctx->mem_buf;
len = strlen(gdb_ctx->params[0].data) / 2;
hextomem(registers, gdb_ctx->params[0].data, len);
- for (addr = 0; addr < gdb_ctx->s->g_cpu->gdb_num_g_regs && len > 0;
+ for (addr = 0; addr < gdbserver_state.g_cpu->gdb_num_g_regs && len > 0;
addr++) {
- reg_size = gdb_write_register(gdb_ctx->s->g_cpu, registers, addr);
+ reg_size = gdb_write_register(gdbserver_state.g_cpu, registers, addr);
len -= reg_size;
registers += reg_size;
}
- put_packet(gdb_ctx->s, "OK");
+ put_packet("OK");
}
static void handle_read_all_regs(GdbCmdContext *gdb_ctx, void *user_ctx)
{
target_ulong addr, len;
- cpu_synchronize_state(gdb_ctx->s->g_cpu);
+ cpu_synchronize_state(gdbserver_state.g_cpu);
len = 0;
- for (addr = 0; addr < gdb_ctx->s->g_cpu->gdb_num_g_regs; addr++) {
- len += gdb_read_register(gdb_ctx->s->g_cpu, gdb_ctx->mem_buf + len,
+ for (addr = 0; addr < gdbserver_state.g_cpu->gdb_num_g_regs; addr++) {
+ len += gdb_read_register(gdbserver_state.g_cpu, gdb_ctx->mem_buf + len,
addr);
}
memtohex(gdb_ctx->str_buf, gdb_ctx->mem_buf, len);
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
static void handle_file_io(GdbCmdContext *gdb_ctx, void *user_ctx)
{
- if (gdb_ctx->num_params >= 1 && gdb_ctx->s->current_syscall_cb) {
+ if (gdb_ctx->num_params >= 1 && gdbserver_state.current_syscall_cb) {
target_ulong ret, err;
ret = (target_ulong)gdb_ctx->params[0].val_ull;
@@ -1846,31 +1842,31 @@ static void handle_file_io(GdbCmdContext *gdb_ctx, void *user_ctx)
} else {
err = 0;
}
- gdb_ctx->s->current_syscall_cb(gdb_ctx->s->c_cpu, ret, err);
- gdb_ctx->s->current_syscall_cb = NULL;
+ gdbserver_state.current_syscall_cb(gdbserver_state.c_cpu, ret, err);
+ gdbserver_state.current_syscall_cb = NULL;
}
if (gdb_ctx->num_params >= 3 && gdb_ctx->params[2].opcode == (uint8_t)'C') {
- put_packet(gdb_ctx->s, "T02");
+ put_packet("T02");
return;
}
- gdb_continue(gdb_ctx->s);
+ gdb_continue();
}
static void handle_step(GdbCmdContext *gdb_ctx, void *user_ctx)
{
if (gdb_ctx->num_params) {
- gdb_set_cpu_pc(gdb_ctx->s, (target_ulong)gdb_ctx->params[0].val_ull);
+ gdb_set_cpu_pc((target_ulong)gdb_ctx->params[0].val_ull);
}
- cpu_single_step(gdb_ctx->s->c_cpu, sstep_flags);
- gdb_continue(gdb_ctx->s);
+ cpu_single_step(gdbserver_state.c_cpu, sstep_flags);
+ gdb_continue();
}
static void handle_v_cont_query(GdbCmdContext *gdb_ctx, void *user_ctx)
{
- put_packet(gdb_ctx->s, "vCont;c;C;s;S");
+ put_packet("vCont;c;C;s;S");
}
static void handle_v_cont(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1881,11 +1877,11 @@ static void handle_v_cont(GdbCmdContext *gdb_ctx, void *user_ctx)
return;
}
- res = gdb_handle_vcont(gdb_ctx->s, gdb_ctx->params[0].data);
+ res = gdb_handle_vcont(gdb_ctx->params[0].data);
if ((res == -EINVAL) || (res == -ERANGE)) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
} else if (res) {
- put_packet(gdb_ctx->s, "");
+ put_packet("");
}
}
@@ -1900,31 +1896,31 @@ static void handle_v_attach(GdbCmdContext *gdb_ctx, void *user_ctx)
goto cleanup;
}
- process = gdb_get_process(gdb_ctx->s, gdb_ctx->params[0].val_ul);
+ process = gdb_get_process(gdb_ctx->params[0].val_ul);
if (!process) {
goto cleanup;
}
- cpu = get_first_cpu_in_process(gdb_ctx->s, process);
+ cpu = get_first_cpu_in_process(process);
if (!cpu) {
goto cleanup;
}
process->attached = true;
- gdb_ctx->s->g_cpu = cpu;
- gdb_ctx->s->c_cpu = cpu;
+ gdbserver_state.g_cpu = cpu;
+ gdbserver_state.c_cpu = cpu;
- gdb_fmt_thread_id(gdb_ctx->s, cpu, thread_id, sizeof(thread_id));
+ gdb_fmt_thread_id(cpu, thread_id, sizeof(thread_id));
snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "T%02xthread:%s;",
GDB_SIGNAL_TRAP, thread_id);
cleanup:
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
static void handle_v_kill(GdbCmdContext *gdb_ctx, void *user_ctx)
{
/* Kill the target */
- put_packet(gdb_ctx->s, "OK");
+ put_packet("OK");
error_report("QEMU: Terminated via GDBstub");
exit(0);
}
@@ -1961,10 +1957,10 @@ static void handle_v_commands(GdbCmdContext *gdb_ctx, void *user_ctx)
return;
}
- if (process_string_cmd(gdb_ctx->s, NULL, gdb_ctx->params[0].data,
+ if (process_string_cmd(NULL, gdb_ctx->params[0].data,
gdb_v_commands_table,
ARRAY_SIZE(gdb_v_commands_table))) {
- put_packet(gdb_ctx->s, "");
+ put_packet("");
}
}
@@ -1973,7 +1969,7 @@ static void handle_query_qemu_sstepbits(GdbCmdContext *gdb_ctx, void *user_ctx)
snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf),
"ENABLE=%x,NOIRQ=%x,NOTIMER=%x", SSTEP_ENABLE,
SSTEP_NOIRQ, SSTEP_NOTIMER);
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
static void handle_set_qemu_sstep(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1983,13 +1979,13 @@ static void handle_set_qemu_sstep(GdbCmdContext *gdb_ctx, void *user_ctx)
}
sstep_flags = gdb_ctx->params[0].val_ul;
- put_packet(gdb_ctx->s, "OK");
+ put_packet("OK");
}
static void handle_query_qemu_sstep(GdbCmdContext *gdb_ctx, void *user_ctx)
{
snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "0x%x", sstep_flags);
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
static void handle_query_curr_tid(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -2003,33 +1999,32 @@ static void handle_query_curr_tid(GdbCmdContext *gdb_ctx, void *user_ctx)
* the first thread of the current process (gdb returns the
* first thread).
*/
- process = gdb_get_cpu_process(gdb_ctx->s, gdb_ctx->s->g_cpu);
- cpu = get_first_cpu_in_process(gdb_ctx->s, process);
- gdb_fmt_thread_id(gdb_ctx->s, cpu, thread_id, sizeof(thread_id));
+ process = gdb_get_cpu_process(gdbserver_state.g_cpu);
+ cpu = get_first_cpu_in_process(process);
+ gdb_fmt_thread_id(cpu, thread_id, sizeof(thread_id));
snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "QC%s", thread_id);
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
static void handle_query_threads(GdbCmdContext *gdb_ctx, void *user_ctx)
{
char thread_id[16];
- if (!gdb_ctx->s->query_cpu) {
- put_packet(gdb_ctx->s, "l");
+ if (!gdbserver_state.query_cpu) {
+ put_packet("l");
return;
}
- gdb_fmt_thread_id(gdb_ctx->s, gdb_ctx->s->query_cpu, thread_id,
+ gdb_fmt_thread_id(gdbserver_state.query_cpu, thread_id,
sizeof(thread_id));
snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "m%s", thread_id);
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
- gdb_ctx->s->query_cpu =
- gdb_next_attached_cpu(gdb_ctx->s, gdb_ctx->s->query_cpu);
+ put_packet(gdb_ctx->str_buf);
+ gdbserver_state.query_cpu = gdb_next_attached_cpu(gdbserver_state.query_cpu);
}
static void handle_query_first_threads(GdbCmdContext *gdb_ctx, void *user_ctx)
{
- gdb_ctx->s->query_cpu = gdb_first_attached_cpu(gdb_ctx->s);
+ gdbserver_state.query_cpu = gdb_first_attached_cpu();
handle_query_threads(gdb_ctx, user_ctx);
}
@@ -2040,11 +2035,11 @@ static void handle_query_thread_extra(GdbCmdContext *gdb_ctx, void *user_ctx)
if (!gdb_ctx->num_params ||
gdb_ctx->params[0].thread_id.kind == GDB_READ_THREAD_ERR) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
- cpu = gdb_get_cpu(gdb_ctx->s, gdb_ctx->params[0].thread_id.pid,
+ cpu = gdb_get_cpu(gdb_ctx->params[0].thread_id.pid,
gdb_ctx->params[0].thread_id.tid);
if (!cpu) {
return;
@@ -2052,7 +2047,7 @@ static void handle_query_thread_extra(GdbCmdContext *gdb_ctx, void *user_ctx)
cpu_synchronize_state(cpu);
- if (gdb_ctx->s->multiprocess && (gdb_ctx->s->process_num > 1)) {
+ if (gdbserver_state.multiprocess && (gdbserver_state.process_num > 1)) {
/* Print the CPU model and name in multiprocess mode */
ObjectClass *oc = object_get_class(OBJECT(cpu));
const char *cpu_model = object_class_get_name(oc);
@@ -2069,7 +2064,7 @@ static void handle_query_thread_extra(GdbCmdContext *gdb_ctx, void *user_ctx)
}
trace_gdbstub_op_extra_info((char *)gdb_ctx->mem_buf);
memtohex(gdb_ctx->str_buf, gdb_ctx->mem_buf, len);
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
#ifdef CONFIG_USER_ONLY
@@ -2077,14 +2072,14 @@ static void handle_query_offsets(GdbCmdContext *gdb_ctx, void *user_ctx)
{
TaskState *ts;
- ts = gdb_ctx->s->c_cpu->opaque;
+ ts = gdbserver_state.c_cpu->opaque;
snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf),
"Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
";Bss=" TARGET_ABI_FMT_lx,
ts->info->code_offset,
ts->info->data_offset,
ts->info->data_offset);
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
#else
static void handle_query_rcmd(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -2092,21 +2087,21 @@ static void handle_query_rcmd(GdbCmdContext *gdb_ctx, void *user_ctx)
int len;
if (!gdb_ctx->num_params) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
len = strlen(gdb_ctx->params[0].data);
if (len % 2) {
- put_packet(gdb_ctx->s, "E01");
+ put_packet("E01");
return;
}
len = len / 2;
hextomem(gdb_ctx->mem_buf, gdb_ctx->params[0].data, len);
gdb_ctx->mem_buf[len++] = 0;
- qemu_chr_be_write(gdb_ctx->s->mon_chr, gdb_ctx->mem_buf, len);
- put_packet(gdb_ctx->s, "OK");
+ qemu_chr_be_write(gdbserver_state.mon_chr, gdb_ctx->mem_buf, len);
+ put_packet("OK");
}
#endif
@@ -2125,11 +2120,11 @@ static void handle_query_supported(GdbCmdContext *gdb_ctx, void *user_ctx)
if (gdb_ctx->num_params &&
strstr(gdb_ctx->params[0].data, "multiprocess+")) {
- gdb_ctx->s->multiprocess = true;
+ gdbserver_state.multiprocess = true;
}
pstrcat(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), ";multiprocess+");
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
static void handle_query_xfer_features(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -2141,22 +2136,22 @@ static void handle_query_xfer_features(GdbCmdContext *gdb_ctx, void *user_ctx)
const char *p;
if (gdb_ctx->num_params < 3) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
- process = gdb_get_cpu_process(gdb_ctx->s, gdb_ctx->s->g_cpu);
- cc = CPU_GET_CLASS(gdb_ctx->s->g_cpu);
+ process = gdb_get_cpu_process(gdbserver_state.g_cpu);
+ cc = CPU_GET_CLASS(gdbserver_state.g_cpu);
if (!cc->gdb_core_xml_file) {
- put_packet(gdb_ctx->s, "");
+ put_packet("");
return;
}
gdb_has_xml = true;
p = gdb_ctx->params[0].data;
- xml = get_feature_xml(gdb_ctx->s, p, &p, process);
+ xml = get_feature_xml(p, &p, process);
if (!xml) {
- put_packet(gdb_ctx->s, "E00");
+ put_packet("E00");
return;
}
@@ -2164,7 +2159,7 @@ static void handle_query_xfer_features(GdbCmdContext *gdb_ctx, void *user_ctx)
len = gdb_ctx->params[2].val_ul;
total_len = strlen(xml);
if (addr > total_len) {
- put_packet(gdb_ctx->s, "E00");
+ put_packet("E00");
return;
}
@@ -2180,12 +2175,12 @@ static void handle_query_xfer_features(GdbCmdContext *gdb_ctx, void *user_ctx)
len = memtox(gdb_ctx->str_buf + 1, xml + addr, total_len - addr);
}
- put_packet_binary(gdb_ctx->s, gdb_ctx->str_buf, len + 1, true);
+ put_packet_binary(gdb_ctx->str_buf, len + 1, true);
}
static void handle_query_attached(GdbCmdContext *gdb_ctx, void *user_ctx)
{
- put_packet(gdb_ctx->s, GDB_ATTACHED);
+ put_packet(GDB_ATTACHED);
}
static void handle_query_qemu_supported(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -2194,7 +2189,7 @@ static void handle_query_qemu_supported(GdbCmdContext *gdb_ctx, void *user_ctx)
#ifndef CONFIG_USER_ONLY
pstrcat(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), ";PhyMemMode");
#endif
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
#ifndef CONFIG_USER_ONLY
@@ -2202,13 +2197,13 @@ static void handle_query_qemu_phy_mem_mode(GdbCmdContext *gdb_ctx,
void *user_ctx)
{
snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "%d", phy_memory_mode);
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
}
static void handle_set_qemu_phy_mem_mode(GdbCmdContext *gdb_ctx, void *user_ctx)
{
if (!gdb_ctx->num_params) {
- put_packet(gdb_ctx->s, "E22");
+ put_packet("E22");
return;
}
@@ -2217,7 +2212,7 @@ static void handle_set_qemu_phy_mem_mode(GdbCmdContext *gdb_ctx, void *user_ctx)
} else {
phy_memory_mode = 1;
}
- put_packet(gdb_ctx->s, "OK");
+ put_packet("OK");
}
#endif
@@ -2333,16 +2328,16 @@ static void handle_gen_query(GdbCmdContext *gdb_ctx, void *user_ctx)
return;
}
- if (!process_string_cmd(gdb_ctx->s, NULL, gdb_ctx->params[0].data,
+ if (!process_string_cmd(NULL, gdb_ctx->params[0].data,
gdb_gen_query_set_common_table,
ARRAY_SIZE(gdb_gen_query_set_common_table))) {
return;
}
- if (process_string_cmd(gdb_ctx->s, NULL, gdb_ctx->params[0].data,
+ if (process_string_cmd(NULL, gdb_ctx->params[0].data,
gdb_gen_query_table,
ARRAY_SIZE(gdb_gen_query_table))) {
- put_packet(gdb_ctx->s, "");
+ put_packet("");
}
}
@@ -2352,16 +2347,16 @@ static void handle_gen_set(GdbCmdContext *gdb_ctx, void *user_ctx)
return;
}
- if (!process_string_cmd(gdb_ctx->s, NULL, gdb_ctx->params[0].data,
+ if (!process_string_cmd(NULL, gdb_ctx->params[0].data,
gdb_gen_query_set_common_table,
ARRAY_SIZE(gdb_gen_query_set_common_table))) {
return;
}
- if (process_string_cmd(gdb_ctx->s, NULL, gdb_ctx->params[0].data,
+ if (process_string_cmd(NULL, gdb_ctx->params[0].data,
gdb_gen_set_table,
ARRAY_SIZE(gdb_gen_set_table))) {
- put_packet(gdb_ctx->s, "");
+ put_packet("");
}
}
@@ -2369,11 +2364,11 @@ static void handle_target_halt(GdbCmdContext *gdb_ctx, void *user_ctx)
{
char thread_id[16];
- gdb_fmt_thread_id(gdb_ctx->s, gdb_ctx->s->c_cpu, thread_id,
+ gdb_fmt_thread_id(gdbserver_state.c_cpu, thread_id,
sizeof(thread_id));
snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "T%02xthread:%s;",
GDB_SIGNAL_TRAP, thread_id);
- put_packet(gdb_ctx->s, gdb_ctx->str_buf);
+ put_packet(gdb_ctx->str_buf);
/*
* Remove all the breakpoints when this query is issued,
* because gdb is doing an initial connect and the state
@@ -2382,7 +2377,7 @@ static void handle_target_halt(GdbCmdContext *gdb_ctx, void *user_ctx)
gdb_breakpoint_remove_all();
}
-static int gdb_handle_packet(GDBState *s, const char *line_buf)
+static int gdb_handle_packet(const char *line_buf)
{
const GdbCmdParseEntry *cmd_parser = NULL;
@@ -2390,7 +2385,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
switch (line_buf[0]) {
case '!':
- put_packet(s, "OK");
+ put_packet("OK");
break;
case '?':
{
@@ -2605,12 +2600,12 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
break;
default:
/* put empty packet */
- put_packet(s, "");
+ put_packet("");
break;
}
if (cmd_parser) {
- run_cmd_parser(s, line_buf, cmd_parser);
+ run_cmd_parser(line_buf, cmd_parser);
}
return RS_IDLE;
@@ -2618,7 +2613,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
void gdb_set_stop_cpu(CPUState *cpu)
{
- GDBProcess *p = gdb_get_cpu_process(&gdbserver_state, cpu);
+ GDBProcess *p = gdb_get_cpu_process(cpu);
if (!p->attached) {
/*
@@ -2635,19 +2630,18 @@ void gdb_set_stop_cpu(CPUState *cpu)
#ifndef CONFIG_USER_ONLY
static void gdb_vm_state_change(void *opaque, int running, RunState state)
{
- GDBState *s = &gdbserver_state;
- CPUState *cpu = s->c_cpu;
+ CPUState *cpu = gdbserver_state.c_cpu;
char buf[256];
char thread_id[16];
const char *type;
int ret;
- if (running || s->state == RS_INACTIVE) {
+ if (running || gdbserver_state.state == RS_INACTIVE) {
return;
}
/* Is there a GDB syscall waiting to be sent? */
- if (s->current_syscall_cb) {
- put_packet(s, s->syscall_buf);
+ if (gdbserver_state.current_syscall_cb) {
+ put_packet(gdbserver_state.syscall_buf);
return;
}
@@ -2656,7 +2650,7 @@ static void gdb_vm_state_change(void *opaque, int running, RunState state)
return;
}
- gdb_fmt_thread_id(s, cpu, thread_id, sizeof(thread_id));
+ gdb_fmt_thread_id(cpu, thread_id, sizeof(thread_id));
switch (state) {
case RUN_STATE_DEBUG:
@@ -2721,7 +2715,7 @@ static void gdb_vm_state_change(void *opaque, int running, RunState state)
snprintf(buf, sizeof(buf), "T%02xthread:%s;", ret, thread_id);
send_packet:
- put_packet(s, buf);
+ put_packet(buf);
/* disable single step if it was enabled */
cpu_single_step(cpu, 0);
@@ -2740,8 +2734,9 @@ void gdb_do_syscallv(gdb_syscall_complete_cb cb, const char *fmt, va_list va)
target_ulong addr;
uint64_t i64;
- if (!gdbserver_state.init)
+ if (!gdbserver_state.init) {
return;
+ }
gdbserver_state.current_syscall_cb = cb;
#ifndef CONFIG_USER_ONLY
@@ -2781,7 +2776,7 @@ void gdb_do_syscallv(gdb_syscall_complete_cb cb, const char *fmt, va_list va)
}
*p = 0;
#ifdef CONFIG_USER_ONLY
- put_packet(&gdbserver_state, gdbserver_state.syscall_buf);
+ put_packet(gdbserver_state.syscall_buf);
/* Return control to gdb for it to process the syscall request.
* Since the protocol requires that gdb hands control back to us
* using a "here are the results" F packet, we don't need to check
@@ -2809,17 +2804,17 @@ void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
va_end(va);
}
-static void gdb_read_byte(GDBState *s, uint8_t ch)
+static void gdb_read_byte(uint8_t ch)
{
uint8_t reply;
#ifndef CONFIG_USER_ONLY
- if (s->last_packet_len) {
+ if (gdbserver_state.last_packet_len) {
/* Waiting for a response to the last packet. If we see the start
of a new command then abandon the previous response. */
if (ch == '-') {
trace_gdbstub_err_got_nack();
- put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
+ put_buffer((uint8_t *)gdbserver_state.last_packet, gdbserver_state.last_packet_len);
} else if (ch == '+') {
trace_gdbstub_io_got_ack();
} else {
@@ -2827,7 +2822,7 @@ static void gdb_read_byte(GDBState *s, uint8_t ch)
}
if (ch == '+' || ch == '$')
- s->last_packet_len = 0;
+ gdbserver_state.last_packet_len = 0;
if (ch != '$')
return;
}
@@ -2838,13 +2833,13 @@ static void gdb_read_byte(GDBState *s, uint8_t ch)
} else
#endif
{
- switch(s->state) {
+ switch(gdbserver_state.state) {
case RS_IDLE:
if (ch == '$') {
/* start of command packet */
- s->line_buf_index = 0;
- s->line_sum = 0;
- s->state = RS_GETLINE;
+ gdbserver_state.line_buf_index = 0;
+ gdbserver_state.line_sum = 0;
+ gdbserver_state.state = RS_GETLINE;
} else {
trace_gdbstub_err_garbage(ch);
}
@@ -2852,37 +2847,37 @@ static void gdb_read_byte(GDBState *s, uint8_t ch)
case RS_GETLINE:
if (ch == '}') {
/* start escape sequence */
- s->state = RS_GETLINE_ESC;
- s->line_sum += ch;
+ gdbserver_state.state = RS_GETLINE_ESC;
+ gdbserver_state.line_sum += ch;
} else if (ch == '*') {
/* start run length encoding sequence */
- s->state = RS_GETLINE_RLE;
- s->line_sum += ch;
+ gdbserver_state.state = RS_GETLINE_RLE;
+ gdbserver_state.line_sum += ch;
} else if (ch == '#') {
/* end of command, start of checksum*/
- s->state = RS_CHKSUM1;
- } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
+ gdbserver_state.state = RS_CHKSUM1;
+ } else if (gdbserver_state.line_buf_index >= sizeof(gdbserver_state.line_buf) - 1) {
trace_gdbstub_err_overrun();
- s->state = RS_IDLE;
+ gdbserver_state.state = RS_IDLE;
} else {
/* unescaped command character */
- s->line_buf[s->line_buf_index++] = ch;
- s->line_sum += ch;
+ gdbserver_state.line_buf[gdbserver_state.line_buf_index++] = ch;
+ gdbserver_state.line_sum += ch;
}
break;
case RS_GETLINE_ESC:
if (ch == '#') {
/* unexpected end of command in escape sequence */
- s->state = RS_CHKSUM1;
- } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
+ gdbserver_state.state = RS_CHKSUM1;
+ } else if (gdbserver_state.line_buf_index >= sizeof(gdbserver_state.line_buf) - 1) {
/* command buffer overrun */
trace_gdbstub_err_overrun();
- s->state = RS_IDLE;
+ gdbserver_state.state = RS_IDLE;
} else {
/* parse escaped character and leave escape state */
- s->line_buf[s->line_buf_index++] = ch ^ 0x20;
- s->line_sum += ch;
- s->state = RS_GETLINE;
+ gdbserver_state.line_buf[gdbserver_state.line_buf_index++] = ch ^ 0x20;
+ gdbserver_state.line_sum += ch;
+ gdbserver_state.state = RS_GETLINE;
}
break;
case RS_GETLINE_RLE:
@@ -2893,25 +2888,25 @@ static void gdb_read_byte(GDBState *s, uint8_t ch)
if (ch < ' ' || ch == '#' || ch == '$' || ch > 126) {
/* invalid RLE count encoding */
trace_gdbstub_err_invalid_repeat(ch);
- s->state = RS_GETLINE;
+ gdbserver_state.state = RS_GETLINE;
} else {
/* decode repeat length */
int repeat = ch - ' ' + 3;
- if (s->line_buf_index + repeat >= sizeof(s->line_buf) - 1) {
+ if (gdbserver_state.line_buf_index + repeat >= sizeof(gdbserver_state.line_buf) - 1) {
/* that many repeats would overrun the command buffer */
trace_gdbstub_err_overrun();
- s->state = RS_IDLE;
- } else if (s->line_buf_index < 1) {
+ gdbserver_state.state = RS_IDLE;
+ } else if (gdbserver_state.line_buf_index < 1) {
/* got a repeat but we have nothing to repeat */
trace_gdbstub_err_invalid_rle();
- s->state = RS_GETLINE;
+ gdbserver_state.state = RS_GETLINE;
} else {
/* repeat the last character */
- memset(s->line_buf + s->line_buf_index,
- s->line_buf[s->line_buf_index - 1], repeat);
- s->line_buf_index += repeat;
- s->line_sum += ch;
- s->state = RS_GETLINE;
+ memset(gdbserver_state.line_buf + gdbserver_state.line_buf_index,
+ gdbserver_state.line_buf[gdbserver_state.line_buf_index - 1], repeat);
+ gdbserver_state.line_buf_index += repeat;
+ gdbserver_state.line_sum += ch;
+ gdbserver_state.state = RS_GETLINE;
}
}
break;
@@ -2919,33 +2914,33 @@ static void gdb_read_byte(GDBState *s, uint8_t ch)
/* get high hex digit of checksum */
if (!isxdigit(ch)) {
trace_gdbstub_err_checksum_invalid(ch);
- s->state = RS_GETLINE;
+ gdbserver_state.state = RS_GETLINE;
break;
}
- s->line_buf[s->line_buf_index] = '\0';
- s->line_csum = fromhex(ch) << 4;
- s->state = RS_CHKSUM2;
+ gdbserver_state.line_buf[gdbserver_state.line_buf_index] = '\0';
+ gdbserver_state.line_csum = fromhex(ch) << 4;
+ gdbserver_state.state = RS_CHKSUM2;
break;
case RS_CHKSUM2:
/* get low hex digit of checksum */
if (!isxdigit(ch)) {
trace_gdbstub_err_checksum_invalid(ch);
- s->state = RS_GETLINE;
+ gdbserver_state.state = RS_GETLINE;
break;
}
- s->line_csum |= fromhex(ch);
+ gdbserver_state.line_csum |= fromhex(ch);
- if (s->line_csum != (s->line_sum & 0xff)) {
- trace_gdbstub_err_checksum_incorrect(s->line_sum, s->line_csum);
+ if (gdbserver_state.line_csum != (gdbserver_state.line_sum & 0xff)) {
+ trace_gdbstub_err_checksum_incorrect(gdbserver_state.line_sum, gdbserver_state.line_csum);
/* send NAK reply */
reply = '-';
- put_buffer(s, &reply, 1);
- s->state = RS_IDLE;
+ put_buffer(&reply, 1);
+ gdbserver_state.state = RS_IDLE;
} else {
/* send ACK reply */
reply = '+';
- put_buffer(s, &reply, 1);
- s->state = gdb_handle_packet(s, s->line_buf);
+ put_buffer(&reply, 1);
+ gdbserver_state.state = gdb_handle_packet(gdbserver_state.line_buf);
}
break;
default:
@@ -2971,7 +2966,7 @@ void gdb_exit(CPUArchState *env, int code)
trace_gdbstub_op_exiting((uint8_t)code);
snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code);
- put_packet(&gdbserver_state, buf);
+ put_packet(buf);
#ifndef CONFIG_USER_ONLY
qemu_chr_fe_deinit(&gdbserver_state.chr, true);
@@ -2988,7 +2983,7 @@ static void create_default_process(GDBState *s)
GDBProcess *process;
int max_pid = 0;
- if (s->process_num) {
+ if (gdbserver_state.process_num) {
max_pid = s->processes[s->process_num - 1].pid;
}
@@ -3020,7 +3015,7 @@ gdb_handlesig(CPUState *cpu, int sig)
if (sig != 0) {
snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb(sig));
- put_packet(&gdbserver_state, buf);
+ put_packet(buf);
}
/* put_packet() might have detected that the peer terminated the
connection. */
@@ -3037,7 +3032,7 @@ gdb_handlesig(CPUState *cpu, int sig)
int i;
for (i = 0; i < n; i++) {
- gdb_read_byte(&gdbserver_state, buf[i]);
+ gdb_read_byte(buf[i]);
}
} else {
/* XXX: Connection closed. Should probably wait for another
@@ -3064,7 +3059,7 @@ void gdb_signalled(CPUArchState *env, int sig)
}
snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb(sig));
- put_packet(&gdbserver_state, buf);
+ put_packet(buf);
}
static bool gdb_accept(void)
@@ -3095,7 +3090,7 @@ static bool gdb_accept(void)
init_gdbserver_state();
create_default_process(&gdbserver_state);
gdbserver_state.processes[0].attached = true;
- gdbserver_state.c_cpu = gdb_first_attached_cpu(&gdbserver_state);
+ gdbserver_state.c_cpu = gdb_first_attached_cpu();
gdbserver_state.g_cpu = gdbserver_state.c_cpu;
gdbserver_state.fd = fd;
gdb_has_xml = false;
@@ -3172,7 +3167,7 @@ static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
int i;
for (i = 0; i < size; i++) {
- gdb_read_byte(&gdbserver_state, buf[i]);
+ gdb_read_byte(buf[i]);
}
}
@@ -3188,7 +3183,7 @@ static void gdb_chr_event(void *opaque, QEMUChrEvent event)
s->processes[i].attached = !i;
}
- s->c_cpu = gdb_first_attached_cpu(s);
+ s->c_cpu = gdb_first_attached_cpu();
s->g_cpu = s->c_cpu;
vm_stop(RUN_STATE_PAUSED);
@@ -3199,7 +3194,7 @@ static void gdb_chr_event(void *opaque, QEMUChrEvent event)
}
}
-static void gdb_monitor_output(GDBState *s, const char *msg, int len)
+static void gdb_monitor_output(const char *msg, int len)
{
char buf[MAX_PACKET_LENGTH];
@@ -3207,7 +3202,7 @@ static void gdb_monitor_output(GDBState *s, const char *msg, int len)
if (len > (MAX_PACKET_LENGTH/2) - 1)
len = (MAX_PACKET_LENGTH/2) - 1;
memtohex(buf + 1, (uint8_t *)msg, len);
- put_packet(s, buf);
+ put_packet(buf);
}
static int gdb_monitor_write(Chardev *chr, const uint8_t *buf, int len)
@@ -3218,10 +3213,10 @@ static int gdb_monitor_write(Chardev *chr, const uint8_t *buf, int len)
max_sz = (sizeof(gdbserver_state.last_packet) - 2) / 2;
for (;;) {
if (len <= max_sz) {
- gdb_monitor_output(&gdbserver_state, p, len);
+ gdb_monitor_output(p, len);
break;
}
- gdb_monitor_output(&gdbserver_state, p, max_sz);
+ gdb_monitor_output(p, max_sz);
p += max_sz;
len -= max_sz;
}
@@ -3305,9 +3300,9 @@ static void create_processes(GDBState *s)
{
object_child_foreach(object_get_root(), find_cpu_clusters, s);
- if (s->processes) {
+ if (gdbserver_state.processes) {
/* Sort by PID */
- qsort(s->processes, s->process_num, sizeof(s->processes[0]), pid_order);
+ qsort(gdbserver_state.processes, gdbserver_state.process_num, sizeof(gdbserver_state.processes[0]), pid_order);
}
create_default_process(s);
@@ -3387,7 +3382,7 @@ int gdbserver_start(const char *device)
void gdbserver_cleanup(void)
{
if (gdbserver_state.init) {
- put_packet(&gdbserver_state, "W00");
+ put_packet("W00");
}
}
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 08/28] gdbstub: move str_buf to GDBState and use GString
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (6 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 07/28] gdbstub: stop passing GDBState * around and use global Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 09/28] gdbstub: move mem_buf to GDBState and use GByteArray Alex Bennée
` (20 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Damien Hedde, Richard Henderson, qemu-arm, Alex Bennée,
Philippe Mathieu-Daudé
Rather than having a static buffer replace str_buf with a GString
which we know can grow on demand. Convert the internal functions to
take a GString instead of a char * and length.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Damien Hedde <damien.hedde@greensocs.com>
Tested-by: Damien Hedde <damien.hedde@greensocs.com>
---
v2
- fix conflict from status gdbserver_state
- add put_strbuf helper
v3
- remove double ;;
---
gdbstub.c | 195 +++++++++++++++++++++++++-----------------------------
1 file changed, 90 insertions(+), 105 deletions(-)
diff --git a/gdbstub.c b/gdbstub.c
index 7243a2f7af9..f6b42825445 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -366,6 +366,7 @@ typedef struct GDBState {
int process_num;
char syscall_buf[256];
gdb_syscall_complete_cb current_syscall_cb;
+ GString *str_buf;
} GDBState;
/* By default use no IRQs and no timers while single stepping so as to
@@ -380,6 +381,7 @@ static void init_gdbserver_state(void)
g_assert(!gdbserver_state.init);
memset(&gdbserver_state, 0, sizeof(GDBState));
gdbserver_state.init = true;
+ gdbserver_state.str_buf = g_string_new(NULL);
}
#ifndef CONFIG_USER_ONLY
@@ -563,17 +565,15 @@ static inline int tohex(int v)
}
/* writes 2*len+1 bytes in buf */
-static void memtohex(char *buf, const uint8_t *mem, int len)
+static void memtohex(GString *buf, const uint8_t *mem, int len)
{
int i, c;
- char *q;
- q = buf;
for(i = 0; i < len; i++) {
c = mem[i];
- *q++ = tohex(c >> 4);
- *q++ = tohex(c & 0xf);
+ g_string_append_c(buf, tohex(c >> 4));
+ g_string_append_c(buf, tohex(c & 0xf));
}
- *q = '\0';
+ g_string_append_c(buf, '\0');
}
static void hextomem(uint8_t *mem, const char *buf, int len)
@@ -667,25 +667,28 @@ static int put_packet(const char *buf)
return put_packet_binary(buf, strlen(buf), false);
}
+static void put_strbuf(void)
+{
+ put_packet(gdbserver_state.str_buf->str);
+}
+
/* Encode data using the encoding for 'x' packets. */
-static int memtox(char *buf, const char *mem, int len)
+static void memtox(GString *buf, const char *mem, int len)
{
- char *p = buf;
char c;
while (len--) {
c = *(mem++);
switch (c) {
case '#': case '$': case '*': case '}':
- *(p++) = '}';
- *(p++) = c ^ 0x20;
+ g_string_append_c(buf, '}');
+ g_string_append_c(buf, c ^ 0x20);
break;
default:
- *(p++) = c;
+ g_string_append_c(buf, c);
break;
}
}
- return p - buf;
}
static uint32_t gdb_get_cpu_pid(CPUState *cpu)
@@ -1109,16 +1112,14 @@ static void gdb_set_cpu_pc(target_ulong pc)
cpu_set_pc(cpu, pc);
}
-static char *gdb_fmt_thread_id(CPUState *cpu, char *buf, size_t buf_size)
+static void gdb_append_thread_id(CPUState *cpu, GString *buf)
{
if (gdbserver_state.multiprocess) {
- snprintf(buf, buf_size, "p%02x.%02x",
- gdb_get_cpu_pid(cpu), cpu_gdb_index(cpu));
+ g_string_append_printf(buf, "p%02x.%02x",
+ gdb_get_cpu_pid(cpu), cpu_gdb_index(cpu));
} else {
- snprintf(buf, buf_size, "%02x", cpu_gdb_index(cpu));
+ g_string_append_printf(buf, "%02x", cpu_gdb_index(cpu));
}
-
- return buf;
}
typedef enum GDBThreadIdKind {
@@ -1412,7 +1413,6 @@ typedef struct GdbCmdContext {
GdbCmdVariant *params;
int num_params;
uint8_t mem_buf[MAX_PACKET_LENGTH];
- char str_buf[MAX_PACKET_LENGTH + 1];
} GdbCmdContext;
typedef void (*GdbCmdHandler)(GdbCmdContext *gdb_ctx, void *user_ctx);
@@ -1502,6 +1502,8 @@ static void run_cmd_parser(const char *data, const GdbCmdParseEntry *cmd)
return;
}
+ g_string_set_size(gdbserver_state.str_buf, 0);
+
/* In case there was an error during the command parsing we must
* send a NULL packet to indicate the command is not supported */
if (process_string_cmd(NULL, data, cmd, 1)) {
@@ -1740,8 +1742,8 @@ static void handle_get_reg(GdbCmdContext *gdb_ctx, void *user_ctx)
return;
}
- memtohex(gdb_ctx->str_buf, gdb_ctx->mem_buf, reg_size);
- put_packet(gdb_ctx->str_buf);
+ memtohex(gdbserver_state.str_buf, gdb_ctx->mem_buf, reg_size);
+ put_strbuf();
}
static void handle_write_mem(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1789,8 +1791,8 @@ static void handle_read_mem(GdbCmdContext *gdb_ctx, void *user_ctx)
return;
}
- memtohex(gdb_ctx->str_buf, gdb_ctx->mem_buf, gdb_ctx->params[1].val_ull);
- put_packet(gdb_ctx->str_buf);
+ memtohex(gdbserver_state.str_buf, gdb_ctx->mem_buf, gdb_ctx->params[1].val_ull);
+ put_strbuf();
}
static void handle_write_all_regs(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1827,8 +1829,8 @@ static void handle_read_all_regs(GdbCmdContext *gdb_ctx, void *user_ctx)
addr);
}
- memtohex(gdb_ctx->str_buf, gdb_ctx->mem_buf, len);
- put_packet(gdb_ctx->str_buf);
+ memtohex(gdbserver_state.str_buf, gdb_ctx->mem_buf, len);
+ put_strbuf();
}
static void handle_file_io(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1889,9 +1891,8 @@ static void handle_v_attach(GdbCmdContext *gdb_ctx, void *user_ctx)
{
GDBProcess *process;
CPUState *cpu;
- char thread_id[16];
- pstrcpy(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "E22");
+ g_string_assign(gdbserver_state.str_buf, "E22");
if (!gdb_ctx->num_params) {
goto cleanup;
}
@@ -1910,11 +1911,11 @@ static void handle_v_attach(GdbCmdContext *gdb_ctx, void *user_ctx)
gdbserver_state.g_cpu = cpu;
gdbserver_state.c_cpu = cpu;
- gdb_fmt_thread_id(cpu, thread_id, sizeof(thread_id));
- snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "T%02xthread:%s;",
- GDB_SIGNAL_TRAP, thread_id);
+ g_string_printf(gdbserver_state.str_buf, "T%02xthread:", GDB_SIGNAL_TRAP);
+ gdb_append_thread_id(cpu, gdbserver_state.str_buf);
+ g_string_append_c(gdbserver_state.str_buf, ';');
cleanup:
- put_packet(gdb_ctx->str_buf);
+ put_strbuf();
}
static void handle_v_kill(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1966,10 +1967,9 @@ static void handle_v_commands(GdbCmdContext *gdb_ctx, void *user_ctx)
static void handle_query_qemu_sstepbits(GdbCmdContext *gdb_ctx, void *user_ctx)
{
- snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf),
- "ENABLE=%x,NOIRQ=%x,NOTIMER=%x", SSTEP_ENABLE,
- SSTEP_NOIRQ, SSTEP_NOTIMER);
- put_packet(gdb_ctx->str_buf);
+ g_string_printf(gdbserver_state.str_buf, "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
+ SSTEP_ENABLE, SSTEP_NOIRQ, SSTEP_NOTIMER);
+ put_strbuf();
}
static void handle_set_qemu_sstep(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -1984,15 +1984,14 @@ static void handle_set_qemu_sstep(GdbCmdContext *gdb_ctx, void *user_ctx)
static void handle_query_qemu_sstep(GdbCmdContext *gdb_ctx, void *user_ctx)
{
- snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "0x%x", sstep_flags);
- put_packet(gdb_ctx->str_buf);
+ g_string_printf(gdbserver_state.str_buf, "0x%x", sstep_flags);
+ put_strbuf();
}
static void handle_query_curr_tid(GdbCmdContext *gdb_ctx, void *user_ctx)
{
CPUState *cpu;
GDBProcess *process;
- char thread_id[16];
/*
* "Current thread" remains vague in the spec, so always return
@@ -2001,24 +2000,21 @@ static void handle_query_curr_tid(GdbCmdContext *gdb_ctx, void *user_ctx)
*/
process = gdb_get_cpu_process(gdbserver_state.g_cpu);
cpu = get_first_cpu_in_process(process);
- gdb_fmt_thread_id(cpu, thread_id, sizeof(thread_id));
- snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "QC%s", thread_id);
- put_packet(gdb_ctx->str_buf);
+ g_string_assign(gdbserver_state.str_buf, "QC");
+ gdb_append_thread_id(cpu, gdbserver_state.str_buf);
+ put_strbuf();
}
static void handle_query_threads(GdbCmdContext *gdb_ctx, void *user_ctx)
{
- char thread_id[16];
-
if (!gdbserver_state.query_cpu) {
put_packet("l");
return;
}
- gdb_fmt_thread_id(gdbserver_state.query_cpu, thread_id,
- sizeof(thread_id));
- snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "m%s", thread_id);
- put_packet(gdb_ctx->str_buf);
+ g_string_assign(gdbserver_state.str_buf, "m");
+ gdb_append_thread_id(gdbserver_state.query_cpu, gdbserver_state.str_buf);
+ put_strbuf();
gdbserver_state.query_cpu = gdb_next_attached_cpu(gdbserver_state.query_cpu);
}
@@ -2030,8 +2026,8 @@ static void handle_query_first_threads(GdbCmdContext *gdb_ctx, void *user_ctx)
static void handle_query_thread_extra(GdbCmdContext *gdb_ctx, void *user_ctx)
{
+ g_autoptr(GString) rs = g_string_new(NULL);
CPUState *cpu;
- int len;
if (!gdb_ctx->num_params ||
gdb_ctx->params[0].thread_id.kind == GDB_READ_THREAD_ERR) {
@@ -2051,20 +2047,17 @@ static void handle_query_thread_extra(GdbCmdContext *gdb_ctx, void *user_ctx)
/* Print the CPU model and name in multiprocess mode */
ObjectClass *oc = object_get_class(OBJECT(cpu));
const char *cpu_model = object_class_get_name(oc);
- char *cpu_name = object_get_canonical_path_component(OBJECT(cpu));
- len = snprintf((char *)gdb_ctx->mem_buf, sizeof(gdb_ctx->str_buf) / 2,
- "%s %s [%s]", cpu_model, cpu_name,
- cpu->halted ? "halted " : "running");
- g_free(cpu_name);
+ g_autofree char *cpu_name;
+ cpu_name = object_get_canonical_path_component(OBJECT(cpu));
+ g_string_printf(rs, "%s %s [%s]", cpu_model, cpu_name,
+ cpu->halted ? "halted " : "running");
} else {
- /* memtohex() doubles the required space */
- len = snprintf((char *)gdb_ctx->mem_buf, sizeof(gdb_ctx->str_buf) / 2,
- "CPU#%d [%s]", cpu->cpu_index,
+ g_string_printf(rs, "CPU#%d [%s]", cpu->cpu_index,
cpu->halted ? "halted " : "running");
}
- trace_gdbstub_op_extra_info((char *)gdb_ctx->mem_buf);
- memtohex(gdb_ctx->str_buf, gdb_ctx->mem_buf, len);
- put_packet(gdb_ctx->str_buf);
+ trace_gdbstub_op_extra_info(rs->str);
+ memtohex(gdbserver_state.str_buf, (uint8_t *)rs->str, rs->len);
+ put_strbuf();
}
#ifdef CONFIG_USER_ONLY
@@ -2073,13 +2066,14 @@ static void handle_query_offsets(GdbCmdContext *gdb_ctx, void *user_ctx)
TaskState *ts;
ts = gdbserver_state.c_cpu->opaque;
- snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf),
- "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
- ";Bss=" TARGET_ABI_FMT_lx,
- ts->info->code_offset,
- ts->info->data_offset,
- ts->info->data_offset);
- put_packet(gdb_ctx->str_buf);
+ g_string_printf(gdbserver_state.str_buf,
+ "Text=" TARGET_ABI_FMT_lx
+ ";Data=" TARGET_ABI_FMT_lx
+ ";Bss=" TARGET_ABI_FMT_lx,
+ ts->info->code_offset,
+ ts->info->data_offset,
+ ts->info->data_offset);
+ put_strbuf();
}
#else
static void handle_query_rcmd(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -2110,12 +2104,10 @@ static void handle_query_supported(GdbCmdContext *gdb_ctx, void *user_ctx)
{
CPUClass *cc;
- snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "PacketSize=%x",
- MAX_PACKET_LENGTH);
+ g_string_printf(gdbserver_state.str_buf, "PacketSize=%x", MAX_PACKET_LENGTH);
cc = CPU_GET_CLASS(first_cpu);
if (cc->gdb_core_xml_file) {
- pstrcat(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf),
- ";qXfer:features:read+");
+ g_string_append(gdbserver_state.str_buf, ";qXfer:features:read+");
}
if (gdb_ctx->num_params &&
@@ -2123,8 +2115,8 @@ static void handle_query_supported(GdbCmdContext *gdb_ctx, void *user_ctx)
gdbserver_state.multiprocess = true;
}
- pstrcat(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), ";multiprocess+");
- put_packet(gdb_ctx->str_buf);
+ g_string_append(gdbserver_state.str_buf, ";multiprocess+");
+ put_strbuf();
}
static void handle_query_xfer_features(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -2168,14 +2160,15 @@ static void handle_query_xfer_features(GdbCmdContext *gdb_ctx, void *user_ctx)
}
if (len < total_len - addr) {
- gdb_ctx->str_buf[0] = 'm';
- len = memtox(gdb_ctx->str_buf + 1, xml + addr, len);
+ g_string_assign(gdbserver_state.str_buf, "m");
+ memtox(gdbserver_state.str_buf, xml + addr, len);
} else {
- gdb_ctx->str_buf[0] = 'l';
- len = memtox(gdb_ctx->str_buf + 1, xml + addr, total_len - addr);
+ g_string_assign(gdbserver_state.str_buf, "l");
+ memtox(gdbserver_state.str_buf, xml + addr, total_len - addr);
}
- put_packet_binary(gdb_ctx->str_buf, len + 1, true);
+ put_packet_binary(gdbserver_state.str_buf->str,
+ gdbserver_state.str_buf->len, true);
}
static void handle_query_attached(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -2185,19 +2178,19 @@ static void handle_query_attached(GdbCmdContext *gdb_ctx, void *user_ctx)
static void handle_query_qemu_supported(GdbCmdContext *gdb_ctx, void *user_ctx)
{
- snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "sstepbits;sstep");
+ g_string_printf(gdbserver_state.str_buf, "sstepbits;sstep");
#ifndef CONFIG_USER_ONLY
- pstrcat(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), ";PhyMemMode");
+ g_string_append(gdbserver_state.str_buf, ";PhyMemMode");
#endif
- put_packet(gdb_ctx->str_buf);
+ put_strbuf();
}
#ifndef CONFIG_USER_ONLY
static void handle_query_qemu_phy_mem_mode(GdbCmdContext *gdb_ctx,
void *user_ctx)
{
- snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "%d", phy_memory_mode);
- put_packet(gdb_ctx->str_buf);
+ g_string_printf(gdbserver_state.str_buf, "%d", phy_memory_mode);
+ put_strbuf();
}
static void handle_set_qemu_phy_mem_mode(GdbCmdContext *gdb_ctx, void *user_ctx)
@@ -2362,13 +2355,10 @@ static void handle_gen_set(GdbCmdContext *gdb_ctx, void *user_ctx)
static void handle_target_halt(GdbCmdContext *gdb_ctx, void *user_ctx)
{
- char thread_id[16];
-
- gdb_fmt_thread_id(gdbserver_state.c_cpu, thread_id,
- sizeof(thread_id));
- snprintf(gdb_ctx->str_buf, sizeof(gdb_ctx->str_buf), "T%02xthread:%s;",
- GDB_SIGNAL_TRAP, thread_id);
- put_packet(gdb_ctx->str_buf);
+ g_string_printf(gdbserver_state.str_buf, "T%02xthread:", GDB_SIGNAL_TRAP);
+ gdb_append_thread_id(gdbserver_state.c_cpu, gdbserver_state.str_buf);
+ g_string_append_c(gdbserver_state.str_buf, ';');
+ put_strbuf();
/*
* Remove all the breakpoints when this query is issued,
* because gdb is doing an initial connect and the state
@@ -2631,8 +2621,8 @@ void gdb_set_stop_cpu(CPUState *cpu)
static void gdb_vm_state_change(void *opaque, int running, RunState state)
{
CPUState *cpu = gdbserver_state.c_cpu;
- char buf[256];
- char thread_id[16];
+ g_autoptr(GString) buf = g_string_new(NULL);
+ g_autoptr(GString) tid = g_string_new(NULL);
const char *type;
int ret;
@@ -2650,7 +2640,7 @@ static void gdb_vm_state_change(void *opaque, int running, RunState state)
return;
}
- gdb_fmt_thread_id(cpu, thread_id, sizeof(thread_id));
+ gdb_append_thread_id(cpu, tid);
switch (state) {
case RUN_STATE_DEBUG:
@@ -2668,10 +2658,9 @@ static void gdb_vm_state_change(void *opaque, int running, RunState state)
}
trace_gdbstub_hit_watchpoint(type, cpu_gdb_index(cpu),
(target_ulong)cpu->watchpoint_hit->vaddr);
- snprintf(buf, sizeof(buf),
- "T%02xthread:%s;%swatch:" TARGET_FMT_lx ";",
- GDB_SIGNAL_TRAP, thread_id, type,
- (target_ulong)cpu->watchpoint_hit->vaddr);
+ g_string_printf(buf, "T%02xthread:%s;%swatch:" TARGET_FMT_lx ";",
+ GDB_SIGNAL_TRAP, tid->str, type,
+ (target_ulong)cpu->watchpoint_hit->vaddr);
cpu->watchpoint_hit = NULL;
goto send_packet;
} else {
@@ -2712,10 +2701,10 @@ static void gdb_vm_state_change(void *opaque, int running, RunState state)
break;
}
gdb_set_stop_cpu(cpu);
- snprintf(buf, sizeof(buf), "T%02xthread:%s;", ret, thread_id);
+ g_string_printf(buf, "T%02xthread:%s;", ret, tid->str);
send_packet:
- put_packet(buf);
+ put_packet(buf->str);
/* disable single step if it was enabled */
cpu_single_step(cpu, 0);
@@ -3196,13 +3185,9 @@ static void gdb_chr_event(void *opaque, QEMUChrEvent event)
static void gdb_monitor_output(const char *msg, int len)
{
- char buf[MAX_PACKET_LENGTH];
-
- buf[0] = 'O';
- if (len > (MAX_PACKET_LENGTH/2) - 1)
- len = (MAX_PACKET_LENGTH/2) - 1;
- memtohex(buf + 1, (uint8_t *)msg, len);
- put_packet(buf);
+ g_autoptr(GString) buf = g_string_new("O");
+ memtohex(buf, (uint8_t *)msg, len);
+ put_packet(buf->str);
}
static int gdb_monitor_write(Chardev *chr, const uint8_t *buf, int len)
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 09/28] gdbstub: move mem_buf to GDBState and use GByteArray
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (7 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 08/28] gdbstub: move str_buf to GDBState and use GString Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 10/28] gdbstub: add helper for 128 bit registers Alex Bennée
` (19 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Damien Hedde, Richard Henderson, qemu-arm, Alex Bennée,
Philippe Mathieu-Daudé
This is in preparation for further re-factoring of the register API
with the rest of the code. Theoretically the read register function
could overwrite the MAX_PACKET_LENGTH buffer although currently all
registers are well within the size range.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Damien Hedde <damien.hedde@greensocs.com>
Tested-by: Damien Hedde <damien.hedde@greensocs.com>
---
v4
- don't set_set to len on rcmd (it's zeroed before we get here)
v3
- fixed up email on Damien's tags
---
gdbstub.c | 56 ++++++++++++++++++++++++++++++++++---------------------
1 file changed, 35 insertions(+), 21 deletions(-)
diff --git a/gdbstub.c b/gdbstub.c
index f6b42825445..db537a712cc 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -367,6 +367,7 @@ typedef struct GDBState {
char syscall_buf[256];
gdb_syscall_complete_cb current_syscall_cb;
GString *str_buf;
+ GByteArray *mem_buf;
} GDBState;
/* By default use no IRQs and no timers while single stepping so as to
@@ -382,6 +383,7 @@ static void init_gdbserver_state(void)
memset(&gdbserver_state, 0, sizeof(GDBState));
gdbserver_state.init = true;
gdbserver_state.str_buf = g_string_new(NULL);
+ gdbserver_state.mem_buf = g_byte_array_sized_new(MAX_PACKET_LENGTH);
}
#ifndef CONFIG_USER_ONLY
@@ -576,12 +578,13 @@ static void memtohex(GString *buf, const uint8_t *mem, int len)
g_string_append_c(buf, '\0');
}
-static void hextomem(uint8_t *mem, const char *buf, int len)
+static void hextomem(GByteArray *mem, const char *buf, int len)
{
int i;
for(i = 0; i < len; i++) {
- mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
+ guint8 byte = fromhex(buf[0]) << 4 | fromhex(buf[1]);
+ g_byte_array_append(mem, &byte, 1);
buf += 2;
}
}
@@ -1412,7 +1415,6 @@ static int cmd_parse_params(const char *data, const char *schema,
typedef struct GdbCmdContext {
GdbCmdVariant *params;
int num_params;
- uint8_t mem_buf[MAX_PACKET_LENGTH];
} GdbCmdContext;
typedef void (*GdbCmdHandler)(GdbCmdContext *gdb_ctx, void *user_ctx);
@@ -1503,6 +1505,7 @@ static void run_cmd_parser(const char *data, const GdbCmdParseEntry *cmd)
}
g_string_set_size(gdbserver_state.str_buf, 0);
+ g_byte_array_set_size(gdbserver_state.mem_buf, 0);
/* In case there was an error during the command parsing we must
* send a NULL packet to indicate the command is not supported */
@@ -1715,8 +1718,8 @@ static void handle_set_reg(GdbCmdContext *gdb_ctx, void *user_ctx)
}
reg_size = strlen(gdb_ctx->params[1].data) / 2;
- hextomem(gdb_ctx->mem_buf, gdb_ctx->params[1].data, reg_size);
- gdb_write_register(gdbserver_state.g_cpu, gdb_ctx->mem_buf,
+ hextomem(gdbserver_state.mem_buf, gdb_ctx->params[1].data, reg_size);
+ gdb_write_register(gdbserver_state.g_cpu, gdbserver_state.mem_buf->data,
gdb_ctx->params[0].val_ull);
put_packet("OK");
}
@@ -1735,14 +1738,17 @@ static void handle_get_reg(GdbCmdContext *gdb_ctx, void *user_ctx)
return;
}
- reg_size = gdb_read_register(gdbserver_state.g_cpu, gdb_ctx->mem_buf,
+ reg_size = gdb_read_register(gdbserver_state.g_cpu,
+ gdbserver_state.mem_buf->data,
gdb_ctx->params[0].val_ull);
if (!reg_size) {
put_packet("E14");
return;
+ } else {
+ g_byte_array_set_size(gdbserver_state.mem_buf, reg_size);
}
- memtohex(gdbserver_state.str_buf, gdb_ctx->mem_buf, reg_size);
+ memtohex(gdbserver_state.str_buf, gdbserver_state.mem_buf->data, reg_size);
put_strbuf();
}
@@ -1759,11 +1765,11 @@ static void handle_write_mem(GdbCmdContext *gdb_ctx, void *user_ctx)
return;
}
- hextomem(gdb_ctx->mem_buf, gdb_ctx->params[2].data,
+ hextomem(gdbserver_state.mem_buf, gdb_ctx->params[2].data,
gdb_ctx->params[1].val_ull);
if (target_memory_rw_debug(gdbserver_state.g_cpu, gdb_ctx->params[0].val_ull,
- gdb_ctx->mem_buf,
- gdb_ctx->params[1].val_ull, true)) {
+ gdbserver_state.mem_buf->data,
+ gdbserver_state.mem_buf->len, true)) {
put_packet("E14");
return;
}
@@ -1784,14 +1790,17 @@ static void handle_read_mem(GdbCmdContext *gdb_ctx, void *user_ctx)
return;
}
+ g_byte_array_set_size(gdbserver_state.mem_buf, gdb_ctx->params[1].val_ull);
+
if (target_memory_rw_debug(gdbserver_state.g_cpu, gdb_ctx->params[0].val_ull,
- gdb_ctx->mem_buf,
- gdb_ctx->params[1].val_ull, false)) {
+ gdbserver_state.mem_buf->data,
+ gdbserver_state.mem_buf->len, false)) {
put_packet("E14");
return;
}
- memtohex(gdbserver_state.str_buf, gdb_ctx->mem_buf, gdb_ctx->params[1].val_ull);
+ memtohex(gdbserver_state.str_buf, gdbserver_state.mem_buf->data,
+ gdbserver_state.mem_buf->len);
put_strbuf();
}
@@ -1806,9 +1815,9 @@ static void handle_write_all_regs(GdbCmdContext *gdb_ctx, void *user_ctx)
}
cpu_synchronize_state(gdbserver_state.g_cpu);
- registers = gdb_ctx->mem_buf;
len = strlen(gdb_ctx->params[0].data) / 2;
- hextomem(registers, gdb_ctx->params[0].data, len);
+ hextomem(gdbserver_state.mem_buf, gdb_ctx->params[0].data, len);
+ registers = gdbserver_state.mem_buf->data;
for (addr = 0; addr < gdbserver_state.g_cpu->gdb_num_g_regs && len > 0;
addr++) {
reg_size = gdb_write_register(gdbserver_state.g_cpu, registers, addr);
@@ -1825,11 +1834,14 @@ static void handle_read_all_regs(GdbCmdContext *gdb_ctx, void *user_ctx)
cpu_synchronize_state(gdbserver_state.g_cpu);
len = 0;
for (addr = 0; addr < gdbserver_state.g_cpu->gdb_num_g_regs; addr++) {
- len += gdb_read_register(gdbserver_state.g_cpu, gdb_ctx->mem_buf + len,
+ len += gdb_read_register(gdbserver_state.g_cpu,
+ gdbserver_state.mem_buf->data + len,
addr);
}
+ /* FIXME: This is after the fact sizing */
+ g_byte_array_set_size(gdbserver_state.mem_buf, len);
- memtohex(gdbserver_state.str_buf, gdb_ctx->mem_buf, len);
+ memtohex(gdbserver_state.str_buf, gdbserver_state.mem_buf->data, len);
put_strbuf();
}
@@ -2078,6 +2090,7 @@ static void handle_query_offsets(GdbCmdContext *gdb_ctx, void *user_ctx)
#else
static void handle_query_rcmd(GdbCmdContext *gdb_ctx, void *user_ctx)
{
+ const guint8 zero = 0;
int len;
if (!gdb_ctx->num_params) {
@@ -2091,12 +2104,13 @@ static void handle_query_rcmd(GdbCmdContext *gdb_ctx, void *user_ctx)
return;
}
+ g_assert(gdbserver_state.mem_buf->len == 0);
len = len / 2;
- hextomem(gdb_ctx->mem_buf, gdb_ctx->params[0].data, len);
- gdb_ctx->mem_buf[len++] = 0;
- qemu_chr_be_write(gdbserver_state.mon_chr, gdb_ctx->mem_buf, len);
+ hextomem(gdbserver_state.mem_buf, gdb_ctx->params[0].data, len);
+ g_byte_array_append(gdbserver_state.mem_buf, &zero, 1);
+ qemu_chr_be_write(gdbserver_state.mon_chr, gdbserver_state.mem_buf->data,
+ gdbserver_state.mem_buf->len);
put_packet("OK");
-
}
#endif
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 10/28] gdbstub: add helper for 128 bit registers
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (8 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 09/28] gdbstub: move mem_buf to GDBState and use GByteArray Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 11/28] target/arm: use gdb_get_reg helpers Alex Bennée
` (18 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Richard Henderson, qemu-arm,
Alex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
- take care of endianess of the whole 128 bit word
---
include/exec/gdbstub.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h
index 08363969c14..59e366ba3af 100644
--- a/include/exec/gdbstub.h
+++ b/include/exec/gdbstub.h
@@ -102,6 +102,19 @@ static inline int gdb_get_reg64(uint8_t *mem_buf, uint64_t val)
return 8;
}
+static inline int gdb_get_reg128(uint8_t *mem_buf, uint64_t val_hi,
+ uint64_t val_lo)
+{
+#ifdef TARGET_WORDS_BIGENDIAN
+ stq_p(mem_buf, val_hi);
+ stq_p(mem_buf + 8, val_lo);
+#else
+ stq_p(mem_buf, val_lo);
+ stq_p(mem_buf + 8, val_hi);
+#endif
+ return 16;
+}
+
#if TARGET_LONG_BITS == 64
#define gdb_get_regl(buf, val) gdb_get_reg64(buf, val)
#define ldtul_p(addr) ldq_p(addr)
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 11/28] target/arm: use gdb_get_reg helpers
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (9 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 10/28] gdbstub: add helper for 128 bit registers Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 12/28] target/m68k: " Alex Bennée
` (17 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Philippe Mathieu-Daudé, Richard Henderson, qemu-arm,
Alex Bennée, Peter Maydell
This is cleaner than poking memory directly and will make later
clean-ups easier.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
- make sure we pass hi/lo correctly as quads are stored in LE order
---
target/arm/helper.c | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index b61ee73d18a..69104fb351d 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -106,21 +106,17 @@ static int aarch64_fpu_gdb_get_reg(CPUARMState *env, uint8_t *buf, int reg)
{
switch (reg) {
case 0 ... 31:
- /* 128 bit FP register */
- {
- uint64_t *q = aa64_vfp_qreg(env, reg);
- stq_le_p(buf, q[0]);
- stq_le_p(buf + 8, q[1]);
- return 16;
- }
+ {
+ /* 128 bit FP register - quads are in LE order */
+ uint64_t *q = aa64_vfp_qreg(env, reg);
+ return gdb_get_reg128(buf, q[1], q[0]);
+ }
case 32:
/* FPSR */
- stl_p(buf, vfp_get_fpsr(env));
- return 4;
+ return gdb_get_reg32(buf, vfp_get_fpsr(env));
case 33:
/* FPCR */
- stl_p(buf, vfp_get_fpcr(env));
- return 4;
+ return gdb_get_reg32(buf,vfp_get_fpcr(env));
default:
return 0;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 12/28] target/m68k: use gdb_get_reg helpers
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (10 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 11/28] target/arm: use gdb_get_reg helpers Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-17 9:48 ` Philippe Mathieu-Daudé
2020-03-16 17:21 ` [PATCH v1 13/28] target/i386: " Alex Bennée
` (16 subsequent siblings)
28 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, qemu-arm, Alex Bennée, Laurent Vivier
This is cleaner than poking memory directly and will make later
clean-ups easier.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
---
v3
- fix mem_buf references
- fix mem_buf + len cases
---
target/m68k/helper.c | 29 +++++++++++------------------
1 file changed, 11 insertions(+), 18 deletions(-)
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index baf7729af00..c23b70f854d 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -72,19 +72,15 @@ static int cf_fpu_gdb_get_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
{
if (n < 8) {
float_status s;
- stfq_p(mem_buf, floatx80_to_float64(env->fregs[n].d, &s));
- return 8;
+ return gdb_get_reg64(mem_buf, floatx80_to_float64(env->fregs[n].d, &s));
}
switch (n) {
case 8: /* fpcontrol */
- stl_be_p(mem_buf, env->fpcr);
- return 4;
+ return gdb_get_reg32(mem_buf, env->fpcr);
case 9: /* fpstatus */
- stl_be_p(mem_buf, env->fpsr);
- return 4;
+ return gdb_get_reg32(mem_buf, env->fpsr);
case 10: /* fpiar, not implemented */
- memset(mem_buf, 0, 4);
- return 4;
+ return gdb_get_reg32(mem_buf, 0);
}
return 0;
}
@@ -112,21 +108,18 @@ static int cf_fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
static int m68k_fpu_gdb_get_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
{
if (n < 8) {
- stw_be_p(mem_buf, env->fregs[n].l.upper);
- memset(mem_buf + 2, 0, 2);
- stq_be_p(mem_buf + 4, env->fregs[n].l.lower);
- return 12;
+ int len = gdb_get_reg16(mem_buf, env->fregs[n].l.upper);
+ len += gdb_get_reg16(mem_buf + len, 0);
+ len += gdb_get_reg64(mem_buf + len, env->fregs[n].l.lower);
+ return len;
}
switch (n) {
case 8: /* fpcontrol */
- stl_be_p(mem_buf, env->fpcr);
- return 4;
+ return gdb_get_reg32(mem_buf, env->fpcr);
case 9: /* fpstatus */
- stl_be_p(mem_buf, env->fpsr);
- return 4;
+ return gdb_get_reg32(mem_buf, env->fpsr);
case 10: /* fpiar, not implemented */
- memset(mem_buf, 0, 4);
- return 4;
+ return gdb_get_reg32(mem_buf, 0);
}
return 0;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [PATCH v1 12/28] target/m68k: use gdb_get_reg helpers
2020-03-16 17:21 ` [PATCH v1 12/28] target/m68k: " Alex Bennée
@ 2020-03-17 9:48 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 46+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-03-17 9:48 UTC (permalink / raw)
To: Alex Bennée, qemu-devel; +Cc: qemu-arm, Richard Henderson, Laurent Vivier
On 3/16/20 6:21 PM, Alex Bennée wrote:
> This is cleaner than poking memory directly and will make later
> clean-ups easier.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Reviewed-by: Laurent Vivier <laurent@vivier.eu>
>
> ---
> v3
> - fix mem_buf references
> - fix mem_buf + len cases
> ---
> target/m68k/helper.c | 29 +++++++++++------------------
> 1 file changed, 11 insertions(+), 18 deletions(-)
>
> diff --git a/target/m68k/helper.c b/target/m68k/helper.c
> index baf7729af00..c23b70f854d 100644
> --- a/target/m68k/helper.c
> +++ b/target/m68k/helper.c
> @@ -72,19 +72,15 @@ static int cf_fpu_gdb_get_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
> {
> if (n < 8) {
> float_status s;
> - stfq_p(mem_buf, floatx80_to_float64(env->fregs[n].d, &s));
> - return 8;
> + return gdb_get_reg64(mem_buf, floatx80_to_float64(env->fregs[n].d, &s));
> }
> switch (n) {
> case 8: /* fpcontrol */
> - stl_be_p(mem_buf, env->fpcr);
> - return 4;
> + return gdb_get_reg32(mem_buf, env->fpcr);
> case 9: /* fpstatus */
> - stl_be_p(mem_buf, env->fpsr);
> - return 4;
> + return gdb_get_reg32(mem_buf, env->fpsr);
> case 10: /* fpiar, not implemented */
> - memset(mem_buf, 0, 4);
> - return 4;
> + return gdb_get_reg32(mem_buf, 0);
> }
> return 0;
> }
> @@ -112,21 +108,18 @@ static int cf_fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
> static int m68k_fpu_gdb_get_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
> {
> if (n < 8) {
> - stw_be_p(mem_buf, env->fregs[n].l.upper);
> - memset(mem_buf + 2, 0, 2);
> - stq_be_p(mem_buf + 4, env->fregs[n].l.lower);
> - return 12;
> + int len = gdb_get_reg16(mem_buf, env->fregs[n].l.upper);
> + len += gdb_get_reg16(mem_buf + len, 0);
> + len += gdb_get_reg64(mem_buf + len, env->fregs[n].l.lower);
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> + return len;
> }
> switch (n) {
> case 8: /* fpcontrol */
> - stl_be_p(mem_buf, env->fpcr);
> - return 4;
> + return gdb_get_reg32(mem_buf, env->fpcr);
> case 9: /* fpstatus */
> - stl_be_p(mem_buf, env->fpsr);
> - return 4;
> + return gdb_get_reg32(mem_buf, env->fpsr);
> case 10: /* fpiar, not implemented */
> - memset(mem_buf, 0, 4);
> - return 4;
> + return gdb_get_reg32(mem_buf, 0);
> }
> return 0;
> }
>
^ permalink raw reply [flat|nested] 46+ messages in thread
* [PATCH v1 13/28] target/i386: use gdb_get_reg helpers
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (11 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 12/28] target/m68k: " Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-17 9:53 ` Philippe Mathieu-Daudé
2020-03-16 17:21 ` [PATCH v1 14/28] gdbstub: extend GByteArray to read register helpers Alex Bennée
` (15 subsequent siblings)
28 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Paolo Bonzini, qemu-arm, Alex Bennée, Eduardo Habkost,
Richard Henderson
This is cleaner than poking memory directly and will make later
clean-ups easier.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v7
- remove stray space
- fixup the floatx80 set/get routines
---
target/i386/gdbstub.c | 27 +++++++++++----------------
1 file changed, 11 insertions(+), 16 deletions(-)
diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index 572ead641ca..e4d8cb66c00 100644
--- a/target/i386/gdbstub.c
+++ b/target/i386/gdbstub.c
@@ -98,26 +98,22 @@ int x86_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
return gdb_get_reg64(mem_buf,
env->regs[gpr_map[n]] & 0xffffffffUL);
} else {
- memset(mem_buf, 0, sizeof(target_ulong));
- return sizeof(target_ulong);
+ return gdb_get_regl(mem_buf, 0);
}
} else {
return gdb_get_reg32(mem_buf, env->regs[gpr_map32[n]]);
}
} else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
-#ifdef USE_X86LDOUBLE
- /* FIXME: byteswap float values - after fixing fpregs layout. */
- memcpy(mem_buf, &env->fpregs[n - IDX_FP_REGS], 10);
-#else
- memset(mem_buf, 0, 10);
-#endif
- return 10;
+ floatx80 *fp = (floatx80 *) &env->fpregs[n - IDX_FP_REGS];
+ int len = gdb_get_reg64(mem_buf, cpu_to_le64(fp->low));
+ len += gdb_get_reg16(mem_buf + len, cpu_to_le16(fp->high));
+ return len;
} else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
n -= IDX_XMM_REGS;
if (n < CPU_NB_REGS32 || TARGET_LONG_BITS == 64) {
- stq_p(mem_buf, env->xmm_regs[n].ZMM_Q(0));
- stq_p(mem_buf + 8, env->xmm_regs[n].ZMM_Q(1));
- return 16;
+ return gdb_get_reg128(mem_buf,
+ env->xmm_regs[n].ZMM_Q(0),
+ env->xmm_regs[n].ZMM_Q(1));
}
} else {
switch (n) {
@@ -290,10 +286,9 @@ int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
return 4;
}
} else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
-#ifdef USE_X86LDOUBLE
- /* FIXME: byteswap float values - after fixing fpregs layout. */
- memcpy(&env->fpregs[n - IDX_FP_REGS], mem_buf, 10);
-#endif
+ floatx80 *fp = (floatx80 *) &env->fpregs[n - IDX_FP_REGS];
+ fp->low = le64_to_cpu(* (uint64_t *) mem_buf);
+ fp->high = le16_to_cpu(* (uint16_t *) (mem_buf + 8));
return 10;
} else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
n -= IDX_XMM_REGS;
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [PATCH v1 13/28] target/i386: use gdb_get_reg helpers
2020-03-16 17:21 ` [PATCH v1 13/28] target/i386: " Alex Bennée
@ 2020-03-17 9:53 ` Philippe Mathieu-Daudé
2020-03-17 10:05 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 46+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-03-17 9:53 UTC (permalink / raw)
To: Alex Bennée, qemu-devel
Cc: Paolo Bonzini, qemu-arm, Eduardo Habkost, Richard Henderson
On 3/16/20 6:21 PM, Alex Bennée wrote:
> This is cleaner than poking memory directly and will make later
> clean-ups easier.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> ---
> v7
> - remove stray space
> - fixup the floatx80 set/get routines
> ---
> target/i386/gdbstub.c | 27 +++++++++++----------------
> 1 file changed, 11 insertions(+), 16 deletions(-)
>
> diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
> index 572ead641ca..e4d8cb66c00 100644
> --- a/target/i386/gdbstub.c
> +++ b/target/i386/gdbstub.c
> @@ -98,26 +98,22 @@ int x86_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
> return gdb_get_reg64(mem_buf,
> env->regs[gpr_map[n]] & 0xffffffffUL);
> } else {
> - memset(mem_buf, 0, sizeof(target_ulong));
> - return sizeof(target_ulong);
> + return gdb_get_regl(mem_buf, 0);
> }
> } else {
> return gdb_get_reg32(mem_buf, env->regs[gpr_map32[n]]);
> }
> } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
> -#ifdef USE_X86LDOUBLE
> - /* FIXME: byteswap float values - after fixing fpregs layout. */
> - memcpy(mem_buf, &env->fpregs[n - IDX_FP_REGS], 10);
> -#else
> - memset(mem_buf, 0, 10);
> -#endif
> - return 10;
> + floatx80 *fp = (floatx80 *) &env->fpregs[n - IDX_FP_REGS];
> + int len = gdb_get_reg64(mem_buf, cpu_to_le64(fp->low));
> + len += gdb_get_reg16(mem_buf + len, cpu_to_le16(fp->high));
> + return len;
> } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
> n -= IDX_XMM_REGS;
> if (n < CPU_NB_REGS32 || TARGET_LONG_BITS == 64) {
> - stq_p(mem_buf, env->xmm_regs[n].ZMM_Q(0));
> - stq_p(mem_buf + 8, env->xmm_regs[n].ZMM_Q(1));
> - return 16;
> + return gdb_get_reg128(mem_buf,
> + env->xmm_regs[n].ZMM_Q(0),
> + env->xmm_regs[n].ZMM_Q(1));
> }
> } else {
> switch (n) {
> @@ -290,10 +286,9 @@ int x86_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
> return 4;
> }
> } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
> -#ifdef USE_X86LDOUBLE
> - /* FIXME: byteswap float values - after fixing fpregs layout. */
> - memcpy(&env->fpregs[n - IDX_FP_REGS], mem_buf, 10);
> -#endif
> + floatx80 *fp = (floatx80 *) &env->fpregs[n - IDX_FP_REGS];
> + fp->low = le64_to_cpu(* (uint64_t *) mem_buf);
> + fp->high = le16_to_cpu(* (uint16_t *) (mem_buf + 8));
> return 10;
> } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
> n -= IDX_XMM_REGS;
>
I'd prefer both USE_X86LDOUBLE hunks in a separate patch, anyway:
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH v1 13/28] target/i386: use gdb_get_reg helpers
2020-03-17 9:53 ` Philippe Mathieu-Daudé
@ 2020-03-17 10:05 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 46+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-03-17 10:05 UTC (permalink / raw)
To: Alex Bennée, qemu-devel
Cc: Paolo Bonzini, qemu-arm, Eduardo Habkost, Richard Henderson
On 3/17/20 10:53 AM, Philippe Mathieu-Daudé wrote:
> On 3/16/20 6:21 PM, Alex Bennée wrote:
>> This is cleaner than poking memory directly and will make later
>> clean-ups easier.
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>>
>> ---
>> v7
>> - remove stray space
>> - fixup the floatx80 set/get routines
>> ---
>> target/i386/gdbstub.c | 27 +++++++++++----------------
>> 1 file changed, 11 insertions(+), 16 deletions(-)
>>
>> diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
>> index 572ead641ca..e4d8cb66c00 100644
>> --- a/target/i386/gdbstub.c
>> +++ b/target/i386/gdbstub.c
>> @@ -98,26 +98,22 @@ int x86_cpu_gdb_read_register(CPUState *cs,
>> uint8_t *mem_buf, int n)
>> return gdb_get_reg64(mem_buf,
>> env->regs[gpr_map[n]] &
>> 0xffffffffUL);
>> } else {
>> - memset(mem_buf, 0, sizeof(target_ulong));
>> - return sizeof(target_ulong);
>> + return gdb_get_regl(mem_buf, 0);
>> }
>> } else {
>> return gdb_get_reg32(mem_buf, env->regs[gpr_map32[n]]);
>> }
>> } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
>> -#ifdef USE_X86LDOUBLE
>> - /* FIXME: byteswap float values - after fixing fpregs layout. */
>> - memcpy(mem_buf, &env->fpregs[n - IDX_FP_REGS], 10);
>> -#else
>> - memset(mem_buf, 0, 10);
>> -#endif
>> - return 10;
>> + floatx80 *fp = (floatx80 *) &env->fpregs[n - IDX_FP_REGS];
>> + int len = gdb_get_reg64(mem_buf, cpu_to_le64(fp->low));
>> + len += gdb_get_reg16(mem_buf + len, cpu_to_le16(fp->high));
>> + return len;
>> } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
>> n -= IDX_XMM_REGS;
>> if (n < CPU_NB_REGS32 || TARGET_LONG_BITS == 64) {
>> - stq_p(mem_buf, env->xmm_regs[n].ZMM_Q(0));
>> - stq_p(mem_buf + 8, env->xmm_regs[n].ZMM_Q(1));
>> - return 16;
>> + return gdb_get_reg128(mem_buf,
>> + env->xmm_regs[n].ZMM_Q(0),
>> + env->xmm_regs[n].ZMM_Q(1));
>> }
>> } else {
>> switch (n) {
>> @@ -290,10 +286,9 @@ int x86_cpu_gdb_write_register(CPUState *cs,
>> uint8_t *mem_buf, int n)
>> return 4;
>> }
>> } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
>> -#ifdef USE_X86LDOUBLE
>> - /* FIXME: byteswap float values - after fixing fpregs layout. */
>> - memcpy(&env->fpregs[n - IDX_FP_REGS], mem_buf, 10);
>> -#endif
>> + floatx80 *fp = (floatx80 *) &env->fpregs[n - IDX_FP_REGS];
>> + fp->low = le64_to_cpu(* (uint64_t *) mem_buf);
>> + fp->high = le16_to_cpu(* (uint16_t *) (mem_buf + 8));
Note, checkpatch complains for both lines:
ERROR: space prohibited after that '*' (ctx:BxW)
>> return 10;
>> } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
>> n -= IDX_XMM_REGS;
>>
>
> I'd prefer both USE_X86LDOUBLE hunks in a separate patch, anyway:
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
^ permalink raw reply [flat|nested] 46+ messages in thread
* [PATCH v1 14/28] gdbstub: extend GByteArray to read register helpers
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (12 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 13/28] target/i386: " Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 15/28] target/arm: prepare for multiple dynamic XMLs Alex Bennée
` (14 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Cornelia Huck, Sagar Karandikar, David Hildenbrand,
Mark Cave-Ayland, Max Filippov, Alistair Francis,
Edgar E. Iglesias, Marek Vasut, open list:PowerPC TCG CPUs,
Aleksandar Rikalo, David Gibson, Philippe Mathieu-Daudé,
Artyom Tarasenko, Eduardo Habkost, Richard Henderson,
open list:S390 TCG CPUs, qemu-arm, Stafford Horne,
Alex Bennée, Richard Henderson, Damien Hedde,
open list:RISC-V TCG CPUs, Bastian Koppelmann, Chris Wulff,
Laurent Vivier, Michael Walle, Palmer Dabbelt,
Aleksandar Markovic, Paolo Bonzini, Aurelien Jarno
Instead of passing a pointer to memory now just extend the GByteArray
to all the read register helpers. They can then safely append their
data through the normal way. We don't bother with this abstraction for
write registers as we have already ensured the buffer being copied
from is the correct size.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Damien Hedde <damien.hedde@greensocs.com>
---
v4
- fix mem_buf calculation for ppc_maybe_bswap_register
v5
- introduce gdb_get_reg_ptr and use for ppc
---
include/exec/gdbstub.h | 59 +++++++++++++++++++++++----------
include/hw/core/cpu.h | 2 +-
target/alpha/cpu.h | 2 +-
target/arm/cpu.h | 4 +--
target/cris/cpu.h | 4 +--
target/hppa/cpu.h | 2 +-
target/i386/cpu.h | 2 +-
target/lm32/cpu.h | 2 +-
target/m68k/cpu.h | 2 +-
target/microblaze/cpu.h | 2 +-
target/mips/internal.h | 2 +-
target/openrisc/cpu.h | 2 +-
target/ppc/cpu.h | 4 +--
target/riscv/cpu.h | 2 +-
target/s390x/internal.h | 2 +-
target/sh4/cpu.h | 2 +-
target/sparc/cpu.h | 2 +-
target/xtensa/cpu.h | 2 +-
gdbstub.c | 20 +++++------
hw/core/cpu.c | 2 +-
target/alpha/gdbstub.c | 2 +-
target/arm/gdbstub.c | 2 +-
target/arm/gdbstub64.c | 2 +-
target/arm/helper.c | 19 +++++------
target/cris/gdbstub.c | 4 +--
target/hppa/gdbstub.c | 2 +-
target/i386/gdbstub.c | 2 +-
target/lm32/gdbstub.c | 2 +-
target/m68k/gdbstub.c | 2 +-
target/m68k/helper.c | 4 +--
target/microblaze/gdbstub.c | 2 +-
target/mips/gdbstub.c | 2 +-
target/nios2/cpu.c | 2 +-
target/openrisc/gdbstub.c | 2 +-
target/ppc/gdbstub.c | 48 +++++++++++++++------------
target/ppc/translate_init.inc.c | 54 ++++++++++++++++--------------
target/riscv/gdbstub.c | 20 +++++------
target/s390x/gdbstub.c | 30 ++++++++---------
target/sh4/gdbstub.c | 2 +-
target/sparc/gdbstub.c | 2 +-
target/xtensa/gdbstub.c | 2 +-
41 files changed, 179 insertions(+), 149 deletions(-)
diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h
index 59e366ba3af..30b909ebd27 100644
--- a/include/exec/gdbstub.h
+++ b/include/exec/gdbstub.h
@@ -68,53 +68,76 @@ void gdb_signalled(CPUArchState *, int);
void gdbserver_fork(CPUState *);
#endif
/* Get or set a register. Returns the size of the register. */
-typedef int (*gdb_reg_cb)(CPUArchState *env, uint8_t *buf, int reg);
+typedef int (*gdb_get_reg_cb)(CPUArchState *env, GByteArray *buf, int reg);
+typedef int (*gdb_set_reg_cb)(CPUArchState *env, uint8_t *buf, int reg);
void gdb_register_coprocessor(CPUState *cpu,
- gdb_reg_cb get_reg, gdb_reg_cb set_reg,
+ gdb_get_reg_cb get_reg, gdb_set_reg_cb set_reg,
int num_regs, const char *xml, int g_pos);
-/* The GDB remote protocol transfers values in target byte order. This means
- * we can use the raw memory access routines to access the value buffer.
- * Conveniently, these also handle the case where the buffer is mis-aligned.
+/*
+ * The GDB remote protocol transfers values in target byte order. As
+ * the gdbstub may be batching up several register values we always
+ * append to the array.
*/
-static inline int gdb_get_reg8(uint8_t *mem_buf, uint8_t val)
+static inline int gdb_get_reg8(GByteArray *buf, uint8_t val)
{
- stb_p(mem_buf, val);
+ g_byte_array_append(buf, &val, 1);
return 1;
}
-static inline int gdb_get_reg16(uint8_t *mem_buf, uint16_t val)
+static inline int gdb_get_reg16(GByteArray *buf, uint16_t val)
{
- stw_p(mem_buf, val);
+ uint16_t to_word = tswap16(val);
+ g_byte_array_append(buf, (uint8_t *) &to_word, 2);
return 2;
}
-static inline int gdb_get_reg32(uint8_t *mem_buf, uint32_t val)
+static inline int gdb_get_reg32(GByteArray *buf, uint32_t val)
{
- stl_p(mem_buf, val);
+ uint32_t to_long = tswap32(val);
+ g_byte_array_append(buf, (uint8_t *) &to_long, 4);
return 4;
}
-static inline int gdb_get_reg64(uint8_t *mem_buf, uint64_t val)
+static inline int gdb_get_reg64(GByteArray *buf, uint64_t val)
{
- stq_p(mem_buf, val);
+ uint64_t to_quad = tswap64(val);
+ g_byte_array_append(buf, (uint8_t *) &to_quad, 8);
return 8;
}
-static inline int gdb_get_reg128(uint8_t *mem_buf, uint64_t val_hi,
+static inline int gdb_get_reg128(GByteArray *buf, uint64_t val_hi,
uint64_t val_lo)
{
+ uint64_t to_quad;
#ifdef TARGET_WORDS_BIGENDIAN
- stq_p(mem_buf, val_hi);
- stq_p(mem_buf + 8, val_lo);
+ to_quad = tswap64(val_hi);
+ g_byte_array_append(buf, (uint8_t *) &to_quad, 8);
+ to_quad = tswap64(val_lo);
+ g_byte_array_append(buf, (uint8_t *) &to_quad, 8);
#else
- stq_p(mem_buf, val_lo);
- stq_p(mem_buf + 8, val_hi);
+ to_quad = tswap64(val_lo);
+ g_byte_array_append(buf, (uint8_t *) &to_quad, 8);
+ to_quad = tswap64(val_hi);
+ g_byte_array_append(buf, (uint8_t *) &to_quad, 8);
#endif
return 16;
}
+/**
+ * gdb_get_reg_ptr: get pointer to start of last element
+ * @len: length of element
+ *
+ * This is a helper function to extract the pointer to the last
+ * element for additional processing. Some front-ends do additional
+ * dynamic swapping of the elements based on CPU state.
+ */
+static inline uint8_t * gdb_get_reg_ptr(GByteArray *buf, int len)
+{
+ return buf->data + buf->len - len;
+}
+
#if TARGET_LONG_BITS == 64
#define gdb_get_regl(buf, val) gdb_get_reg64(buf, val)
#define ldtul_p(addr) ldq_p(addr)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 73e9a869a41..e1d6ee00b40 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -195,7 +195,7 @@ typedef struct CPUClass {
hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr,
MemTxAttrs *attrs);
int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs);
- int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
+ int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp);
void (*debug_excp_handler)(CPUState *cpu);
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 3f782c0efe4..be29bdd5301 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -280,7 +280,7 @@ void alpha_cpu_do_interrupt(CPUState *cpu);
bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req);
void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags);
hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int alpha_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 4ffd991b6fc..4ab2cbfd417 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -968,7 +968,7 @@ bool arm_cpu_exec_interrupt(CPUState *cpu, int int_req);
hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
MemTxAttrs *attrs);
-int arm_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int arm_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
/* Dynamically generates for gdb stub an XML description of the sysregs from
@@ -988,7 +988,7 @@ int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
int cpuid, void *opaque);
#ifdef TARGET_AARCH64
-int aarch64_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int aarch64_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
void aarch64_sve_change_el(CPUARMState *env, int old_el,
diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index ca240bc7881..8f08d7628b2 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -195,8 +195,8 @@ void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags);
hwaddr cris_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int crisv10_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int cris_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int crisv10_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
+int cris_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
/* you can call this signal handler from your SIGBUS and SIGSEGV
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 6713d04f111..801a4fb1bae 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -321,7 +321,7 @@ void cpu_hppa_change_prot_id(CPUHPPAState *env);
int cpu_hppa_signal_handler(int host_signum, void *pinfo, void *puc);
hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr);
-int hppa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int hppa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void hppa_cpu_do_interrupt(CPUState *cpu);
bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req);
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 576f309bbfc..c2d89315b92 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1766,7 +1766,7 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags);
hwaddr x86_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
MemTxAttrs *attrs);
-int x86_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int x86_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void x86_cpu_exec_enter(CPUState *cpu);
diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h
index 064c6b1267e..01d408eb55d 100644
--- a/target/lm32/cpu.h
+++ b/target/lm32/cpu.h
@@ -202,7 +202,7 @@ void lm32_cpu_do_interrupt(CPUState *cpu);
bool lm32_cpu_exec_interrupt(CPUState *cs, int int_req);
void lm32_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int lm32_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int lm32_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
typedef enum {
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 3de8e06dfec..521ac67cdd0 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -168,7 +168,7 @@ void m68k_cpu_do_interrupt(CPUState *cpu);
bool m68k_cpu_exec_interrupt(CPUState *cpu, int int_req);
void m68k_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int m68k_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int m68k_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void m68k_tcg_init(void);
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 32522f606bd..1a700a880c5 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -313,7 +313,7 @@ void mb_cpu_do_interrupt(CPUState *cs);
bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
void mb_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int mb_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void mb_tcg_init(void);
diff --git a/target/mips/internal.h b/target/mips/internal.h
index df55f845baf..1bf274b3ef5 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -82,7 +82,7 @@ void mips_cpu_do_interrupt(CPUState *cpu);
bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
void mips_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int mips_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int mips_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 0ad02eab794..d9484b802f3 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -320,7 +320,7 @@ void openrisc_cpu_do_interrupt(CPUState *cpu);
bool openrisc_cpu_exec_interrupt(CPUState *cpu, int int_req);
void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int openrisc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int openrisc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void openrisc_translate_init(void);
bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index b283042515f..5fd081573ef 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1218,8 +1218,8 @@ bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
void ppc_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
void ppc_cpu_dump_statistics(CPUState *cpu, int flags);
hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
+int ppc_cpu_gdb_read_register_apple(CPUState *cpu, GByteArray *buf, int reg);
int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg);
#ifndef CONFIG_USER_ONLY
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 3dcdf922272..31458c5b4a7 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -293,7 +293,7 @@ extern const char * const riscv_excp_names[];
extern const char * const riscv_intr_names[];
void riscv_cpu_do_interrupt(CPUState *cpu);
-int riscv_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int riscv_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int riscv_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request);
bool riscv_cpu_fp_enabled(CPURISCVState *env);
diff --git a/target/s390x/internal.h b/target/s390x/internal.h
index d37816104dd..8c95c734dbe 100644
--- a/target/s390x/internal.h
+++ b/target/s390x/internal.h
@@ -292,7 +292,7 @@ uint16_t float128_dcmask(CPUS390XState *env, float128 f1);
/* gdbstub.c */
-int s390_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int s390_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int s390_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void s390_cpu_gdb_init(CPUState *cs);
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 452a596e671..dbe58c7888f 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -208,7 +208,7 @@ void superh_cpu_do_interrupt(CPUState *cpu);
bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req);
void superh_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int superh_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index ae97c7d9f79..b9369398f24 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -571,7 +571,7 @@ extern const VMStateDescription vmstate_sparc_cpu;
void sparc_cpu_do_interrupt(CPUState *cpu);
void sparc_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int sparc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int sparc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 493f4fc80c5..c0d69fad96c 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -569,7 +569,7 @@ void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
void xtensa_count_regs(const XtensaConfig *config,
unsigned *n_regs, unsigned *n_core_regs);
-int xtensa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int xtensa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
MMUAccessType access_type,
diff --git a/gdbstub.c b/gdbstub.c
index db537a712cc..0bcfc47a7c5 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -319,8 +319,8 @@ static int gdb_signal_to_target (int sig)
typedef struct GDBRegisterState {
int base_reg;
int num_regs;
- gdb_reg_cb get_reg;
- gdb_reg_cb set_reg;
+ gdb_get_reg_cb get_reg;
+ gdb_set_reg_cb set_reg;
const char *xml;
struct GDBRegisterState *next;
} GDBRegisterState;
@@ -905,19 +905,19 @@ static const char *get_feature_xml(const char *p, const char **newp,
return name ? xml_builtin[i][1] : NULL;
}
-static int gdb_read_register(CPUState *cpu, uint8_t *mem_buf, int reg)
+static int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
CPUArchState *env = cpu->env_ptr;
GDBRegisterState *r;
if (reg < cc->gdb_num_core_regs) {
- return cc->gdb_read_register(cpu, mem_buf, reg);
+ return cc->gdb_read_register(cpu, buf, reg);
}
for (r = cpu->gdb_regs; r; r = r->next) {
if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
- return r->get_reg(env, mem_buf, reg - r->base_reg);
+ return r->get_reg(env, buf, reg - r->base_reg);
}
}
return 0;
@@ -948,7 +948,7 @@ static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg)
*/
void gdb_register_coprocessor(CPUState *cpu,
- gdb_reg_cb get_reg, gdb_reg_cb set_reg,
+ gdb_get_reg_cb get_reg, gdb_set_reg_cb set_reg,
int num_regs, const char *xml, int g_pos)
{
GDBRegisterState *s;
@@ -1739,7 +1739,7 @@ static void handle_get_reg(GdbCmdContext *gdb_ctx, void *user_ctx)
}
reg_size = gdb_read_register(gdbserver_state.g_cpu,
- gdbserver_state.mem_buf->data,
+ gdbserver_state.mem_buf,
gdb_ctx->params[0].val_ull);
if (!reg_size) {
put_packet("E14");
@@ -1832,14 +1832,14 @@ static void handle_read_all_regs(GdbCmdContext *gdb_ctx, void *user_ctx)
target_ulong addr, len;
cpu_synchronize_state(gdbserver_state.g_cpu);
+ g_byte_array_set_size(gdbserver_state.mem_buf, 0);
len = 0;
for (addr = 0; addr < gdbserver_state.g_cpu->gdb_num_g_regs; addr++) {
len += gdb_read_register(gdbserver_state.g_cpu,
- gdbserver_state.mem_buf->data + len,
+ gdbserver_state.mem_buf,
addr);
}
- /* FIXME: This is after the fact sizing */
- g_byte_array_set_size(gdbserver_state.mem_buf, len);
+ g_assert(len == gdbserver_state.mem_buf->len);
memtohex(gdbserver_state.str_buf, gdbserver_state.mem_buf->data, len);
put_strbuf();
diff --git a/hw/core/cpu.c b/hw/core/cpu.c
index fe65ca62ace..3b2363f0431 100644
--- a/hw/core/cpu.c
+++ b/hw/core/cpu.c
@@ -177,7 +177,7 @@ static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
}
-static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
+static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
{
return 0;
}
diff --git a/target/alpha/gdbstub.c b/target/alpha/gdbstub.c
index 7f9cc092a9c..0cd76ddaa9e 100644
--- a/target/alpha/gdbstub.c
+++ b/target/alpha/gdbstub.c
@@ -21,7 +21,7 @@
#include "cpu.h"
#include "exec/gdbstub.h"
-int alpha_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int alpha_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
AlphaCPU *cpu = ALPHA_CPU(cs);
CPUAlphaState *env = &cpu->env;
diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
index 1239abd9842..4557775d245 100644
--- a/target/arm/gdbstub.c
+++ b/target/arm/gdbstub.c
@@ -32,7 +32,7 @@ typedef struct RegisterSysregXmlParam {
We hack round this by giving the FPA regs zero size when talking to a
newer gdb. */
-int arm_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int arm_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 665ebb3ef64..35d0b80c2de 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -20,7 +20,7 @@
#include "cpu.h"
#include "exec/gdbstub.h"
-int aarch64_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int aarch64_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 69104fb351d..c0e1ba17272 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -48,30 +48,27 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
static void switch_mode(CPUARMState *env, int mode);
-static int vfp_gdb_get_reg(CPUARMState *env, uint8_t *buf, int reg)
+static int vfp_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg)
{
ARMCPU *cpu = env_archcpu(env);
int nregs = cpu_isar_feature(aa32_simd_r32, cpu) ? 32 : 16;
/* VFP data registers are always little-endian. */
if (reg < nregs) {
- stq_le_p(buf, *aa32_vfp_dreg(env, reg));
- return 8;
+ return gdb_get_reg64(buf, *aa32_vfp_dreg(env, reg));
}
if (arm_feature(env, ARM_FEATURE_NEON)) {
/* Aliases for Q regs. */
nregs += 16;
if (reg < nregs) {
uint64_t *q = aa32_vfp_qreg(env, reg - 32);
- stq_le_p(buf, q[0]);
- stq_le_p(buf + 8, q[1]);
- return 16;
+ return gdb_get_reg128(buf, q[0], q[1]);
}
}
switch (reg - nregs) {
- case 0: stl_p(buf, env->vfp.xregs[ARM_VFP_FPSID]); return 4;
- case 1: stl_p(buf, vfp_get_fpscr(env)); return 4;
- case 2: stl_p(buf, env->vfp.xregs[ARM_VFP_FPEXC]); return 4;
+ case 0: return gdb_get_reg32(buf, env->vfp.xregs[ARM_VFP_FPSID]); break;
+ case 1: return gdb_get_reg32(buf, vfp_get_fpscr(env)); break;
+ case 2: return gdb_get_reg32(buf, env->vfp.xregs[ARM_VFP_FPEXC]); break;
}
return 0;
}
@@ -102,7 +99,7 @@ static int vfp_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg)
return 0;
}
-static int aarch64_fpu_gdb_get_reg(CPUARMState *env, uint8_t *buf, int reg)
+static int aarch64_fpu_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg)
{
switch (reg) {
case 0 ... 31:
@@ -205,7 +202,7 @@ static void write_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri,
}
}
-static int arm_gdb_get_sysreg(CPUARMState *env, uint8_t *buf, int reg)
+static int arm_gdb_get_sysreg(CPUARMState *env, GByteArray *buf, int reg)
{
ARMCPU *cpu = env_archcpu(env);
const ARMCPRegInfo *ri;
diff --git a/target/cris/gdbstub.c b/target/cris/gdbstub.c
index a3d76d2e8c2..b01b2aa0811 100644
--- a/target/cris/gdbstub.c
+++ b/target/cris/gdbstub.c
@@ -21,7 +21,7 @@
#include "cpu.h"
#include "exec/gdbstub.h"
-int crisv10_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int crisv10_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
CRISCPU *cpu = CRIS_CPU(cs);
CPUCRISState *env = &cpu->env;
@@ -53,7 +53,7 @@ int crisv10_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
return 0;
}
-int cris_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int cris_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
CRISCPU *cpu = CRIS_CPU(cs);
CPUCRISState *env = &cpu->env;
diff --git a/target/hppa/gdbstub.c b/target/hppa/gdbstub.c
index 341888a9da0..a6428a2893f 100644
--- a/target/hppa/gdbstub.c
+++ b/target/hppa/gdbstub.c
@@ -21,7 +21,7 @@
#include "cpu.h"
#include "exec/gdbstub.h"
-int hppa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int hppa_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
HPPACPU *cpu = HPPA_CPU(cs);
CPUHPPAState *env = &cpu->env;
diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index e4d8cb66c00..f3d23b614ee 100644
--- a/target/i386/gdbstub.c
+++ b/target/i386/gdbstub.c
@@ -79,7 +79,7 @@ static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
#endif
-int x86_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int x86_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env;
diff --git a/target/lm32/gdbstub.c b/target/lm32/gdbstub.c
index 82ede436e12..b6fe12e1d61 100644
--- a/target/lm32/gdbstub.c
+++ b/target/lm32/gdbstub.c
@@ -22,7 +22,7 @@
#include "exec/gdbstub.h"
#include "hw/lm32/lm32_pic.h"
-int lm32_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int lm32_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
LM32CPU *cpu = LM32_CPU(cs);
CPULM32State *env = &cpu->env;
diff --git a/target/m68k/gdbstub.c b/target/m68k/gdbstub.c
index fdc96f57fff..eb2d030e148 100644
--- a/target/m68k/gdbstub.c
+++ b/target/m68k/gdbstub.c
@@ -21,7 +21,7 @@
#include "cpu.h"
#include "exec/gdbstub.h"
-int m68k_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int m68k_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
M68kCPU *cpu = M68K_CPU(cs);
CPUM68KState *env = &cpu->env;
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index c23b70f854d..014657c6372 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -68,7 +68,7 @@ void m68k_cpu_list(void)
g_slist_free(list);
}
-static int cf_fpu_gdb_get_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
+static int cf_fpu_gdb_get_reg(CPUM68KState *env, GByteArray *mem_buf, int n)
{
if (n < 8) {
float_status s;
@@ -105,7 +105,7 @@ static int cf_fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
return 0;
}
-static int m68k_fpu_gdb_get_reg(CPUM68KState *env, uint8_t *mem_buf, int n)
+static int m68k_fpu_gdb_get_reg(CPUM68KState *env, GByteArray *mem_buf, int n)
{
if (n < 8) {
int len = gdb_get_reg16(mem_buf, env->fregs[n].l.upper);
diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c
index 30677b6d1f4..f41ebf1f33b 100644
--- a/target/microblaze/gdbstub.c
+++ b/target/microblaze/gdbstub.c
@@ -21,7 +21,7 @@
#include "cpu.h"
#include "exec/gdbstub.h"
-int mb_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
CPUMBState *env = &cpu->env;
diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c
index bbb25449391..98f56e660d2 100644
--- a/target/mips/gdbstub.c
+++ b/target/mips/gdbstub.c
@@ -22,7 +22,7 @@
#include "internal.h"
#include "exec/gdbstub.h"
-int mips_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int mips_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
MIPSCPU *cpu = MIPS_CPU(cs);
CPUMIPSState *env = &cpu->env;
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index 1c0c855a6f0..1856b7fcc7a 100644
--- a/target/nios2/cpu.c
+++ b/target/nios2/cpu.c
@@ -124,7 +124,7 @@ static void nios2_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
#endif
}
-static int nios2_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+static int nios2_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
Nios2CPU *cpu = NIOS2_CPU(cs);
CPUClass *cc = CPU_GET_CLASS(cs);
diff --git a/target/openrisc/gdbstub.c b/target/openrisc/gdbstub.c
index 0fcdb79668c..095bf76c12c 100644
--- a/target/openrisc/gdbstub.c
+++ b/target/openrisc/gdbstub.c
@@ -21,7 +21,7 @@
#include "cpu.h"
#include "exec/gdbstub.h"
-int openrisc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int openrisc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
OpenRISCCPU *cpu = OPENRISC_CPU(cs);
CPUOpenRISCState *env = &cpu->env;
diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c
index 823759c92e7..eb362dd9aec 100644
--- a/target/ppc/gdbstub.c
+++ b/target/ppc/gdbstub.c
@@ -114,10 +114,11 @@ void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len)
* the FP regs zero size when talking to a newer gdb.
*/
-int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int ppc_cpu_gdb_read_register(CPUState *cs, GByteArray *buf, int n)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
+ uint8_t *mem_buf;
int r = ppc_gdb_register_len(n);
if (!r) {
@@ -126,17 +127,17 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
if (n < 32) {
/* gprs */
- gdb_get_regl(mem_buf, env->gpr[n]);
+ gdb_get_regl(buf, env->gpr[n]);
} else if (n < 64) {
/* fprs */
- stfq_p(mem_buf, *cpu_fpr_ptr(env, n - 32));
+ gdb_get_reg64(buf, *cpu_fpr_ptr(env, n - 32));
} else {
switch (n) {
case 64:
- gdb_get_regl(mem_buf, env->nip);
+ gdb_get_regl(buf, env->nip);
break;
case 65:
- gdb_get_regl(mem_buf, env->msr);
+ gdb_get_regl(buf, env->msr);
break;
case 66:
{
@@ -145,31 +146,33 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
for (i = 0; i < 8; i++) {
cr |= env->crf[i] << (32 - ((i + 1) * 4));
}
- gdb_get_reg32(mem_buf, cr);
+ gdb_get_reg32(buf, cr);
break;
}
case 67:
- gdb_get_regl(mem_buf, env->lr);
+ gdb_get_regl(buf, env->lr);
break;
case 68:
- gdb_get_regl(mem_buf, env->ctr);
+ gdb_get_regl(buf, env->ctr);
break;
case 69:
- gdb_get_reg32(mem_buf, env->xer);
+ gdb_get_reg32(buf, env->xer);
break;
case 70:
- gdb_get_reg32(mem_buf, env->fpscr);
+ gdb_get_reg32(buf, env->fpscr);
break;
}
}
+ mem_buf = buf->data + buf->len - r;
ppc_maybe_bswap_register(env, mem_buf, r);
return r;
}
-int ppc_cpu_gdb_read_register_apple(CPUState *cs, uint8_t *mem_buf, int n)
+int ppc_cpu_gdb_read_register_apple(CPUState *cs, GByteArray *buf, int n)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
+ uint8_t *mem_buf;
int r = ppc_gdb_register_len_apple(n);
if (!r) {
@@ -178,21 +181,21 @@ int ppc_cpu_gdb_read_register_apple(CPUState *cs, uint8_t *mem_buf, int n)
if (n < 32) {
/* gprs */
- gdb_get_reg64(mem_buf, env->gpr[n]);
+ gdb_get_reg64(buf, env->gpr[n]);
} else if (n < 64) {
/* fprs */
- stfq_p(mem_buf, *cpu_fpr_ptr(env, n - 32));
+ gdb_get_reg64(buf, *cpu_fpr_ptr(env, n - 32));
} else if (n < 96) {
/* Altivec */
- stq_p(mem_buf, n - 64);
- stq_p(mem_buf + 8, 0);
+ gdb_get_reg64(buf, n - 64);
+ gdb_get_reg64(buf, 0);
} else {
switch (n) {
case 64 + 32:
- gdb_get_reg64(mem_buf, env->nip);
+ gdb_get_reg64(buf, env->nip);
break;
case 65 + 32:
- gdb_get_reg64(mem_buf, env->msr);
+ gdb_get_reg64(buf, env->msr);
break;
case 66 + 32:
{
@@ -201,23 +204,24 @@ int ppc_cpu_gdb_read_register_apple(CPUState *cs, uint8_t *mem_buf, int n)
for (i = 0; i < 8; i++) {
cr |= env->crf[i] << (32 - ((i + 1) * 4));
}
- gdb_get_reg32(mem_buf, cr);
+ gdb_get_reg32(buf, cr);
break;
}
case 67 + 32:
- gdb_get_reg64(mem_buf, env->lr);
+ gdb_get_reg64(buf, env->lr);
break;
case 68 + 32:
- gdb_get_reg64(mem_buf, env->ctr);
+ gdb_get_reg64(buf, env->ctr);
break;
case 69 + 32:
- gdb_get_reg32(mem_buf, env->xer);
+ gdb_get_reg32(buf, env->xer);
break;
case 70 + 32:
- gdb_get_reg64(mem_buf, env->fpscr);
+ gdb_get_reg64(buf, env->fpscr);
break;
}
}
+ mem_buf = buf->data + buf->len - r;
ppc_maybe_bswap_register(env, mem_buf, r);
return r;
}
diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
index 53995f62eab..04ad54cff69 100644
--- a/target/ppc/translate_init.inc.c
+++ b/target/ppc/translate_init.inc.c
@@ -9857,7 +9857,7 @@ static int gdb_find_spr_idx(CPUPPCState *env, int n)
return -1;
}
-static int gdb_get_spr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
+static int gdb_get_spr_reg(CPUPPCState *env, GByteArray *buf, int n)
{
int reg;
int len;
@@ -9868,8 +9868,8 @@ static int gdb_get_spr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
}
len = TARGET_LONG_SIZE;
- stn_p(mem_buf, len, env->spr[reg]);
- ppc_maybe_bswap_register(env, mem_buf, len);
+ gdb_get_regl(buf, env->spr[reg]);
+ ppc_maybe_bswap_register(env, gdb_get_reg_ptr(buf, len), len);
return len;
}
@@ -9891,15 +9891,18 @@ static int gdb_set_spr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
}
#endif
-static int gdb_get_float_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
+static int gdb_get_float_reg(CPUPPCState *env, GByteArray *buf, int n)
{
+ uint8_t *mem_buf;
if (n < 32) {
- stfq_p(mem_buf, *cpu_fpr_ptr(env, n));
+ gdb_get_reg64(buf, *cpu_fpr_ptr(env, n));
+ mem_buf = gdb_get_reg_ptr(buf, 8);
ppc_maybe_bswap_register(env, mem_buf, 8);
return 8;
}
if (n == 32) {
- stl_p(mem_buf, env->fpscr);
+ gdb_get_reg32(buf, env->fpscr);
+ mem_buf = gdb_get_reg_ptr(buf, 4);
ppc_maybe_bswap_register(env, mem_buf, 4);
return 4;
}
@@ -9921,28 +9924,31 @@ static int gdb_set_float_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
return 0;
}
-static int gdb_get_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
+static int gdb_get_avr_reg(CPUPPCState *env, GByteArray *buf, int n)
{
+ uint8_t *mem_buf;
+
if (n < 32) {
ppc_avr_t *avr = cpu_avr_ptr(env, n);
if (!avr_need_swap(env)) {
- stq_p(mem_buf, avr->u64[0]);
- stq_p(mem_buf + 8, avr->u64[1]);
+ gdb_get_reg128(buf, avr->u64[0] , avr->u64[1]);
} else {
- stq_p(mem_buf, avr->u64[1]);
- stq_p(mem_buf + 8, avr->u64[0]);
+ gdb_get_reg128(buf, avr->u64[1] , avr->u64[0]);
}
+ mem_buf = gdb_get_reg_ptr(buf, 16);
ppc_maybe_bswap_register(env, mem_buf, 8);
ppc_maybe_bswap_register(env, mem_buf + 8, 8);
return 16;
}
if (n == 32) {
- stl_p(mem_buf, helper_mfvscr(env));
+ gdb_get_reg32(buf, helper_mfvscr(env));
+ mem_buf = gdb_get_reg_ptr(buf, 4);
ppc_maybe_bswap_register(env, mem_buf, 4);
return 4;
}
if (n == 33) {
- stl_p(mem_buf, (uint32_t)env->spr[SPR_VRSAVE]);
+ gdb_get_reg32(buf, (uint32_t)env->spr[SPR_VRSAVE]);
+ mem_buf = gdb_get_reg_ptr(buf, 4);
ppc_maybe_bswap_register(env, mem_buf, 4);
return 4;
}
@@ -9977,25 +9983,25 @@ static int gdb_set_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
return 0;
}
-static int gdb_get_spe_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
+static int gdb_get_spe_reg(CPUPPCState *env, GByteArray *buf, int n)
{
if (n < 32) {
#if defined(TARGET_PPC64)
- stl_p(mem_buf, env->gpr[n] >> 32);
- ppc_maybe_bswap_register(env, mem_buf, 4);
+ gdb_get_reg32(buf, env->gpr[n] >> 32);
+ ppc_maybe_bswap_register(env, gdb_get_reg_ptr(buf, 4), 4);
#else
- stl_p(mem_buf, env->gprh[n]);
+ gdb_get_reg32(buf, env->gprh[n]);
#endif
return 4;
}
if (n == 32) {
- stq_p(mem_buf, env->spe_acc);
- ppc_maybe_bswap_register(env, mem_buf, 8);
+ gdb_get_reg64(buf, env->spe_acc);
+ ppc_maybe_bswap_register(env, gdb_get_reg_ptr(buf, 8), 8);
return 8;
}
if (n == 33) {
- stl_p(mem_buf, env->spe_fscr);
- ppc_maybe_bswap_register(env, mem_buf, 4);
+ gdb_get_reg32(buf, env->spe_fscr);
+ ppc_maybe_bswap_register(env, gdb_get_reg_ptr(buf, 4), 4);
return 4;
}
return 0;
@@ -10030,11 +10036,11 @@ static int gdb_set_spe_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
return 0;
}
-static int gdb_get_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
+static int gdb_get_vsx_reg(CPUPPCState *env, GByteArray *buf, int n)
{
if (n < 32) {
- stq_p(mem_buf, *cpu_vsrl_ptr(env, n));
- ppc_maybe_bswap_register(env, mem_buf, 8);
+ gdb_get_reg64(buf, *cpu_vsrl_ptr(env, n));
+ ppc_maybe_bswap_register(env, gdb_get_reg_ptr(buf, 8), 8);
return 8;
}
return 0;
diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c
index 2f32750f2fb..eba12a86f2e 100644
--- a/target/riscv/gdbstub.c
+++ b/target/riscv/gdbstub.c
@@ -270,7 +270,7 @@ static int csr_register_map[] = {
CSR_MHCOUNTEREN,
};
-int riscv_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int riscv_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
RISCVCPU *cpu = RISCV_CPU(cs);
CPURISCVState *env = &cpu->env;
@@ -301,14 +301,14 @@ int riscv_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
return 0;
}
-static int riscv_gdb_get_fpu(CPURISCVState *env, uint8_t *mem_buf, int n)
+static int riscv_gdb_get_fpu(CPURISCVState *env, GByteArray *buf, int n)
{
if (n < 32) {
if (env->misa & RVD) {
- return gdb_get_reg64(mem_buf, env->fpr[n]);
+ return gdb_get_reg64(buf, env->fpr[n]);
}
if (env->misa & RVF) {
- return gdb_get_reg32(mem_buf, env->fpr[n]);
+ return gdb_get_reg32(buf, env->fpr[n]);
}
/* there is hole between ft11 and fflags in fpu.xml */
} else if (n < 36 && n > 32) {
@@ -322,7 +322,7 @@ static int riscv_gdb_get_fpu(CPURISCVState *env, uint8_t *mem_buf, int n)
result = riscv_csrrw_debug(env, n - 33 + csr_register_map[8], &val,
0, 0);
if (result == 0) {
- return gdb_get_regl(mem_buf, val);
+ return gdb_get_regl(buf, val);
}
}
return 0;
@@ -351,7 +351,7 @@ static int riscv_gdb_set_fpu(CPURISCVState *env, uint8_t *mem_buf, int n)
return 0;
}
-static int riscv_gdb_get_csr(CPURISCVState *env, uint8_t *mem_buf, int n)
+static int riscv_gdb_get_csr(CPURISCVState *env, GByteArray *buf, int n)
{
if (n < ARRAY_SIZE(csr_register_map)) {
target_ulong val = 0;
@@ -359,7 +359,7 @@ static int riscv_gdb_get_csr(CPURISCVState *env, uint8_t *mem_buf, int n)
result = riscv_csrrw_debug(env, csr_register_map[n], &val, 0, 0);
if (result == 0) {
- return gdb_get_regl(mem_buf, val);
+ return gdb_get_regl(buf, val);
}
}
return 0;
@@ -379,13 +379,13 @@ static int riscv_gdb_set_csr(CPURISCVState *env, uint8_t *mem_buf, int n)
return 0;
}
-static int riscv_gdb_get_virtual(CPURISCVState *cs, uint8_t *mem_buf, int n)
+static int riscv_gdb_get_virtual(CPURISCVState *cs, GByteArray *buf, int n)
{
if (n == 0) {
#ifdef CONFIG_USER_ONLY
- return gdb_get_regl(mem_buf, 0);
+ return gdb_get_regl(buf, 0);
#else
- return gdb_get_regl(mem_buf, cs->priv);
+ return gdb_get_regl(buf, cs->priv);
#endif
}
return 0;
diff --git a/target/s390x/gdbstub.c b/target/s390x/gdbstub.c
index e24a49f4a91..d6fce5ff1e1 100644
--- a/target/s390x/gdbstub.c
+++ b/target/s390x/gdbstub.c
@@ -27,7 +27,7 @@
#include "sysemu/hw_accel.h"
#include "sysemu/tcg.h"
-int s390_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int s390_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
S390CPU *cpu = S390_CPU(cs);
CPUS390XState *env = &cpu->env;
@@ -82,11 +82,11 @@ int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
/* total number of registers in s390-acr.xml */
#define S390_NUM_AC_REGS 16
-static int cpu_read_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
+static int cpu_read_ac_reg(CPUS390XState *env, GByteArray *buf, int n)
{
switch (n) {
case S390_A0_REGNUM ... S390_A15_REGNUM:
- return gdb_get_reg32(mem_buf, env->aregs[n]);
+ return gdb_get_reg32(buf, env->aregs[n]);
default:
return 0;
}
@@ -111,13 +111,13 @@ static int cpu_write_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
/* total number of registers in s390-fpr.xml */
#define S390_NUM_FP_REGS 17
-static int cpu_read_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
+static int cpu_read_fp_reg(CPUS390XState *env, GByteArray *buf, int n)
{
switch (n) {
case S390_FPC_REGNUM:
- return gdb_get_reg32(mem_buf, env->fpc);
+ return gdb_get_reg32(buf, env->fpc);
case S390_F0_REGNUM ... S390_F15_REGNUM:
- return gdb_get_reg64(mem_buf, *get_freg(env, n - S390_F0_REGNUM));
+ return gdb_get_reg64(buf, *get_freg(env, n - S390_F0_REGNUM));
default:
return 0;
}
@@ -145,17 +145,17 @@ static int cpu_write_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
/* total number of registers in s390-vx.xml */
#define S390_NUM_VREGS 32
-static int cpu_read_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
+static int cpu_read_vreg(CPUS390XState *env, GByteArray *buf, int n)
{
int ret;
switch (n) {
case S390_V0L_REGNUM ... S390_V15L_REGNUM:
- ret = gdb_get_reg64(mem_buf, env->vregs[n][1]);
+ ret = gdb_get_reg64(buf, env->vregs[n][1]);
break;
case S390_V16_REGNUM ... S390_V31_REGNUM:
- ret = gdb_get_reg64(mem_buf, env->vregs[n][0]);
- ret += gdb_get_reg64(mem_buf + 8, env->vregs[n][1]);
+ ret = gdb_get_reg64(buf, env->vregs[n][0]);
+ ret += gdb_get_reg64(buf, env->vregs[n][1]);
break;
default:
ret = 0;
@@ -186,11 +186,11 @@ static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n)
#define S390_NUM_C_REGS 16
#ifndef CONFIG_USER_ONLY
-static int cpu_read_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
+static int cpu_read_c_reg(CPUS390XState *env, GByteArray *buf, int n)
{
switch (n) {
case S390_C0_REGNUM ... S390_C15_REGNUM:
- return gdb_get_regl(mem_buf, env->cregs[n]);
+ return gdb_get_regl(buf, env->cregs[n]);
default:
return 0;
}
@@ -223,7 +223,7 @@ static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
/* total number of registers in s390-virt.xml */
#define S390_NUM_VIRT_REGS 8
-static int cpu_read_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
+static int cpu_read_virt_reg(CPUS390XState *env, GByteArray *mem_buf, int n)
{
switch (n) {
case S390_VIRT_CKC_REGNUM:
@@ -296,9 +296,9 @@ static int cpu_write_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
/* total number of registers in s390-gs.xml */
#define S390_NUM_GS_REGS 4
-static int cpu_read_gs_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
+static int cpu_read_gs_reg(CPUS390XState *env, GByteArray *buf, int n)
{
- return gdb_get_regl(mem_buf, env->gscb[n]);
+ return gdb_get_regl(buf, env->gscb[n]);
}
static int cpu_write_gs_reg(CPUS390XState *env, uint8_t *mem_buf, int n)
diff --git a/target/sh4/gdbstub.c b/target/sh4/gdbstub.c
index 44c1679e9db..49fc4a0cc69 100644
--- a/target/sh4/gdbstub.c
+++ b/target/sh4/gdbstub.c
@@ -24,7 +24,7 @@
/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
/* FIXME: We should use XML for this. */
-int superh_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int superh_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
SuperHCPU *cpu = SUPERH_CPU(cs);
CPUSH4State *env = &cpu->env;
diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c
index 8be742b5a3d..78dc8dcc980 100644
--- a/target/sparc/gdbstub.c
+++ b/target/sparc/gdbstub.c
@@ -27,7 +27,7 @@
#define gdb_get_rega(buf, val) gdb_get_regl(buf, val)
#endif
-int sparc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
SPARCCPU *cpu = SPARC_CPU(cs);
CPUSPARCState *env = &cpu->env;
diff --git a/target/xtensa/gdbstub.c b/target/xtensa/gdbstub.c
index 54727881f38..0ee3feabe54 100644
--- a/target/xtensa/gdbstub.c
+++ b/target/xtensa/gdbstub.c
@@ -63,7 +63,7 @@ void xtensa_count_regs(const XtensaConfig *config,
}
}
-int xtensa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
+int xtensa_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
XtensaCPU *cpu = XTENSA_CPU(cs);
CPUXtensaState *env = &cpu->env;
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 15/28] target/arm: prepare for multiple dynamic XMLs
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (13 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 14/28] gdbstub: extend GByteArray to read register helpers Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 16/28] target/arm: explicitly encode regnum in our XML Alex Bennée
` (13 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, qemu-arm, Alex Bennée, Peter Maydell
We will want to generate similar dynamic XML for gdbstub support of
SVE registers (the upstream doesn't use XML). To that end lightly
rename a few things to make the distinction.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 20 +++++++++++++-------
target/arm/gdbstub.c | 30 +++++++++++++++---------------
target/arm/helper.c | 4 ++--
3 files changed, 30 insertions(+), 24 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 4ab2cbfd417..0ab82c987c3 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -128,14 +128,20 @@ enum {
/**
* DynamicGDBXMLInfo:
* @desc: Contains the XML descriptions.
- * @num_cpregs: Number of the Coprocessor registers seen by GDB.
- * @cpregs_keys: Array that contains the corresponding Key of
- * a given cpreg with the same order of the cpreg in the XML description.
+ * @num: Number of the registers in this XML seen by GDB.
+ * @data: A union with data specific to the set of registers
+ * @cpregs_keys: Array that contains the corresponding Key of
+ * a given cpreg with the same order of the cpreg
+ * in the XML description.
*/
typedef struct DynamicGDBXMLInfo {
char *desc;
- int num_cpregs;
- uint32_t *cpregs_keys;
+ int num;
+ union {
+ struct {
+ uint32_t *keys;
+ } cpregs;
+ } data;
} DynamicGDBXMLInfo;
/* CPU state for each instance of a generic timer (in cp15 c14) */
@@ -749,7 +755,7 @@ struct ARMCPU {
uint64_t *cpreg_vmstate_values;
int32_t cpreg_vmstate_array_len;
- DynamicGDBXMLInfo dyn_xml;
+ DynamicGDBXMLInfo dyn_sysreg_xml;
/* Timers used by the generic (architected) timer */
QEMUTimer *gt_timer[NUM_GTIMERS];
@@ -974,7 +980,7 @@ int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
/* Dynamically generates for gdb stub an XML description of the sysregs from
* the cp_regs hashtable. Returns the registered sysregs number.
*/
-int arm_gen_dynamic_xml(CPUState *cpu);
+int arm_gen_dynamic_sysreg_xml(CPUState *cpu);
/* Returns the dynamically generated XML for the gdb stub.
* Returns a pointer to the XML contents for the specified XML file or NULL
diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
index 4557775d245..1f68ab98c3b 100644
--- a/target/arm/gdbstub.c
+++ b/target/arm/gdbstub.c
@@ -106,15 +106,15 @@ int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
return 0;
}
-static void arm_gen_one_xml_reg_tag(GString *s, DynamicGDBXMLInfo *dyn_xml,
- ARMCPRegInfo *ri, uint32_t ri_key,
- int bitsize)
+static void arm_gen_one_xml_sysreg_tag(GString *s, DynamicGDBXMLInfo *dyn_xml,
+ ARMCPRegInfo *ri, uint32_t ri_key,
+ int bitsize)
{
g_string_append_printf(s, "<reg name=\"%s\"", ri->name);
g_string_append_printf(s, " bitsize=\"%d\"", bitsize);
g_string_append_printf(s, " group=\"cp_regs\"/>");
- dyn_xml->num_cpregs++;
- dyn_xml->cpregs_keys[dyn_xml->num_cpregs - 1] = ri_key;
+ dyn_xml->data.cpregs.keys[dyn_xml->num] = ri_key;
+ dyn_xml->num++;
}
static void arm_register_sysreg_for_xml(gpointer key, gpointer value,
@@ -126,12 +126,12 @@ static void arm_register_sysreg_for_xml(gpointer key, gpointer value,
GString *s = param->s;
ARMCPU *cpu = ARM_CPU(param->cs);
CPUARMState *env = &cpu->env;
- DynamicGDBXMLInfo *dyn_xml = &cpu->dyn_xml;
+ DynamicGDBXMLInfo *dyn_xml = &cpu->dyn_sysreg_xml;
if (!(ri->type & (ARM_CP_NO_RAW | ARM_CP_NO_GDB))) {
if (arm_feature(env, ARM_FEATURE_AARCH64)) {
if (ri->state == ARM_CP_STATE_AA64) {
- arm_gen_one_xml_reg_tag(s , dyn_xml, ri, ri_key, 64);
+ arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64);
}
} else {
if (ri->state == ARM_CP_STATE_AA32) {
@@ -140,30 +140,30 @@ static void arm_register_sysreg_for_xml(gpointer key, gpointer value,
return;
}
if (ri->type & ARM_CP_64BIT) {
- arm_gen_one_xml_reg_tag(s , dyn_xml, ri, ri_key, 64);
+ arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64);
} else {
- arm_gen_one_xml_reg_tag(s , dyn_xml, ri, ri_key, 32);
+ arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 32);
}
}
}
}
}
-int arm_gen_dynamic_xml(CPUState *cs)
+int arm_gen_dynamic_sysreg_xml(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
GString *s = g_string_new(NULL);
RegisterSysregXmlParam param = {cs, s};
- cpu->dyn_xml.num_cpregs = 0;
- cpu->dyn_xml.cpregs_keys = g_new(uint32_t, g_hash_table_size(cpu->cp_regs));
+ cpu->dyn_sysreg_xml.num = 0;
+ cpu->dyn_sysreg_xml.data.cpregs.keys = g_new(uint32_t, g_hash_table_size(cpu->cp_regs));
g_string_printf(s, "<?xml version=\"1.0\"?>");
g_string_append_printf(s, "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">");
g_string_append_printf(s, "<feature name=\"org.qemu.gdb.arm.sys.regs\">");
g_hash_table_foreach(cpu->cp_regs, arm_register_sysreg_for_xml, ¶m);
g_string_append_printf(s, "</feature>");
- cpu->dyn_xml.desc = g_string_free(s, false);
- return cpu->dyn_xml.num_cpregs;
+ cpu->dyn_sysreg_xml.desc = g_string_free(s, false);
+ return cpu->dyn_sysreg_xml.num;
}
const char *arm_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname)
@@ -171,7 +171,7 @@ const char *arm_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname)
ARMCPU *cpu = ARM_CPU(cs);
if (strcmp(xmlname, "system-registers.xml") == 0) {
- return cpu->dyn_xml.desc;
+ return cpu->dyn_sysreg_xml.desc;
}
return NULL;
}
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c0e1ba17272..b0e2a85b005 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -208,7 +208,7 @@ static int arm_gdb_get_sysreg(CPUARMState *env, GByteArray *buf, int reg)
const ARMCPRegInfo *ri;
uint32_t key;
- key = cpu->dyn_xml.cpregs_keys[reg];
+ key = cpu->dyn_sysreg_xml.data.cpregs.keys[reg];
ri = get_arm_cp_reginfo(cpu->cp_regs, key);
if (ri) {
if (cpreg_field_is_64bit(ri)) {
@@ -7973,7 +7973,7 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
19, "arm-vfp.xml", 0);
}
gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg,
- arm_gen_dynamic_xml(cs),
+ arm_gen_dynamic_sysreg_xml(cs),
"system-registers.xml", 0);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 16/28] target/arm: explicitly encode regnum in our XML
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (14 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 15/28] target/arm: prepare for multiple dynamic XMLs Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 17/28] target/arm: default SVE length to 64 bytes for linux-user Alex Bennée
` (12 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, qemu-arm, Alex Bennée, Peter Maydell
This is described as optional but I'm not convinced of the numbering
when multiple target fragments are sent.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
- post inc param->n in place so we don't get out count wrong
---
target/arm/cpu.h | 2 +-
target/arm/gdbstub.c | 17 +++++++++++------
target/arm/helper.c | 2 +-
3 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 0ab82c987c3..fbfd73a7b5b 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -980,7 +980,7 @@ int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
/* Dynamically generates for gdb stub an XML description of the sysregs from
* the cp_regs hashtable. Returns the registered sysregs number.
*/
-int arm_gen_dynamic_sysreg_xml(CPUState *cpu);
+int arm_gen_dynamic_sysreg_xml(CPUState *cpu, int base_reg);
/* Returns the dynamically generated XML for the gdb stub.
* Returns a pointer to the XML contents for the specified XML file or NULL
diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
index 1f68ab98c3b..69c35462a63 100644
--- a/target/arm/gdbstub.c
+++ b/target/arm/gdbstub.c
@@ -24,6 +24,7 @@
typedef struct RegisterSysregXmlParam {
CPUState *cs;
GString *s;
+ int n;
} RegisterSysregXmlParam;
/* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
@@ -108,10 +109,11 @@ int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
static void arm_gen_one_xml_sysreg_tag(GString *s, DynamicGDBXMLInfo *dyn_xml,
ARMCPRegInfo *ri, uint32_t ri_key,
- int bitsize)
+ int bitsize, int regnum)
{
g_string_append_printf(s, "<reg name=\"%s\"", ri->name);
g_string_append_printf(s, " bitsize=\"%d\"", bitsize);
+ g_string_append_printf(s, " regnum=\"%d\"", regnum);
g_string_append_printf(s, " group=\"cp_regs\"/>");
dyn_xml->data.cpregs.keys[dyn_xml->num] = ri_key;
dyn_xml->num++;
@@ -131,7 +133,8 @@ static void arm_register_sysreg_for_xml(gpointer key, gpointer value,
if (!(ri->type & (ARM_CP_NO_RAW | ARM_CP_NO_GDB))) {
if (arm_feature(env, ARM_FEATURE_AARCH64)) {
if (ri->state == ARM_CP_STATE_AA64) {
- arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64);
+ arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64,
+ param->n++);
}
} else {
if (ri->state == ARM_CP_STATE_AA32) {
@@ -140,20 +143,22 @@ static void arm_register_sysreg_for_xml(gpointer key, gpointer value,
return;
}
if (ri->type & ARM_CP_64BIT) {
- arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64);
+ arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64,
+ param->n++);
} else {
- arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 32);
+ arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 32,
+ param->n++);
}
}
}
}
}
-int arm_gen_dynamic_sysreg_xml(CPUState *cs)
+int arm_gen_dynamic_sysreg_xml(CPUState *cs, int base_reg)
{
ARMCPU *cpu = ARM_CPU(cs);
GString *s = g_string_new(NULL);
- RegisterSysregXmlParam param = {cs, s};
+ RegisterSysregXmlParam param = {cs, s, base_reg};
cpu->dyn_sysreg_xml.num = 0;
cpu->dyn_sysreg_xml.data.cpregs.keys = g_new(uint32_t, g_hash_table_size(cpu->cp_regs));
diff --git a/target/arm/helper.c b/target/arm/helper.c
index b0e2a85b005..90135731353 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7973,7 +7973,7 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
19, "arm-vfp.xml", 0);
}
gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg,
- arm_gen_dynamic_sysreg_xml(cs),
+ arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs),
"system-registers.xml", 0);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 17/28] target/arm: default SVE length to 64 bytes for linux-user
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (15 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 16/28] target/arm: explicitly encode regnum in our XML Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 18/28] target/arm: generate xml description of our SVE registers Alex Bennée
` (11 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, qemu-arm, Alex Bennée, Peter Maydell
The Linux kernel chooses the default of 64 bytes for SVE registers on
the basis that it is the largest size on known hardware that won't
grow the signal frame. We still honour the sve-max-vq property and
userspace can expand the number of lanes by calling PR_SVE_SET_VL.
This should not make any difference to SVE enabled software as the SVE
is of course vector length agnostic.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
- tweak zcr_el[1] instead
v7
- better form
---
target/arm/cpu.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 3623ecefbd9..0909ce86a12 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -195,9 +195,10 @@ static void arm_cpu_reset(CPUState *s)
env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 20, 2, 3);
/* and to the SVE instructions */
env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 16, 2, 3);
- /* with maximum vector length */
- env->vfp.zcr_el[1] = cpu_isar_feature(aa64_sve, cpu) ?
- cpu->sve_max_vq - 1 : 0;
+ /* with reasonable vector length */
+ if (cpu_isar_feature(aa64_sve, cpu)) {
+ env->vfp.zcr_el[1] = MIN(cpu->sve_max_vq - 1, 3);
+ }
/*
* Enable TBI0 and TBI1. While the real kernel only enables TBI0,
* turning on both here will produce smaller code and otherwise
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 18/28] target/arm: generate xml description of our SVE registers
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (16 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 17/28] target/arm: default SVE length to 64 bytes for linux-user Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 19/28] target/arm: don't bother with id_aa64pfr0_read for USER_ONLY Alex Bennée
` (10 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, qemu-arm, Alex Bennée, Peter Maydell
We also expose a the helpers to read/write the the registers.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
- instead of zNpM expose zN at sve_max_vq width
- wrap union in union q(us), d(usf), s(usf), h(usf), b(us)
v3
- add a vg pseudo register for current width
- spacing fixes
- use switch/case for whole group
- drop fpsr_pos marker
- remove unused variables
v4
- const-ify vec_lanes
- drop vg
v6
- restore vg based on sve_zcr_len_for_el(env, arm_current_el(env)) + 1)
v7
- vg = vq * 2
---
target/arm/cpu.h | 7 ++-
target/arm/gdbstub.c | 134 +++++++++++++++++++++++++++++++++++++++++++
target/arm/helper.c | 125 +++++++++++++++++++++++++++++++++++++++-
3 files changed, 261 insertions(+), 5 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index fbfd73a7b5b..8b9f2961ba0 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -756,6 +756,7 @@ struct ARMCPU {
int32_t cpreg_vmstate_array_len;
DynamicGDBXMLInfo dyn_sysreg_xml;
+ DynamicGDBXMLInfo dyn_svereg_xml;
/* Timers used by the generic (architected) timer */
QEMUTimer *gt_timer[NUM_GTIMERS];
@@ -977,10 +978,12 @@ hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
int arm_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-/* Dynamically generates for gdb stub an XML description of the sysregs from
- * the cp_regs hashtable. Returns the registered sysregs number.
+/*
+ * Helpers to dynamically generates XML descriptions of the sysregs
+ * and SVE registers. Returns the number of registers in each set.
*/
int arm_gen_dynamic_sysreg_xml(CPUState *cpu, int base_reg);
+int arm_gen_dynamic_svereg_xml(CPUState *cpu, int base_reg);
/* Returns the dynamically generated XML for the gdb stub.
* Returns a pointer to the XML contents for the specified XML file or NULL
diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c
index 69c35462a63..d9ef7d2187c 100644
--- a/target/arm/gdbstub.c
+++ b/target/arm/gdbstub.c
@@ -171,12 +171,146 @@ int arm_gen_dynamic_sysreg_xml(CPUState *cs, int base_reg)
return cpu->dyn_sysreg_xml.num;
}
+struct TypeSize {
+ const char *gdb_type;
+ int size;
+ const char sz, suffix;
+};
+
+static const struct TypeSize vec_lanes[] = {
+ /* quads */
+ { "uint128", 128, 'q', 'u' },
+ { "int128", 128, 'q', 's' },
+ /* 64 bit */
+ { "uint64", 64, 'd', 'u' },
+ { "int64", 64, 'd', 's' },
+ { "ieee_double", 64, 'd', 'f' },
+ /* 32 bit */
+ { "uint32", 32, 's', 'u' },
+ { "int32", 32, 's', 's' },
+ { "ieee_single", 32, 's', 'f' },
+ /* 16 bit */
+ { "uint16", 16, 'h', 'u' },
+ { "int16", 16, 'h', 's' },
+ { "ieee_half", 16, 'h', 'f' },
+ /* bytes */
+ { "uint8", 8, 'b', 'u' },
+ { "int8", 8, 'b', 's' },
+};
+
+
+int arm_gen_dynamic_svereg_xml(CPUState *cs, int base_reg)
+{
+ ARMCPU *cpu = ARM_CPU(cs);
+ GString *s = g_string_new(NULL);
+ DynamicGDBXMLInfo *info = &cpu->dyn_svereg_xml;
+ g_autoptr(GString) ts = g_string_new("");
+ int i, bits, reg_width = (cpu->sve_max_vq * 128);
+ info->num = 0;
+ g_string_printf(s, "<?xml version=\"1.0\"?>");
+ g_string_append_printf(s, "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">");
+ g_string_append_printf(s, "<feature name=\"org.qemu.gdb.aarch64.sve\">");
+
+ /* First define types and totals in a whole VL */
+ for (i = 0; i < ARRAY_SIZE(vec_lanes); i++) {
+ int count = reg_width / vec_lanes[i].size;
+ g_string_printf(ts, "vq%d%c%c", count,
+ vec_lanes[i].sz, vec_lanes[i].suffix);
+ g_string_append_printf(s,
+ "<vector id=\"%s\" type=\"%s\" count=\"%d\"/>",
+ ts->str, vec_lanes[i].gdb_type, count);
+ }
+ /*
+ * Now define a union for each size group containing unsigned and
+ * signed and potentially float versions of each size from 128 to
+ * 8 bits.
+ */
+ for (bits = 128; bits >= 8; bits /= 2) {
+ int count = reg_width / bits;
+ g_string_append_printf(s, "<union id=\"vq%dn\">", count);
+ for (i = 0; i < ARRAY_SIZE(vec_lanes); i++) {
+ if (vec_lanes[i].size == bits) {
+ g_string_append_printf(s, "<field name=\"%c\" type=\"vq%d%c%c\"/>",
+ vec_lanes[i].suffix,
+ count,
+ vec_lanes[i].sz, vec_lanes[i].suffix);
+ }
+ }
+ g_string_append(s, "</union>");
+ }
+ /* And now the final union of unions */
+ g_string_append(s, "<union id=\"vq\">");
+ for (bits = 128; bits >= 8; bits /= 2) {
+ int count = reg_width / bits;
+ for (i = 0; i < ARRAY_SIZE(vec_lanes); i++) {
+ if (vec_lanes[i].size == bits) {
+ g_string_append_printf(s, "<field name=\"%c\" type=\"vq%dn\"/>",
+ vec_lanes[i].sz, count);
+ break;
+ }
+ }
+ }
+ g_string_append(s, "</union>");
+
+ /* Then define each register in parts for each vq */
+ for (i = 0; i < 32; i++) {
+ g_string_append_printf(s,
+ "<reg name=\"z%d\" bitsize=\"%d\""
+ " regnum=\"%d\" group=\"vector\""
+ " type=\"vq\"/>",
+ i, reg_width, base_reg++);
+ info->num++;
+ }
+ /* fpscr & status registers */
+ g_string_append_printf(s, "<reg name=\"fpsr\" bitsize=\"32\""
+ " regnum=\"%d\" group=\"float\""
+ " type=\"int\"/>", base_reg++);
+ g_string_append_printf(s, "<reg name=\"fpcr\" bitsize=\"32\""
+ " regnum=\"%d\" group=\"float\""
+ " type=\"int\"/>", base_reg++);
+ info->num += 2;
+ /*
+ * Predicate registers aren't so big they are worth splitting up
+ * but we do need to define a type to hold the array of quad
+ * references.
+ */
+ g_string_append_printf(s,
+ "<vector id=\"vqp\" type=\"uint16\" count=\"%d\"/>",
+ cpu->sve_max_vq);
+ for (i = 0; i < 16; i++) {
+ g_string_append_printf(s,
+ "<reg name=\"p%d\" bitsize=\"%d\""
+ " regnum=\"%d\" group=\"vector\""
+ " type=\"vqp\"/>",
+ i, cpu->sve_max_vq * 16, base_reg++);
+ info->num++;
+ }
+ g_string_append_printf(s,
+ "<reg name=\"ffr\" bitsize=\"%d\""
+ " regnum=\"%d\" group=\"vector\""
+ " type=\"vqp\"/>",
+ cpu->sve_max_vq * 16, base_reg++);
+ g_string_append_printf(s,
+ "<reg name=\"vg\" bitsize=\"64\""
+ " regnum=\"%d\" group=\"vector\""
+ " type=\"uint32\"/>",
+ base_reg++);
+ info->num += 2;
+ g_string_append_printf(s, "</feature>");
+ cpu->dyn_svereg_xml.desc = g_string_free(s, false);
+
+ return cpu->dyn_svereg_xml.num;
+}
+
+
const char *arm_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname)
{
ARMCPU *cpu = ARM_CPU(cs);
if (strcmp(xmlname, "system-registers.xml") == 0) {
return cpu->dyn_sysreg_xml.desc;
+ } else if (strcmp(xmlname, "sve-registers.xml") == 0) {
+ return cpu->dyn_svereg_xml.desc;
}
return NULL;
}
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 90135731353..7e560ea7db6 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -202,6 +202,15 @@ static void write_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri,
}
}
+/**
+ * arm_get/set_gdb_*: get/set a gdb register
+ * @env: the CPU state
+ * @buf: a buffer to copy to/from
+ * @reg: register number (offset from start of group)
+ *
+ * We return the number of bytes copied
+ */
+
static int arm_gdb_get_sysreg(CPUARMState *env, GByteArray *buf, int reg)
{
ARMCPU *cpu = env_archcpu(env);
@@ -225,6 +234,102 @@ static int arm_gdb_set_sysreg(CPUARMState *env, uint8_t *buf, int reg)
return 0;
}
+#ifdef TARGET_AARCH64
+static int arm_gdb_get_svereg(CPUARMState *env, GByteArray *buf, int reg)
+{
+ ARMCPU *cpu = env_archcpu(env);
+
+ switch (reg) {
+ /* The first 32 registers are the zregs */
+ case 0 ... 31:
+ {
+ int vq, len = 0;
+ for (vq = 0; vq < cpu->sve_max_vq; vq++) {
+ len += gdb_get_reg128(buf,
+ env->vfp.zregs[reg].d[vq * 2 + 1],
+ env->vfp.zregs[reg].d[vq * 2]);
+ }
+ return len;
+ }
+ case 32:
+ return gdb_get_reg32(buf, vfp_get_fpsr(env));
+ case 33:
+ return gdb_get_reg32(buf, vfp_get_fpcr(env));
+ /* then 16 predicates and the ffr */
+ case 34 ... 50:
+ {
+ int preg = reg - 34;
+ int vq, len = 0;
+ for (vq = 0; vq < cpu->sve_max_vq; vq = vq + 4) {
+ len += gdb_get_reg64(buf, env->vfp.pregs[preg].p[vq / 4]);
+ }
+ return len;
+ }
+ case 51:
+ {
+ /*
+ * We report in Vector Granules (VG) which is 64bit in a Z reg
+ * while the ZCR works in Vector Quads (VQ) which is 128bit chunks.
+ */
+ int vq = sve_zcr_len_for_el(env, arm_current_el(env)) + 1;
+ return gdb_get_reg32(buf, vq * 2);
+ }
+ default:
+ /* gdbstub asked for something out our range */
+ qemu_log_mask(LOG_UNIMP, "%s: out of range register %d", __func__, reg);
+ break;
+ }
+
+ return 0;
+}
+
+static int arm_gdb_set_svereg(CPUARMState *env, uint8_t *buf, int reg)
+{
+ ARMCPU *cpu = env_archcpu(env);
+
+ /* The first 32 registers are the zregs */
+ switch (reg) {
+ /* The first 32 registers are the zregs */
+ case 0 ... 31:
+ {
+ int vq, len = 0;
+ uint64_t *p = (uint64_t *) buf;
+ for (vq = 0; vq < cpu->sve_max_vq; vq++) {
+ env->vfp.zregs[reg].d[vq * 2 + 1] = *p++;
+ env->vfp.zregs[reg].d[vq * 2] = *p++;
+ len += 16;
+ }
+ return len;
+ }
+ case 32:
+ vfp_set_fpsr(env, *(uint32_t *)buf);
+ return 4;
+ case 33:
+ vfp_set_fpcr(env, *(uint32_t *)buf);
+ return 4;
+ case 34 ... 50:
+ {
+ int preg = reg - 34;
+ int vq, len = 0;
+ uint64_t *p = (uint64_t *) buf;
+ for (vq = 0; vq < cpu->sve_max_vq; vq = vq + 4) {
+ env->vfp.pregs[preg].p[vq / 4] = *p++;
+ len += 8;
+ }
+ return len;
+ }
+ case 51:
+ /* cannot set vg via gdbstub */
+ return 0;
+ default:
+ /* gdbstub asked for something out our range */
+ break;
+ }
+
+ return 0;
+}
+#endif /* TARGET_AARCH64 */
+
static bool raw_accessors_invalid(const ARMCPRegInfo *ri)
{
/* Return true if the regdef would cause an assertion if you called
@@ -7959,9 +8064,22 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
CPUARMState *env = &cpu->env;
if (arm_feature(env, ARM_FEATURE_AARCH64)) {
- gdb_register_coprocessor(cs, aarch64_fpu_gdb_get_reg,
- aarch64_fpu_gdb_set_reg,
- 34, "aarch64-fpu.xml", 0);
+ /*
+ * The lower part of each SVE register aliases to the FPU
+ * registers so we don't need to include both.
+ */
+#ifdef TARGET_AARCH64
+ if (isar_feature_aa64_sve(&cpu->isar)) {
+ gdb_register_coprocessor(cs, arm_gdb_get_svereg, arm_gdb_set_svereg,
+ arm_gen_dynamic_svereg_xml(cs, cs->gdb_num_regs),
+ "sve-registers.xml", 0);
+ } else
+#endif
+ {
+ gdb_register_coprocessor(cs, aarch64_fpu_gdb_get_reg,
+ aarch64_fpu_gdb_set_reg,
+ 34, "aarch64-fpu.xml", 0);
+ }
} else if (arm_feature(env, ARM_FEATURE_NEON)) {
gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,
51, "arm-neon.xml", 0);
@@ -7975,6 +8093,7 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg,
arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs),
"system-registers.xml", 0);
+
}
/* Sort alphabetically by type name, except for "any". */
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 19/28] target/arm: don't bother with id_aa64pfr0_read for USER_ONLY
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (17 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 18/28] target/arm: generate xml description of our SVE registers Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-17 9:56 ` Philippe Mathieu-Daudé
2020-03-16 17:21 ` [PATCH v1 20/28] tests/tcg/aarch64: userspace system register test Alex Bennée
` (9 subsequent siblings)
28 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, qemu-arm, Alex Bennée, Peter Maydell
For system emulation we need to check the state of the GIC before we
report the value. However this isn't relevant to exporting of the
value to linux-user and indeed breaks the exported value as set by
modify_arm_cp_regs.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v2
- extend the ifdef and make type CONST with no accessfn
---
target/arm/helper.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 7e560ea7db6..d2ec2c53510 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6697,6 +6697,7 @@ static uint64_t id_pfr1_read(CPUARMState *env, const ARMCPRegInfo *ri)
return pfr1;
}
+#ifndef CONFIG_USER_ONLY
static uint64_t id_aa64pfr0_read(CPUARMState *env, const ARMCPRegInfo *ri)
{
ARMCPU *cpu = env_archcpu(env);
@@ -6707,6 +6708,7 @@ static uint64_t id_aa64pfr0_read(CPUARMState *env, const ARMCPRegInfo *ri)
}
return pfr0;
}
+#endif
/* Shared logic between LORID and the rest of the LOR* registers.
* Secure state has already been delt with.
@@ -7280,16 +7282,24 @@ void register_cp_regs_for_features(ARMCPU *cpu)
* define new registers here.
*/
ARMCPRegInfo v8_idregs[] = {
- /* ID_AA64PFR0_EL1 is not a plain ARM_CP_CONST because we don't
- * know the right value for the GIC field until after we
- * define these regs.
+ /*
+ * ID_AA64PFR0_EL1 is not a plain ARM_CP_CONST in system
+ * emulation because we don't know the right value for the
+ * GIC field until after we define these regs.
*/
{ .name = "ID_AA64PFR0_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 0, .crm = 4, .opc2 = 0,
- .access = PL1_R, .type = ARM_CP_NO_RAW,
+ .access = PL1_R,
+#ifdef CONFIG_USER_ONLY
+ .type = ARM_CP_CONST,
+ .resetvalue = cpu->isar.id_aa64pfr0
+#else
+ .type = ARM_CP_NO_RAW,
.accessfn = access_aa64_tid3,
.readfn = id_aa64pfr0_read,
- .writefn = arm_cp_write_ignore },
+ .writefn = arm_cp_write_ignore
+#endif
+ },
{ .name = "ID_AA64PFR1_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 0, .crm = 4, .opc2 = 1,
.access = PL1_R, .type = ARM_CP_CONST,
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [PATCH v1 19/28] target/arm: don't bother with id_aa64pfr0_read for USER_ONLY
2020-03-16 17:21 ` [PATCH v1 19/28] target/arm: don't bother with id_aa64pfr0_read for USER_ONLY Alex Bennée
@ 2020-03-17 9:56 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 46+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-03-17 9:56 UTC (permalink / raw)
To: Alex Bennée, qemu-devel; +Cc: Peter Maydell, qemu-arm, Richard Henderson
On 3/16/20 6:21 PM, Alex Bennée wrote:
> For system emulation we need to check the state of the GIC before we
> report the value. However this isn't relevant to exporting of the
> value to linux-user and indeed breaks the exported value as set by
> modify_arm_cp_regs.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>
> ---
> v2
> - extend the ifdef and make type CONST with no accessfn
> ---
> target/arm/helper.c | 20 +++++++++++++++-----
> 1 file changed, 15 insertions(+), 5 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 7e560ea7db6..d2ec2c53510 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -6697,6 +6697,7 @@ static uint64_t id_pfr1_read(CPUARMState *env, const ARMCPRegInfo *ri)
> return pfr1;
> }
>
> +#ifndef CONFIG_USER_ONLY
> static uint64_t id_aa64pfr0_read(CPUARMState *env, const ARMCPRegInfo *ri)
> {
> ARMCPU *cpu = env_archcpu(env);
> @@ -6707,6 +6708,7 @@ static uint64_t id_aa64pfr0_read(CPUARMState *env, const ARMCPRegInfo *ri)
> }
> return pfr0;
> }
> +#endif
>
> /* Shared logic between LORID and the rest of the LOR* registers.
> * Secure state has already been delt with.
> @@ -7280,16 +7282,24 @@ void register_cp_regs_for_features(ARMCPU *cpu)
> * define new registers here.
> */
> ARMCPRegInfo v8_idregs[] = {
> - /* ID_AA64PFR0_EL1 is not a plain ARM_CP_CONST because we don't
> - * know the right value for the GIC field until after we
> - * define these regs.
> + /*
> + * ID_AA64PFR0_EL1 is not a plain ARM_CP_CONST in system
> + * emulation because we don't know the right value for the
> + * GIC field until after we define these regs.
> */
> { .name = "ID_AA64PFR0_EL1", .state = ARM_CP_STATE_AA64,
> .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 4, .opc2 = 0,
> - .access = PL1_R, .type = ARM_CP_NO_RAW,
> + .access = PL1_R,
> +#ifdef CONFIG_USER_ONLY
> + .type = ARM_CP_CONST,
> + .resetvalue = cpu->isar.id_aa64pfr0
> +#else
> + .type = ARM_CP_NO_RAW,
> .accessfn = access_aa64_tid3,
> .readfn = id_aa64pfr0_read,
> - .writefn = arm_cp_write_ignore },
> + .writefn = arm_cp_write_ignore
I guess this is the implementation of what Peter described here:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg689388.html
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> +#endif
> + },
> { .name = "ID_AA64PFR1_EL1", .state = ARM_CP_STATE_AA64,
> .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 4, .opc2 = 1,
> .access = PL1_R, .type = ARM_CP_CONST,
>
^ permalink raw reply [flat|nested] 46+ messages in thread
* [PATCH v1 20/28] tests/tcg/aarch64: userspace system register test
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (18 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 19/28] target/arm: don't bother with id_aa64pfr0_read for USER_ONLY Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-17 10:24 ` Philippe Mathieu-Daudé
2020-03-16 17:21 ` [PATCH v1 21/28] configure: allow user to specify what gdb to use Alex Bennée
` (8 subsequent siblings)
28 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, qemu-arm, Alex Bennée, Peter Maydell
This tests a bunch of registers that the kernel allows userspace to
read including the CPUID registers. We need a SVE aware compiler as we
are testing the id_aa64zfr0_el1 register in the set.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190205190224.2198-7-alex.bennee@linaro.org>
---
vgdbstub
- don't build unless using docker or CROSS_CC_HAS_SVE
---
tests/tcg/aarch64/sysregs.c | 172 ++++++++++++++++++++++++++++++
tests/tcg/aarch64/Makefile.target | 6 ++
2 files changed, 178 insertions(+)
create mode 100644 tests/tcg/aarch64/sysregs.c
diff --git a/tests/tcg/aarch64/sysregs.c b/tests/tcg/aarch64/sysregs.c
new file mode 100644
index 00000000000..40cf8d2877e
--- /dev/null
+++ b/tests/tcg/aarch64/sysregs.c
@@ -0,0 +1,172 @@
+/*
+ * Check emulated system register access for linux-user mode.
+ *
+ * See: https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt
+ *
+ * Copyright (c) 2019 Linaro
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include <asm/hwcap.h>
+#include <stdio.h>
+#include <sys/auxv.h>
+#include <signal.h>
+#include <string.h>
+#include <stdbool.h>
+
+#ifndef HWCAP_CPUID
+#define HWCAP_CPUID (1 << 11)
+#endif
+
+int failed_bit_count;
+
+/* Read and print system register `id' value */
+#define get_cpu_reg(id) ({ \
+ unsigned long __val = 0xdeadbeef; \
+ asm("mrs %0, "#id : "=r" (__val)); \
+ printf("%-20s: 0x%016lx\n", #id, __val); \
+ __val; \
+ })
+
+/* As above but also check no bits outside of `mask' are set*/
+#define get_cpu_reg_check_mask(id, mask) ({ \
+ unsigned long __cval = get_cpu_reg(id); \
+ unsigned long __extra = __cval & ~mask; \
+ if (__extra) { \
+ printf("%-20s: 0x%016lx\n", " !!extra bits!!", __extra); \
+ failed_bit_count++; \
+ } \
+})
+
+/* As above but check RAZ */
+#define get_cpu_reg_check_zero(id) ({ \
+ unsigned long __val = 0xdeadbeef; \
+ asm("mrs %0, "#id : "=r" (__val)); \
+ if (__val) { \
+ printf("%-20s: 0x%016lx (not RAZ!)\n", #id, __val); \
+ failed_bit_count++; \
+ } \
+})
+
+/* Chunk up mask into 63:48, 47:32, 31:16, 15:0 to ease counting */
+#define _m(a, b, c, d) (0x ## a ## b ## c ## d ##ULL)
+
+bool should_fail;
+int should_fail_count;
+int should_not_fail_count;
+uintptr_t failed_pc[10];
+
+void sigill_handler(int signo, siginfo_t *si, void *data)
+{
+ ucontext_t *uc = (ucontext_t *)data;
+
+ if (should_fail) {
+ should_fail_count++;
+ } else {
+ uintptr_t pc = (uintptr_t) uc->uc_mcontext.pc;
+ failed_pc[should_not_fail_count++] = pc;
+ }
+ uc->uc_mcontext.pc += 4;
+}
+
+int main(void)
+{
+ struct sigaction sa;
+
+ /* Hook in a SIGILL handler */
+ memset(&sa, 0, sizeof(struct sigaction));
+ sa.sa_flags = SA_SIGINFO;
+ sa.sa_sigaction = &sigill_handler;
+ sigemptyset(&sa.sa_mask);
+
+ if (sigaction(SIGILL, &sa, 0) != 0) {
+ perror("sigaction");
+ return 1;
+ }
+
+ /* Counter values have been exposed since Linux 4.12 */
+ printf("Checking Counter registers\n");
+
+ get_cpu_reg(ctr_el0);
+ get_cpu_reg(cntvct_el0);
+ get_cpu_reg(cntfrq_el0);
+
+ /* HWCAP_CPUID indicates we can read feature registers, since Linux 4.11 */
+ if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) {
+ printf("CPUID registers unavailable\n");
+ return 1;
+ } else {
+ printf("Checking CPUID registers\n");
+ }
+
+ /*
+ * Some registers only expose some bits to user-space. Anything
+ * that is IMPDEF is exported as 0 to user-space. The _mask checks
+ * assert no extra bits are set.
+ *
+ * This check is *not* comprehensive as some fields are set to
+ * minimum valid fields - for the purposes of this check allowed
+ * to have non-zero values.
+ */
+ get_cpu_reg_check_mask(id_aa64isar0_el1, _m(00ff,ffff,f0ff,fff0));
+ get_cpu_reg_check_mask(id_aa64isar1_el1, _m(0000,00f0,ffff,ffff));
+ /* TGran4 & TGran64 as pegged to -1 */
+ get_cpu_reg_check_mask(id_aa64mmfr0_el1, _m(0000,0000,ff00,0000));
+ get_cpu_reg_check_zero(id_aa64mmfr1_el1);
+ /* EL1/EL0 reported as AA64 only */
+ get_cpu_reg_check_mask(id_aa64pfr0_el1, _m(000f,000f,00ff,0011));
+ get_cpu_reg_check_mask(id_aa64pfr1_el1, _m(0000,0000,0000,00f0));
+ /* all hidden, DebugVer fixed to 0x6 (ARMv8 debug architecture) */
+ get_cpu_reg_check_mask(id_aa64dfr0_el1, _m(0000,0000,0000,0006));
+ get_cpu_reg_check_zero(id_aa64dfr1_el1);
+ get_cpu_reg_check_zero(id_aa64zfr0_el1);
+
+ get_cpu_reg_check_zero(id_aa64afr0_el1);
+ get_cpu_reg_check_zero(id_aa64afr1_el1);
+
+ get_cpu_reg_check_mask(midr_el1, _m(0000,0000,ffff,ffff));
+ /* mpidr sets bit 31, everything else hidden */
+ get_cpu_reg_check_mask(mpidr_el1, _m(0000,0000,8000,0000));
+ /* REVIDR is all IMPDEF so should be all zeros to user-space */
+ get_cpu_reg_check_zero(revidr_el1);
+
+ /*
+ * There are a block of more registers that are RAZ in the rest of
+ * the Op0=3, Op1=0, CRn=0, CRm=0,4,5,6,7 space. However for
+ * brevity we don't check stuff that is currently un-allocated
+ * here. Feel free to add them ;-)
+ */
+
+ printf("Remaining registers should fail\n");
+ should_fail = true;
+
+ /* Unexposed register access causes SIGILL */
+ get_cpu_reg(id_mmfr0_el1);
+ get_cpu_reg(id_mmfr1_el1);
+ get_cpu_reg(id_mmfr2_el1);
+ get_cpu_reg(id_mmfr3_el1);
+
+ get_cpu_reg(mvfr0_el1);
+ get_cpu_reg(mvfr1_el1);
+
+ if (should_not_fail_count > 0) {
+ int i;
+ for (i = 0; i < should_not_fail_count; i++) {
+ uintptr_t pc = failed_pc[i];
+ uint32_t insn = *(uint32_t *) pc;
+ printf("insn %#x @ %#lx unexpected FAIL\n", insn, pc);
+ }
+ return 1;
+ }
+
+ if (failed_bit_count > 0) {
+ printf("Extra information leaked to user-space!\n");
+ return 1;
+ }
+
+ return should_fail_count == 6 ? 0 : 1;
+}
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index 8ed477d0d51..a25afc071cc 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -42,4 +42,10 @@ run-semiconsole: semiconsole
run-plugin-semiconsole-with-%:
$(call skip-test, $<, "MANUAL ONLY")
+ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
+# System Registers Tests
+AARCH64_TESTS += sysregs
+sysregs: CFLAGS+=-march=armv8.1-a+sve
+endif
+
TESTS += $(AARCH64_TESTS)
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [PATCH v1 20/28] tests/tcg/aarch64: userspace system register test
2020-03-16 17:21 ` [PATCH v1 20/28] tests/tcg/aarch64: userspace system register test Alex Bennée
@ 2020-03-17 10:24 ` Philippe Mathieu-Daudé
2020-03-17 11:03 ` Alex Bennée
0 siblings, 1 reply; 46+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-03-17 10:24 UTC (permalink / raw)
To: Alex Bennée, qemu-devel; +Cc: Peter Maydell, qemu-arm, Richard Henderson
On 3/16/20 6:21 PM, Alex Bennée wrote:
> This tests a bunch of registers that the kernel allows userspace to
> read including the CPUID registers. We need a SVE aware compiler as we
> are testing the id_aa64zfr0_el1 register in the set.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Message-Id: <20190205190224.2198-7-alex.bennee@linaro.org>
>
> ---
> vgdbstub
> - don't build unless using docker or CROSS_CC_HAS_SVE
> ---
> tests/tcg/aarch64/sysregs.c | 172 ++++++++++++++++++++++++++++++
> tests/tcg/aarch64/Makefile.target | 6 ++
> 2 files changed, 178 insertions(+)
> create mode 100644 tests/tcg/aarch64/sysregs.c
>
> diff --git a/tests/tcg/aarch64/sysregs.c b/tests/tcg/aarch64/sysregs.c
> new file mode 100644
> index 00000000000..40cf8d2877e
> --- /dev/null
> +++ b/tests/tcg/aarch64/sysregs.c
> @@ -0,0 +1,172 @@
> +/*
> + * Check emulated system register access for linux-user mode.
> + *
> + * See: https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt
> + *
> + * Copyright (c) 2019 Linaro
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#include <asm/hwcap.h>
> +#include <stdio.h>
> +#include <sys/auxv.h>
> +#include <signal.h>
> +#include <string.h>
> +#include <stdbool.h>
> +
> +#ifndef HWCAP_CPUID
> +#define HWCAP_CPUID (1 << 11)
> +#endif
> +
> +int failed_bit_count;
> +
> +/* Read and print system register `id' value */
> +#define get_cpu_reg(id) ({ \
> + unsigned long __val = 0xdeadbeef; \
> + asm("mrs %0, "#id : "=r" (__val)); \
> + printf("%-20s: 0x%016lx\n", #id, __val); \
> + __val; \
> + })
> +
> +/* As above but also check no bits outside of `mask' are set*/
> +#define get_cpu_reg_check_mask(id, mask) ({ \
> + unsigned long __cval = get_cpu_reg(id); \
> + unsigned long __extra = __cval & ~mask; \
> + if (__extra) { \
> + printf("%-20s: 0x%016lx\n", " !!extra bits!!", __extra); \
> + failed_bit_count++; \
> + } \
> +})
> +
> +/* As above but check RAZ */
> +#define get_cpu_reg_check_zero(id) ({ \
> + unsigned long __val = 0xdeadbeef; \
> + asm("mrs %0, "#id : "=r" (__val)); \
> + if (__val) { \
> + printf("%-20s: 0x%016lx (not RAZ!)\n", #id, __val); \
> + failed_bit_count++; \
> + } \
> +})
> +
> +/* Chunk up mask into 63:48, 47:32, 31:16, 15:0 to ease counting */
> +#define _m(a, b, c, d) (0x ## a ## b ## c ## d ##ULL)
> +
> +bool should_fail;
> +int should_fail_count;
> +int should_not_fail_count;
> +uintptr_t failed_pc[10];
> +
> +void sigill_handler(int signo, siginfo_t *si, void *data)
> +{
> + ucontext_t *uc = (ucontext_t *)data;
> +
> + if (should_fail) {
> + should_fail_count++;
> + } else {
> + uintptr_t pc = (uintptr_t) uc->uc_mcontext.pc;
> + failed_pc[should_not_fail_count++] = pc;
> + }
> + uc->uc_mcontext.pc += 4;
> +}
> +
> +int main(void)
> +{
> + struct sigaction sa;
> +
> + /* Hook in a SIGILL handler */
> + memset(&sa, 0, sizeof(struct sigaction));
> + sa.sa_flags = SA_SIGINFO;
> + sa.sa_sigaction = &sigill_handler;
> + sigemptyset(&sa.sa_mask);
> +
> + if (sigaction(SIGILL, &sa, 0) != 0) {
> + perror("sigaction");
> + return 1;
> + }
> +
> + /* Counter values have been exposed since Linux 4.12 */
> + printf("Checking Counter registers\n");
> +
> + get_cpu_reg(ctr_el0);
> + get_cpu_reg(cntvct_el0);
> + get_cpu_reg(cntfrq_el0);
> +
> + /* HWCAP_CPUID indicates we can read feature registers, since Linux 4.11 */
> + if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) {
> + printf("CPUID registers unavailable\n");
> + return 1;
> + } else {
> + printf("Checking CPUID registers\n");
> + }
> +
> + /*
> + * Some registers only expose some bits to user-space. Anything
> + * that is IMPDEF is exported as 0 to user-space. The _mask checks
> + * assert no extra bits are set.
> + *
> + * This check is *not* comprehensive as some fields are set to
> + * minimum valid fields - for the purposes of this check allowed
> + * to have non-zero values.
> + */
> + get_cpu_reg_check_mask(id_aa64isar0_el1, _m(00ff,ffff,f0ff,fff0));
> + get_cpu_reg_check_mask(id_aa64isar1_el1, _m(0000,00f0,ffff,ffff));
> + /* TGran4 & TGran64 as pegged to -1 */
> + get_cpu_reg_check_mask(id_aa64mmfr0_el1, _m(0000,0000,ff00,0000));
> + get_cpu_reg_check_zero(id_aa64mmfr1_el1);
> + /* EL1/EL0 reported as AA64 only */
> + get_cpu_reg_check_mask(id_aa64pfr0_el1, _m(000f,000f,00ff,0011));
> + get_cpu_reg_check_mask(id_aa64pfr1_el1, _m(0000,0000,0000,00f0));
> + /* all hidden, DebugVer fixed to 0x6 (ARMv8 debug architecture) */
> + get_cpu_reg_check_mask(id_aa64dfr0_el1, _m(0000,0000,0000,0006));
> + get_cpu_reg_check_zero(id_aa64dfr1_el1);
> + get_cpu_reg_check_zero(id_aa64zfr0_el1);
> +
> + get_cpu_reg_check_zero(id_aa64afr0_el1);
> + get_cpu_reg_check_zero(id_aa64afr1_el1);
> +
> + get_cpu_reg_check_mask(midr_el1, _m(0000,0000,ffff,ffff));
> + /* mpidr sets bit 31, everything else hidden */
> + get_cpu_reg_check_mask(mpidr_el1, _m(0000,0000,8000,0000));
> + /* REVIDR is all IMPDEF so should be all zeros to user-space */
> + get_cpu_reg_check_zero(revidr_el1);
> +
> + /*
> + * There are a block of more registers that are RAZ in the rest of
> + * the Op0=3, Op1=0, CRn=0, CRm=0,4,5,6,7 space. However for
> + * brevity we don't check stuff that is currently un-allocated
> + * here. Feel free to add them ;-)
> + */
> +
> + printf("Remaining registers should fail\n");
> + should_fail = true;
> +
> + /* Unexposed register access causes SIGILL */
> + get_cpu_reg(id_mmfr0_el1);
> + get_cpu_reg(id_mmfr1_el1);
> + get_cpu_reg(id_mmfr2_el1);
> + get_cpu_reg(id_mmfr3_el1);
> +
> + get_cpu_reg(mvfr0_el1);
> + get_cpu_reg(mvfr1_el1);
> +
> + if (should_not_fail_count > 0) {
> + int i;
> + for (i = 0; i < should_not_fail_count; i++) {
> + uintptr_t pc = failed_pc[i];
> + uint32_t insn = *(uint32_t *) pc;
> + printf("insn %#x @ %#lx unexpected FAIL\n", insn, pc);
> + }
> + return 1;
> + }
> +
> + if (failed_bit_count > 0) {
> + printf("Extra information leaked to user-space!\n");
> + return 1;
> + }
> +
> + return should_fail_count == 6 ? 0 : 1;
> +}
> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
> index 8ed477d0d51..a25afc071cc 100644
> --- a/tests/tcg/aarch64/Makefile.target
> +++ b/tests/tcg/aarch64/Makefile.target
> @@ -42,4 +42,10 @@ run-semiconsole: semiconsole
> run-plugin-semiconsole-with-%:
> $(call skip-test, $<, "MANUAL ONLY")
>
> +ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
> +# System Registers Tests
> +AARCH64_TESTS += sysregs
> +sysregs: CFLAGS+=-march=armv8.1-a+sve
> +endif
> +
> TESTS += $(AARCH64_TESTS)
>
warning: while parsing target description (at line 47): Vector "vq128hf"
references undefined type "ieee_half"
warning: Could not load XML target description; ignoring
*** stack smashing detected ***: <unknown> terminated
(GCC 9.2.1, Fedora 30)
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH v1 20/28] tests/tcg/aarch64: userspace system register test
2020-03-17 10:24 ` Philippe Mathieu-Daudé
@ 2020-03-17 11:03 ` Alex Bennée
2020-03-17 11:43 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2020-03-17 11:03 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, qemu-arm, Richard Henderson, qemu-devel
Philippe Mathieu-Daudé <philmd@redhat.com> writes:
> On 3/16/20 6:21 PM, Alex Bennée wrote:
>> This tests a bunch of registers that the kernel allows userspace to
>> read including the CPUID registers. We need a SVE aware compiler as we
>> are testing the id_aa64zfr0_el1 register in the set.
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> Message-Id: <20190205190224.2198-7-alex.bennee@linaro.org>
>> ---
>> vgdbstub
>> - don't build unless using docker or CROSS_CC_HAS_SVE
>> ---
>> tests/tcg/aarch64/sysregs.c | 172 ++++++++++++++++++++++++++++++
>> tests/tcg/aarch64/Makefile.target | 6 ++
>> 2 files changed, 178 insertions(+)
>> create mode 100644 tests/tcg/aarch64/sysregs.c
>> diff --git a/tests/tcg/aarch64/sysregs.c
>> b/tests/tcg/aarch64/sysregs.c
>> new file mode 100644
>> index 00000000000..40cf8d2877e
>> --- /dev/null
>> +++ b/tests/tcg/aarch64/sysregs.c
>> @@ -0,0 +1,172 @@
>> +/*
>> + * Check emulated system register access for linux-user mode.
>> + *
>> + * See: https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt
>> + *
>> + * Copyright (c) 2019 Linaro
>> + *
>> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
>> + * See the COPYING file in the top-level directory.
>> + *
>> + * SPDX-License-Identifier: GPL-2.0-or-later
>> + */
>> +
>> +#include <asm/hwcap.h>
>> +#include <stdio.h>
>> +#include <sys/auxv.h>
>> +#include <signal.h>
>> +#include <string.h>
>> +#include <stdbool.h>
>> +
>> +#ifndef HWCAP_CPUID
>> +#define HWCAP_CPUID (1 << 11)
>> +#endif
>> +
>> +int failed_bit_count;
>> +
>> +/* Read and print system register `id' value */
>> +#define get_cpu_reg(id) ({ \
>> + unsigned long __val = 0xdeadbeef; \
>> + asm("mrs %0, "#id : "=r" (__val)); \
>> + printf("%-20s: 0x%016lx\n", #id, __val); \
>> + __val; \
>> + })
>> +
>> +/* As above but also check no bits outside of `mask' are set*/
>> +#define get_cpu_reg_check_mask(id, mask) ({ \
>> + unsigned long __cval = get_cpu_reg(id); \
>> + unsigned long __extra = __cval & ~mask; \
>> + if (__extra) { \
>> + printf("%-20s: 0x%016lx\n", " !!extra bits!!", __extra); \
>> + failed_bit_count++; \
>> + } \
>> +})
>> +
>> +/* As above but check RAZ */
>> +#define get_cpu_reg_check_zero(id) ({ \
>> + unsigned long __val = 0xdeadbeef; \
>> + asm("mrs %0, "#id : "=r" (__val)); \
>> + if (__val) { \
>> + printf("%-20s: 0x%016lx (not RAZ!)\n", #id, __val); \
>> + failed_bit_count++; \
>> + } \
>> +})
>> +
>> +/* Chunk up mask into 63:48, 47:32, 31:16, 15:0 to ease counting */
>> +#define _m(a, b, c, d) (0x ## a ## b ## c ## d ##ULL)
>> +
>> +bool should_fail;
>> +int should_fail_count;
>> +int should_not_fail_count;
>> +uintptr_t failed_pc[10];
>> +
>> +void sigill_handler(int signo, siginfo_t *si, void *data)
>> +{
>> + ucontext_t *uc = (ucontext_t *)data;
>> +
>> + if (should_fail) {
>> + should_fail_count++;
>> + } else {
>> + uintptr_t pc = (uintptr_t) uc->uc_mcontext.pc;
>> + failed_pc[should_not_fail_count++] = pc;
>> + }
>> + uc->uc_mcontext.pc += 4;
>> +}
>> +
>> +int main(void)
>> +{
>> + struct sigaction sa;
>> +
>> + /* Hook in a SIGILL handler */
>> + memset(&sa, 0, sizeof(struct sigaction));
>> + sa.sa_flags = SA_SIGINFO;
>> + sa.sa_sigaction = &sigill_handler;
>> + sigemptyset(&sa.sa_mask);
>> +
>> + if (sigaction(SIGILL, &sa, 0) != 0) {
>> + perror("sigaction");
>> + return 1;
>> + }
>> +
>> + /* Counter values have been exposed since Linux 4.12 */
>> + printf("Checking Counter registers\n");
>> +
>> + get_cpu_reg(ctr_el0);
>> + get_cpu_reg(cntvct_el0);
>> + get_cpu_reg(cntfrq_el0);
>> +
>> + /* HWCAP_CPUID indicates we can read feature registers, since Linux 4.11 */
>> + if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) {
>> + printf("CPUID registers unavailable\n");
>> + return 1;
>> + } else {
>> + printf("Checking CPUID registers\n");
>> + }
>> +
>> + /*
>> + * Some registers only expose some bits to user-space. Anything
>> + * that is IMPDEF is exported as 0 to user-space. The _mask checks
>> + * assert no extra bits are set.
>> + *
>> + * This check is *not* comprehensive as some fields are set to
>> + * minimum valid fields - for the purposes of this check allowed
>> + * to have non-zero values.
>> + */
>> + get_cpu_reg_check_mask(id_aa64isar0_el1, _m(00ff,ffff,f0ff,fff0));
>> + get_cpu_reg_check_mask(id_aa64isar1_el1, _m(0000,00f0,ffff,ffff));
>> + /* TGran4 & TGran64 as pegged to -1 */
>> + get_cpu_reg_check_mask(id_aa64mmfr0_el1, _m(0000,0000,ff00,0000));
>> + get_cpu_reg_check_zero(id_aa64mmfr1_el1);
>> + /* EL1/EL0 reported as AA64 only */
>> + get_cpu_reg_check_mask(id_aa64pfr0_el1, _m(000f,000f,00ff,0011));
>> + get_cpu_reg_check_mask(id_aa64pfr1_el1, _m(0000,0000,0000,00f0));
>> + /* all hidden, DebugVer fixed to 0x6 (ARMv8 debug architecture) */
>> + get_cpu_reg_check_mask(id_aa64dfr0_el1, _m(0000,0000,0000,0006));
>> + get_cpu_reg_check_zero(id_aa64dfr1_el1);
>> + get_cpu_reg_check_zero(id_aa64zfr0_el1);
>> +
>> + get_cpu_reg_check_zero(id_aa64afr0_el1);
>> + get_cpu_reg_check_zero(id_aa64afr1_el1);
>> +
>> + get_cpu_reg_check_mask(midr_el1, _m(0000,0000,ffff,ffff));
>> + /* mpidr sets bit 31, everything else hidden */
>> + get_cpu_reg_check_mask(mpidr_el1, _m(0000,0000,8000,0000));
>> + /* REVIDR is all IMPDEF so should be all zeros to user-space */
>> + get_cpu_reg_check_zero(revidr_el1);
>> +
>> + /*
>> + * There are a block of more registers that are RAZ in the rest of
>> + * the Op0=3, Op1=0, CRn=0, CRm=0,4,5,6,7 space. However for
>> + * brevity we don't check stuff that is currently un-allocated
>> + * here. Feel free to add them ;-)
>> + */
>> +
>> + printf("Remaining registers should fail\n");
>> + should_fail = true;
>> +
>> + /* Unexposed register access causes SIGILL */
>> + get_cpu_reg(id_mmfr0_el1);
>> + get_cpu_reg(id_mmfr1_el1);
>> + get_cpu_reg(id_mmfr2_el1);
>> + get_cpu_reg(id_mmfr3_el1);
>> +
>> + get_cpu_reg(mvfr0_el1);
>> + get_cpu_reg(mvfr1_el1);
>> +
>> + if (should_not_fail_count > 0) {
>> + int i;
>> + for (i = 0; i < should_not_fail_count; i++) {
>> + uintptr_t pc = failed_pc[i];
>> + uint32_t insn = *(uint32_t *) pc;
>> + printf("insn %#x @ %#lx unexpected FAIL\n", insn, pc);
>> + }
>> + return 1;
>> + }
>> +
>> + if (failed_bit_count > 0) {
>> + printf("Extra information leaked to user-space!\n");
>> + return 1;
>> + }
>> +
>> + return should_fail_count == 6 ? 0 : 1;
>> +}
>> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
>> index 8ed477d0d51..a25afc071cc 100644
>> --- a/tests/tcg/aarch64/Makefile.target
>> +++ b/tests/tcg/aarch64/Makefile.target
>> @@ -42,4 +42,10 @@ run-semiconsole: semiconsole
>> run-plugin-semiconsole-with-%:
>> $(call skip-test, $<, "MANUAL ONLY")
>> +ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
>> +# System Registers Tests
>> +AARCH64_TESTS += sysregs
>> +sysregs: CFLAGS+=-march=armv8.1-a+sve
>> +endif
>> +
>> TESTS += $(AARCH64_TESTS)
>>
>
> warning: while parsing target description (at line 47): Vector
> "vq128hf" references undefined type "ieee_half"
> warning: Could not load XML target description; ignoring
> *** stack smashing detected ***: <unknown> terminated
How? That test doesn't even use the gdbstub.
>
> (GCC 9.2.1, Fedora 30)
--
Alex Bennée
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH v1 20/28] tests/tcg/aarch64: userspace system register test
2020-03-17 11:03 ` Alex Bennée
@ 2020-03-17 11:43 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 46+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-03-17 11:43 UTC (permalink / raw)
To: Alex Bennée; +Cc: Peter Maydell, qemu-arm, Richard Henderson, qemu-devel
On 3/17/20 12:03 PM, Alex Bennée wrote:
>
> Philippe Mathieu-Daudé <philmd@redhat.com> writes:
>
>> On 3/16/20 6:21 PM, Alex Bennée wrote:
>>> This tests a bunch of registers that the kernel allows userspace to
>>> read including the CPUID registers. We need a SVE aware compiler as we
>>> are testing the id_aa64zfr0_el1 register in the set.
>>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>>> Message-Id: <20190205190224.2198-7-alex.bennee@linaro.org>
>>> ---
>>> vgdbstub
>>> - don't build unless using docker or CROSS_CC_HAS_SVE
>>> ---
>>> tests/tcg/aarch64/sysregs.c | 172 ++++++++++++++++++++++++++++++
>>> tests/tcg/aarch64/Makefile.target | 6 ++
>>> 2 files changed, 178 insertions(+)
>>> create mode 100644 tests/tcg/aarch64/sysregs.c
>>> diff --git a/tests/tcg/aarch64/sysregs.c
>>> b/tests/tcg/aarch64/sysregs.c
>>> new file mode 100644
>>> index 00000000000..40cf8d2877e
>>> --- /dev/null
>>> +++ b/tests/tcg/aarch64/sysregs.c
>>> @@ -0,0 +1,172 @@
>>> +/*
>>> + * Check emulated system register access for linux-user mode.
>>> + *
>>> + * See: https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt
>>> + *
>>> + * Copyright (c) 2019 Linaro
>>> + *
>>> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
>>> + * See the COPYING file in the top-level directory.
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0-or-later
>>> + */
>>> +
>>> +#include <asm/hwcap.h>
>>> +#include <stdio.h>
>>> +#include <sys/auxv.h>
>>> +#include <signal.h>
>>> +#include <string.h>
>>> +#include <stdbool.h>
>>> +
>>> +#ifndef HWCAP_CPUID
>>> +#define HWCAP_CPUID (1 << 11)
>>> +#endif
>>> +
>>> +int failed_bit_count;
>>> +
>>> +/* Read and print system register `id' value */
>>> +#define get_cpu_reg(id) ({ \
>>> + unsigned long __val = 0xdeadbeef; \
>>> + asm("mrs %0, "#id : "=r" (__val)); \
>>> + printf("%-20s: 0x%016lx\n", #id, __val); \
>>> + __val; \
>>> + })
>>> +
>>> +/* As above but also check no bits outside of `mask' are set*/
>>> +#define get_cpu_reg_check_mask(id, mask) ({ \
>>> + unsigned long __cval = get_cpu_reg(id); \
>>> + unsigned long __extra = __cval & ~mask; \
>>> + if (__extra) { \
>>> + printf("%-20s: 0x%016lx\n", " !!extra bits!!", __extra); \
>>> + failed_bit_count++; \
>>> + } \
>>> +})
>>> +
>>> +/* As above but check RAZ */
>>> +#define get_cpu_reg_check_zero(id) ({ \
>>> + unsigned long __val = 0xdeadbeef; \
>>> + asm("mrs %0, "#id : "=r" (__val)); \
>>> + if (__val) { \
>>> + printf("%-20s: 0x%016lx (not RAZ!)\n", #id, __val); \
>>> + failed_bit_count++; \
>>> + } \
>>> +})
>>> +
>>> +/* Chunk up mask into 63:48, 47:32, 31:16, 15:0 to ease counting */
>>> +#define _m(a, b, c, d) (0x ## a ## b ## c ## d ##ULL)
>>> +
>>> +bool should_fail;
>>> +int should_fail_count;
>>> +int should_not_fail_count;
>>> +uintptr_t failed_pc[10];
>>> +
>>> +void sigill_handler(int signo, siginfo_t *si, void *data)
>>> +{
>>> + ucontext_t *uc = (ucontext_t *)data;
>>> +
>>> + if (should_fail) {
>>> + should_fail_count++;
>>> + } else {
>>> + uintptr_t pc = (uintptr_t) uc->uc_mcontext.pc;
>>> + failed_pc[should_not_fail_count++] = pc;
>>> + }
>>> + uc->uc_mcontext.pc += 4;
>>> +}
>>> +
>>> +int main(void)
>>> +{
>>> + struct sigaction sa;
>>> +
>>> + /* Hook in a SIGILL handler */
>>> + memset(&sa, 0, sizeof(struct sigaction));
>>> + sa.sa_flags = SA_SIGINFO;
>>> + sa.sa_sigaction = &sigill_handler;
>>> + sigemptyset(&sa.sa_mask);
>>> +
>>> + if (sigaction(SIGILL, &sa, 0) != 0) {
>>> + perror("sigaction");
>>> + return 1;
>>> + }
>>> +
>>> + /* Counter values have been exposed since Linux 4.12 */
>>> + printf("Checking Counter registers\n");
>>> +
>>> + get_cpu_reg(ctr_el0);
>>> + get_cpu_reg(cntvct_el0);
>>> + get_cpu_reg(cntfrq_el0);
>>> +
>>> + /* HWCAP_CPUID indicates we can read feature registers, since Linux 4.11 */
>>> + if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) {
>>> + printf("CPUID registers unavailable\n");
>>> + return 1;
>>> + } else {
>>> + printf("Checking CPUID registers\n");
>>> + }
>>> +
>>> + /*
>>> + * Some registers only expose some bits to user-space. Anything
>>> + * that is IMPDEF is exported as 0 to user-space. The _mask checks
>>> + * assert no extra bits are set.
>>> + *
>>> + * This check is *not* comprehensive as some fields are set to
>>> + * minimum valid fields - for the purposes of this check allowed
>>> + * to have non-zero values.
>>> + */
>>> + get_cpu_reg_check_mask(id_aa64isar0_el1, _m(00ff,ffff,f0ff,fff0));
>>> + get_cpu_reg_check_mask(id_aa64isar1_el1, _m(0000,00f0,ffff,ffff));
>>> + /* TGran4 & TGran64 as pegged to -1 */
>>> + get_cpu_reg_check_mask(id_aa64mmfr0_el1, _m(0000,0000,ff00,0000));
>>> + get_cpu_reg_check_zero(id_aa64mmfr1_el1);
>>> + /* EL1/EL0 reported as AA64 only */
>>> + get_cpu_reg_check_mask(id_aa64pfr0_el1, _m(000f,000f,00ff,0011));
>>> + get_cpu_reg_check_mask(id_aa64pfr1_el1, _m(0000,0000,0000,00f0));
>>> + /* all hidden, DebugVer fixed to 0x6 (ARMv8 debug architecture) */
>>> + get_cpu_reg_check_mask(id_aa64dfr0_el1, _m(0000,0000,0000,0006));
>>> + get_cpu_reg_check_zero(id_aa64dfr1_el1);
>>> + get_cpu_reg_check_zero(id_aa64zfr0_el1);
>>> +
>>> + get_cpu_reg_check_zero(id_aa64afr0_el1);
>>> + get_cpu_reg_check_zero(id_aa64afr1_el1);
>>> +
>>> + get_cpu_reg_check_mask(midr_el1, _m(0000,0000,ffff,ffff));
>>> + /* mpidr sets bit 31, everything else hidden */
>>> + get_cpu_reg_check_mask(mpidr_el1, _m(0000,0000,8000,0000));
>>> + /* REVIDR is all IMPDEF so should be all zeros to user-space */
>>> + get_cpu_reg_check_zero(revidr_el1);
>>> +
>>> + /*
>>> + * There are a block of more registers that are RAZ in the rest of
>>> + * the Op0=3, Op1=0, CRn=0, CRm=0,4,5,6,7 space. However for
>>> + * brevity we don't check stuff that is currently un-allocated
>>> + * here. Feel free to add them ;-)
>>> + */
>>> +
>>> + printf("Remaining registers should fail\n");
>>> + should_fail = true;
>>> +
>>> + /* Unexposed register access causes SIGILL */
>>> + get_cpu_reg(id_mmfr0_el1);
>>> + get_cpu_reg(id_mmfr1_el1);
>>> + get_cpu_reg(id_mmfr2_el1);
>>> + get_cpu_reg(id_mmfr3_el1);
>>> +
>>> + get_cpu_reg(mvfr0_el1);
>>> + get_cpu_reg(mvfr1_el1);
>>> +
>>> + if (should_not_fail_count > 0) {
>>> + int i;
>>> + for (i = 0; i < should_not_fail_count; i++) {
>>> + uintptr_t pc = failed_pc[i];
>>> + uint32_t insn = *(uint32_t *) pc;
>>> + printf("insn %#x @ %#lx unexpected FAIL\n", insn, pc);
>>> + }
>>> + return 1;
>>> + }
>>> +
>>> + if (failed_bit_count > 0) {
>>> + printf("Extra information leaked to user-space!\n");
>>> + return 1;
>>> + }
>>> +
>>> + return should_fail_count == 6 ? 0 : 1;
>>> +}
>>> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
>>> index 8ed477d0d51..a25afc071cc 100644
>>> --- a/tests/tcg/aarch64/Makefile.target
>>> +++ b/tests/tcg/aarch64/Makefile.target
>>> @@ -42,4 +42,10 @@ run-semiconsole: semiconsole
>>> run-plugin-semiconsole-with-%:
>>> $(call skip-test, $<, "MANUAL ONLY")
>>> +ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
>>> +# System Registers Tests
>>> +AARCH64_TESTS += sysregs
>>> +sysregs: CFLAGS+=-march=armv8.1-a+sve
>>> +endif
>>> +
>>> TESTS += $(AARCH64_TESTS)
>>>
>>
>> warning: while parsing target description (at line 47): Vector
>> "vq128hf" references undefined type "ieee_half"
>> warning: Could not load XML target description; ignoring
>> *** stack smashing detected ***: <unknown> terminated
>
> How? That test doesn't even use the gdbstub.
This is a bug in my gdb :/
GNU gdb (GDB) Fedora 8.3-7.fc30
Copyright (C) 2019 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later
<http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.
Type "show copying" and "show warranty" for details.
This GDB was configured as "x86_64-redhat-linux-gnu".
Type "show configuration" for configuration details.
For bug reporting instructions, please see:
<http://www.gnu.org/software/gdb/bugs/>.
Find the GDB manual and other documentation resources online at:
<http://www.gnu.org/software/gdb/documentation/>.
For help, type "help".
Type "apropos word" to search for commands related to "word"...
Reading symbols from sysregs...
Remote debugging using localhost:1234
warning: while parsing target description (at line 47): Vector "vq128hf"
references undefined type "ieee_half"
warning: Could not load XML target description; ignoring
0x0000000000400498 in _start ()
PASS: connected to aarch64
x0 0x0 0
x1 0x0 0
x2 0x0 0
x3 0x0 0
x4 0x0 0
x5 0x0 0
x6 0x0 0
x7 0x0 0
x8 0x0 0
x9 0x0 0
x10 0x0 0
x11 0x0 0
x12 0x0 0
x13 0x0 0
x14 0x0 0
x15 0x0 0
x16 0x0 0
x17 0x0 0
x18 0x0 0
x19 0x0 0
x20 0x0 0
x21 0x0 0
x22 0x0 0
x23 0x0 0
x24 0x0 0
x25 0x0 0
x26 0x0 0
x27 0x0 0
x28 0x0 0
x29 0x0 0
x30 0x0 0
sp 0x40007ff0d0 0x40007ff0d0
pc 0x400498 0x400498 <_start>
cpsr 0x40000000 [ EL=0 Z ]
fpsr 0x0 0
fpcr 0x0 0
PASS: info registers
*** stack smashing detected ***: <unknown> terminated
Aborted (core dumped)
(gdb) bt
#0 0x00007f9036e02e35 in raise () from /lib64/libc.so.6
#1 0x00007f9036ded895 in abort () from /lib64/libc.so.6
#2 0x00007f9036e4608f in __libc_message () from /lib64/libc.so.6
#3 0x00007f9036ed6ce5 in __fortify_fail_abort () from /lib64/libc.so.6
#4 0x00007f9036ed6c98 in __stack_chk_fail () from /lib64/libc.so.6
#5 0x0000562619e27191 in remote_target::fetch_register_using_p
(this=<optimized out>, regcache=0x56261ab84430, reg=0x56261ab09140) at
../../gdb/remote.c:7959
#6 0x0000000000000000 in ?? ()
>
>>
>> (GCC 9.2.1, Fedora 30)
>
>
^ permalink raw reply [flat|nested] 46+ messages in thread
* [PATCH v1 21/28] configure: allow user to specify what gdb to use
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (19 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 20/28] tests/tcg/aarch64: userspace system register test Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 18:27 ` Peter Maydell
2020-03-16 17:21 ` [PATCH v1 22/28] tests/guest-debug: add a simple test runner Alex Bennée
` (7 subsequent siblings)
28 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, qemu-arm, Alex Bennée
This is useful, especially when testing relatively new gdbstub
features that might not be in distro packages yet.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
configure | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/configure b/configure
index eb49bb6680c..6724158fde1 100755
--- a/configure
+++ b/configure
@@ -303,6 +303,7 @@ libs_qga=""
debug_info="yes"
stack_protector=""
use_containers="yes"
+gdb_bin=$(command -v "gdb")
if test -e "$source_path/.git"
then
@@ -1588,6 +1589,8 @@ for opt do
;;
--disable-fuzzing) fuzzing=no
;;
+ --with-gdb=*) gdb_bin="$optarg"
+ ;;
*)
echo "ERROR: unknown option $opt"
echo "Try '$0 --help' for more information"
@@ -1773,6 +1776,7 @@ Advanced options (experts only):
--enable-plugins
enable plugins via shared library loading
--disable-containers don't use containers for cross-building
+ --with-gdb=GBB-path gdb to use for gdbstub tests [$gdb_bin]
Optional features, enabled with --enable-FEATURE and
disabled with --disable-FEATURE, default is enabled if available:
@@ -6734,6 +6738,7 @@ echo "libudev $libudev"
echo "default devices $default_devices"
echo "plugin support $plugins"
echo "fuzzing support $fuzzing"
+echo "gdb $gdb_bin"
if test "$supported_cpu" = "no"; then
echo
@@ -7608,6 +7613,10 @@ if test "$plugins" = "yes" ; then
fi
fi
+if test -n "$gdb_bin" ; then
+ echo "HAVE_GDB_BIN=$gdb_bin" >> $config_host_mak
+fi
+
if test "$tcg_interpreter" = "yes"; then
QEMU_INCLUDES="-iquote \$(SRC_PATH)/tcg/tci $QEMU_INCLUDES"
elif test "$ARCH" = "sparc64" ; then
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [PATCH v1 21/28] configure: allow user to specify what gdb to use
2020-03-16 17:21 ` [PATCH v1 21/28] configure: allow user to specify what gdb to use Alex Bennée
@ 2020-03-16 18:27 ` Peter Maydell
2020-03-17 9:46 ` Alex Bennée
0 siblings, 1 reply; 46+ messages in thread
From: Peter Maydell @ 2020-03-16 18:27 UTC (permalink / raw)
To: Alex Bennée; +Cc: qemu-arm, Richard Henderson, QEMU Developers
On Mon, 16 Mar 2020 at 18:22, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> This is useful, especially when testing relatively new gdbstub
> features that might not be in distro packages yet.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> configure | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/configure b/configure
> index eb49bb6680c..6724158fde1 100755
> --- a/configure
> +++ b/configure
> @@ -303,6 +303,7 @@ libs_qga=""
> debug_info="yes"
> stack_protector=""
> use_containers="yes"
> +gdb_bin=$(command -v "gdb")
>
> if test -e "$source_path/.git"
> then
> @@ -1588,6 +1589,8 @@ for opt do
> ;;
> --disable-fuzzing) fuzzing=no
> ;;
> + --with-gdb=*) gdb_bin="$optarg"
> + ;;
> *)
> echo "ERROR: unknown option $opt"
> echo "Try '$0 --help' for more information"
> @@ -1773,6 +1776,7 @@ Advanced options (experts only):
> --enable-plugins
> enable plugins via shared library loading
> --disable-containers don't use containers for cross-building
> + --with-gdb=GBB-path gdb to use for gdbstub tests [$gdb_bin]
s/GBB/GDB/. (Also, the only other program we pass to configure
with "--with-foo=" is git; for make, install, python, sphinx-build,
smbd, iasl, cc, gcov we just use "--foo=".)
thanks
-- PMM
^ permalink raw reply [flat|nested] 46+ messages in thread
* Re: [PATCH v1 21/28] configure: allow user to specify what gdb to use
2020-03-16 18:27 ` Peter Maydell
@ 2020-03-17 9:46 ` Alex Bennée
0 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-17 9:46 UTC (permalink / raw)
To: Peter Maydell; +Cc: qemu-arm, Richard Henderson, QEMU Developers
Peter Maydell <peter.maydell@linaro.org> writes:
> On Mon, 16 Mar 2020 at 18:22, Alex Bennée <alex.bennee@linaro.org> wrote:
>>
>> This is useful, especially when testing relatively new gdbstub
>> features that might not be in distro packages yet.
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> configure | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/configure b/configure
>> index eb49bb6680c..6724158fde1 100755
>> --- a/configure
>> +++ b/configure
>> @@ -303,6 +303,7 @@ libs_qga=""
>> debug_info="yes"
>> stack_protector=""
>> use_containers="yes"
>> +gdb_bin=$(command -v "gdb")
>>
>> if test -e "$source_path/.git"
>> then
>> @@ -1588,6 +1589,8 @@ for opt do
>> ;;
>> --disable-fuzzing) fuzzing=no
>> ;;
>> + --with-gdb=*) gdb_bin="$optarg"
>> + ;;
>> *)
>> echo "ERROR: unknown option $opt"
>> echo "Try '$0 --help' for more information"
>> @@ -1773,6 +1776,7 @@ Advanced options (experts only):
>> --enable-plugins
>> enable plugins via shared library loading
>> --disable-containers don't use containers for cross-building
>> + --with-gdb=GBB-path gdb to use for gdbstub tests [$gdb_bin]
>
> s/GBB/GDB/. (Also, the only other program we pass to configure
> with "--with-foo=" is git; for make, install, python, sphinx-build,
> smbd, iasl, cc, gcov we just use "--foo=".)
Alright I'll fix that up in the PR.
>
> thanks
> -- PMM
--
Alex Bennée
^ permalink raw reply [flat|nested] 46+ messages in thread
* [PATCH v1 22/28] tests/guest-debug: add a simple test runner
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (20 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 21/28] configure: allow user to specify what gdb to use Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-17 10:30 ` Philippe Mathieu-Daudé
2020-03-16 17:21 ` [PATCH v1 23/28] tests/tcg/aarch64: add a gdbstub testcase for SVE registers Alex Bennée
` (6 subsequent siblings)
28 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, qemu-arm, Alex Bennée
The test runners job is to start QEMU with guest debug enabled and
then spawn a gdb process running a test script that exercises the
functionality it wants to test.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
tests/guest-debug/run-test.py | 57 +++++++++++++++++++++++++++++++++++
1 file changed, 57 insertions(+)
create mode 100755 tests/guest-debug/run-test.py
diff --git a/tests/guest-debug/run-test.py b/tests/guest-debug/run-test.py
new file mode 100755
index 00000000000..8c49ee2f225
--- /dev/null
+++ b/tests/guest-debug/run-test.py
@@ -0,0 +1,57 @@
+#!/usr/bin/env python3
+#
+# Run a gdbstub test case
+#
+# Copyright (c) 2019 Linaro
+#
+# Author: Alex Bennée <alex.bennee@linaro.org>
+#
+# This work is licensed under the terms of the GNU GPL, version 2 or later.
+# See the COPYING file in the top-level directory.
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+import argparse
+import subprocess
+import shutil
+import shlex
+
+def get_args():
+ parser = argparse.ArgumentParser(description="A gdbstub test runner")
+ parser.add_argument("--qemu", help="Qemu binary for test",
+ required=True)
+ parser.add_argument("--qargs", help="Qemu arguments for test")
+ parser.add_argument("--binary", help="Binary to debug",
+ required=True)
+ parser.add_argument("--test", help="GDB test script",
+ required=True)
+ parser.add_argument("--gdb", help="The gdb binary to use", default=None)
+
+ return parser.parse_args()
+
+if __name__ == '__main__':
+ args = get_args()
+
+ # Search for a gdb we can use
+ if not args.gdb:
+ args.gdb = shutil.which("gdb-multiarch")
+ if not args.gdb:
+ args.gdb = shutil.which("gdb")
+ if not args.gdb:
+ print("We need gdb to run the test")
+ exit(-1)
+
+ # Launch QEMU with binary
+ if "system" in args.qemu:
+ cmd = "%s %s %s -s -S" % (args.qemu, args.qargs, args.binary)
+ else:
+ cmd = "%s %s -g 1234 %s" % (args.qemu, args.qargs, args.binary)
+
+ inferior = subprocess.Popen(shlex.split(cmd))
+
+ # Now launch gdb with our test and collect the result
+ gdb_cmd = "%s %s -ex 'target remote localhost:1234' -x %s" % (args.gdb, args.binary, args.test)
+
+ result = subprocess.call(gdb_cmd, shell=True);
+
+ exit(result)
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [PATCH v1 22/28] tests/guest-debug: add a simple test runner
2020-03-16 17:21 ` [PATCH v1 22/28] tests/guest-debug: add a simple test runner Alex Bennée
@ 2020-03-17 10:30 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 46+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-03-17 10:30 UTC (permalink / raw)
To: Alex Bennée, qemu-devel; +Cc: qemu-arm, Richard Henderson
On 3/16/20 6:21 PM, Alex Bennée wrote:
> The test runners job is to start QEMU with guest debug enabled and
> then spawn a gdb process running a test script that exercises the
> functionality it wants to test.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> tests/guest-debug/run-test.py | 57 +++++++++++++++++++++++++++++++++++
> 1 file changed, 57 insertions(+)
> create mode 100755 tests/guest-debug/run-test.py
>
> diff --git a/tests/guest-debug/run-test.py b/tests/guest-debug/run-test.py
> new file mode 100755
> index 00000000000..8c49ee2f225
> --- /dev/null
> +++ b/tests/guest-debug/run-test.py
> @@ -0,0 +1,57 @@
> +#!/usr/bin/env python3
> +#
> +# Run a gdbstub test case
> +#
> +# Copyright (c) 2019 Linaro
> +#
> +# Author: Alex Bennée <alex.bennee@linaro.org>
> +#
> +# This work is licensed under the terms of the GNU GPL, version 2 or later.
> +# See the COPYING file in the top-level directory.
> +#
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +
> +import argparse
> +import subprocess
> +import shutil
> +import shlex
> +
> +def get_args():
> + parser = argparse.ArgumentParser(description="A gdbstub test runner")
> + parser.add_argument("--qemu", help="Qemu binary for test",
> + required=True)
> + parser.add_argument("--qargs", help="Qemu arguments for test")
> + parser.add_argument("--binary", help="Binary to debug",
> + required=True)
> + parser.add_argument("--test", help="GDB test script",
> + required=True)
> + parser.add_argument("--gdb", help="The gdb binary to use", default=None)
> +
> + return parser.parse_args()
> +
> +if __name__ == '__main__':
> + args = get_args()
> +
> + # Search for a gdb we can use
> + if not args.gdb:
> + args.gdb = shutil.which("gdb-multiarch")
> + if not args.gdb:
> + args.gdb = shutil.which("gdb")
> + if not args.gdb:
> + print("We need gdb to run the test")
> + exit(-1)
> +
> + # Launch QEMU with binary
> + if "system" in args.qemu:
> + cmd = "%s %s %s -s -S" % (args.qemu, args.qargs, args.binary)
> + else:
> + cmd = "%s %s -g 1234 %s" % (args.qemu, args.qargs, args.binary)
> +
> + inferior = subprocess.Popen(shlex.split(cmd))
> +
> + # Now launch gdb with our test and collect the result
> + gdb_cmd = "%s %s -ex 'target remote localhost:1234' -x %s" % (args.gdb, args.binary, args.test)
> +
> + result = subprocess.call(gdb_cmd, shell=True);
> +
> + exit(result)
>
^ permalink raw reply [flat|nested] 46+ messages in thread
* [PATCH v1 23/28] tests/tcg/aarch64: add a gdbstub testcase for SVE registers
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (21 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 22/28] tests/guest-debug: add a simple test runner Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-17 10:30 ` Philippe Mathieu-Daudé
2020-03-16 17:21 ` [PATCH v1 24/28] tests/tcg/aarch64: add SVE iotcl test Alex Bennée
` (5 subsequent siblings)
28 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, qemu-arm, Alex Bennée
A very simple test case which sets and reads SVE registers while
running a test case. We don't really need to compile a SVE binary for
this case but we will later so keep it simple for now.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v5
- properly plumb in
- skip if fails to connect
---
tests/.gitignore | 1 +
tests/tcg/aarch64/Makefile.target | 15 +++++
tests/tcg/aarch64/gdbstub/test-sve.py | 81 +++++++++++++++++++++++++++
3 files changed, 97 insertions(+)
create mode 100644 tests/tcg/aarch64/gdbstub/test-sve.py
diff --git a/tests/.gitignore b/tests/.gitignore
index 7306866f216..d03c037d772 100644
--- a/tests/.gitignore
+++ b/tests/.gitignore
@@ -10,6 +10,7 @@ qht-bench
rcutorture
test-*
!test-*.c
+!test-*.py
!docker/test-*
test-qapi-commands.[ch]
test-qapi-init-commands.[ch]
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index a25afc071cc..b61b53e4dd1 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -46,6 +46,21 @@ ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
# System Registers Tests
AARCH64_TESTS += sysregs
sysregs: CFLAGS+=-march=armv8.1-a+sve
+
+ifneq ($(HAVE_GDB_BIN),)
+GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py
+
+AARCH64_TESTS += gdbstub-sysregs
+
+.PHONY: gdbstub-sysregs
+run-gdbstub-sysregs: sysregs
+ $(call run-test, $@, $(GDB_SCRIPT) \
+ --gdb $(HAVE_GDB_BIN) \
+ --qemu $(QEMU) --qargs "$(QEMU_OPTS)" \
+ --bin $< --test $(AARCH64_SRC)/gdbstub/test-sve.py, \
+ "basic gdbstub SVE support")
+endif
+
endif
TESTS += $(AARCH64_TESTS)
diff --git a/tests/tcg/aarch64/gdbstub/test-sve.py b/tests/tcg/aarch64/gdbstub/test-sve.py
new file mode 100644
index 00000000000..90201d80094
--- /dev/null
+++ b/tests/tcg/aarch64/gdbstub/test-sve.py
@@ -0,0 +1,81 @@
+from __future__ import print_function
+#
+# Test the SVE registers are visable and changeable via gdbstub
+#
+# This is launched via tests/guest-debug/run-test.py
+#
+
+import gdb
+import sys
+
+MAGIC = 0xDEADBEEF
+
+failcount = 0
+
+def report(cond, msg):
+ "Report success/fail of test"
+ if cond:
+ print ("PASS: %s" % (msg))
+ else:
+ print ("FAIL: %s" % (msg))
+ global failcount
+ failcount += 1
+
+def run_test():
+ "Run through the tests one by one"
+
+ gdb.execute("info registers")
+ report(True, "info registers")
+
+ gdb.execute("info registers vector")
+ report(True, "info registers vector")
+
+ # Now all the zregs
+ frame = gdb.selected_frame()
+ for i in range(0, 32):
+ rname = "z%d" % (i)
+ zreg = frame.read_register(rname)
+ report(True, "Reading %s" % rname)
+ for j in range(0, 4):
+ cmd = "set $%s.q.u[%d] = 0x%x" % (rname, j, MAGIC)
+ gdb.execute(cmd)
+ report(True, "%s" % cmd)
+ for j in range(0, 4):
+ reg = "$%s.q.u[%d]" % (rname, j)
+ v = gdb.parse_and_eval(reg)
+ report(str(v.type) == "uint128_t", "size of %s" % (reg))
+ for j in range(0, 8):
+ cmd = "set $%s.d.u[%d] = 0x%x" % (rname, j, MAGIC)
+ gdb.execute(cmd)
+ report(True, "%s" % cmd)
+ for j in range(0, 8):
+ reg = "$%s.d.u[%d]" % (rname, j)
+ v = gdb.parse_and_eval(reg)
+ report(str(v.type) == "uint64_t", "size of %s" % (reg))
+ report(int(v) == MAGIC, "%s is 0x%x" % (reg, MAGIC))
+
+#
+# This runs as the script it sourced (via -x, via run-test.py)
+#
+try:
+ inferior = gdb.selected_inferior()
+ arch = inferior.architecture()
+ report(arch.name() == "aarch64", "connected to aarch64")
+except (gdb.error, AttributeError):
+ print("SKIPPING (not connected)", file=sys.stderr)
+ exit(0)
+
+try:
+ # These are not very useful in scripts
+ gdb.execute("set pagination off")
+ gdb.execute("set confirm off")
+
+ # Run the actual tests
+ run_test()
+except:
+ print ("GDB Exception: %s" % (sys.exc_info()[0]))
+ failcount += 1
+
+print("All tests complete: %d failures" % failcount)
+
+exit(failcount)
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [PATCH v1 23/28] tests/tcg/aarch64: add a gdbstub testcase for SVE registers
2020-03-16 17:21 ` [PATCH v1 23/28] tests/tcg/aarch64: add a gdbstub testcase for SVE registers Alex Bennée
@ 2020-03-17 10:30 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 46+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-03-17 10:30 UTC (permalink / raw)
To: Alex Bennée, qemu-devel; +Cc: Peter Maydell, qemu-arm
On 3/16/20 6:21 PM, Alex Bennée wrote:
> A very simple test case which sets and reads SVE registers while
> running a test case. We don't really need to compile a SVE binary for
> this case but we will later so keep it simple for now.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>
> ---
> v5
> - properly plumb in
> - skip if fails to connect
> ---
> tests/.gitignore | 1 +
> tests/tcg/aarch64/Makefile.target | 15 +++++
> tests/tcg/aarch64/gdbstub/test-sve.py | 81 +++++++++++++++++++++++++++
> 3 files changed, 97 insertions(+)
> create mode 100644 tests/tcg/aarch64/gdbstub/test-sve.py
>
> diff --git a/tests/.gitignore b/tests/.gitignore
> index 7306866f216..d03c037d772 100644
> --- a/tests/.gitignore
> +++ b/tests/.gitignore
> @@ -10,6 +10,7 @@ qht-bench
> rcutorture
> test-*
> !test-*.c
> +!test-*.py
> !docker/test-*
> test-qapi-commands.[ch]
> test-qapi-init-commands.[ch]
> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
> index a25afc071cc..b61b53e4dd1 100644
> --- a/tests/tcg/aarch64/Makefile.target
> +++ b/tests/tcg/aarch64/Makefile.target
> @@ -46,6 +46,21 @@ ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
> # System Registers Tests
> AARCH64_TESTS += sysregs
> sysregs: CFLAGS+=-march=armv8.1-a+sve
> +
> +ifneq ($(HAVE_GDB_BIN),)
> +GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py
> +
> +AARCH64_TESTS += gdbstub-sysregs
> +
> +.PHONY: gdbstub-sysregs
> +run-gdbstub-sysregs: sysregs
> + $(call run-test, $@, $(GDB_SCRIPT) \
> + --gdb $(HAVE_GDB_BIN) \
> + --qemu $(QEMU) --qargs "$(QEMU_OPTS)" \
> + --bin $< --test $(AARCH64_SRC)/gdbstub/test-sve.py, \
> + "basic gdbstub SVE support")
> +endif
> +
> endif
>
> TESTS += $(AARCH64_TESTS)
> diff --git a/tests/tcg/aarch64/gdbstub/test-sve.py b/tests/tcg/aarch64/gdbstub/test-sve.py
> new file mode 100644
> index 00000000000..90201d80094
> --- /dev/null
> +++ b/tests/tcg/aarch64/gdbstub/test-sve.py
> @@ -0,0 +1,81 @@
> +from __future__ import print_function
> +#
> +# Test the SVE registers are visable and changeable via gdbstub
> +#
> +# This is launched via tests/guest-debug/run-test.py
> +#
> +
> +import gdb
> +import sys
> +
> +MAGIC = 0xDEADBEEF
> +
> +failcount = 0
> +
> +def report(cond, msg):
> + "Report success/fail of test"
> + if cond:
> + print ("PASS: %s" % (msg))
> + else:
> + print ("FAIL: %s" % (msg))
> + global failcount
> + failcount += 1
> +
> +def run_test():
> + "Run through the tests one by one"
> +
> + gdb.execute("info registers")
> + report(True, "info registers")
> +
> + gdb.execute("info registers vector")
> + report(True, "info registers vector")
> +
> + # Now all the zregs
> + frame = gdb.selected_frame()
> + for i in range(0, 32):
> + rname = "z%d" % (i)
> + zreg = frame.read_register(rname)
> + report(True, "Reading %s" % rname)
> + for j in range(0, 4):
> + cmd = "set $%s.q.u[%d] = 0x%x" % (rname, j, MAGIC)
> + gdb.execute(cmd)
> + report(True, "%s" % cmd)
> + for j in range(0, 4):
> + reg = "$%s.q.u[%d]" % (rname, j)
> + v = gdb.parse_and_eval(reg)
> + report(str(v.type) == "uint128_t", "size of %s" % (reg))
> + for j in range(0, 8):
> + cmd = "set $%s.d.u[%d] = 0x%x" % (rname, j, MAGIC)
> + gdb.execute(cmd)
> + report(True, "%s" % cmd)
> + for j in range(0, 8):
> + reg = "$%s.d.u[%d]" % (rname, j)
> + v = gdb.parse_and_eval(reg)
> + report(str(v.type) == "uint64_t", "size of %s" % (reg))
> + report(int(v) == MAGIC, "%s is 0x%x" % (reg, MAGIC))
> +
> +#
> +# This runs as the script it sourced (via -x, via run-test.py)
> +#
> +try:
> + inferior = gdb.selected_inferior()
> + arch = inferior.architecture()
> + report(arch.name() == "aarch64", "connected to aarch64")
> +except (gdb.error, AttributeError):
> + print("SKIPPING (not connected)", file=sys.stderr)
> + exit(0)
> +
> +try:
> + # These are not very useful in scripts
> + gdb.execute("set pagination off")
> + gdb.execute("set confirm off")
> +
> + # Run the actual tests
> + run_test()
> +except:
> + print ("GDB Exception: %s" % (sys.exc_info()[0]))
> + failcount += 1
> +
> +print("All tests complete: %d failures" % failcount)
> +
> +exit(failcount)
>
^ permalink raw reply [flat|nested] 46+ messages in thread
* [PATCH v1 24/28] tests/tcg/aarch64: add SVE iotcl test
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (22 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 23/28] tests/tcg/aarch64: add a gdbstub testcase for SVE registers Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-17 10:29 ` Philippe Mathieu-Daudé
2020-03-16 17:21 ` [PATCH v1 25/28] tests/tcg/aarch64: add test-sve-ioctl guest-debug test Alex Bennée
` (4 subsequent siblings)
28 siblings, 1 reply; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, qemu-arm, Alex Bennée
This is a fairly bare-bones test of setting the various vector sizes
for SVE which will only fail if the PR_SVE_SET_VL can't reduce the
user-space vector length by powers of 2.
However we will also be able to use it in a future test which
exercises the GDB stub.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v3
- use index to fill zreg
- CROSS_CC_HAS_SVE
v5
- merge conflicts
v6
- drop id check
---
tests/tcg/aarch64/sve-ioctls.c | 70 +++++++++++++++++++++++++++++++
tests/tcg/aarch64/Makefile.target | 4 ++
2 files changed, 74 insertions(+)
create mode 100644 tests/tcg/aarch64/sve-ioctls.c
diff --git a/tests/tcg/aarch64/sve-ioctls.c b/tests/tcg/aarch64/sve-ioctls.c
new file mode 100644
index 00000000000..9544dffa0ee
--- /dev/null
+++ b/tests/tcg/aarch64/sve-ioctls.c
@@ -0,0 +1,70 @@
+/*
+ * SVE ioctls tests
+ *
+ * Test the SVE width setting ioctls work and provide a base for
+ * testing the gdbstub.
+ *
+ * Copyright (c) 2019 Linaro Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#include <sys/prctl.h>
+#include <asm/hwcap.h>
+#include <stdio.h>
+#include <sys/auxv.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#ifndef HWCAP_CPUID
+#define HWCAP_CPUID (1 << 11)
+#endif
+
+#define SVE_MAX_QUADS (2048 / 128)
+#define BYTES_PER_QUAD (128 / 8)
+
+#define get_cpu_reg(id) ({ \
+ unsigned long __val; \
+ asm("mrs %0, "#id : "=r" (__val)); \
+ __val; \
+ })
+
+static int do_sve_ioctl_test(void)
+{
+ int i, res, init_vq;
+
+ res = prctl(PR_SVE_GET_VL, 0, 0, 0, 0);
+ if (res < 0) {
+ printf("FAILED to PR_SVE_GET_VL (%d)", res);
+ return -1;
+ }
+ init_vq = res & PR_SVE_VL_LEN_MASK;
+
+ for (i = init_vq; i > 15; i /= 2) {
+ printf("Checking PR_SVE_SET_VL=%d\n", i);
+ res = prctl(PR_SVE_SET_VL, i, 0, 0, 0, 0);
+ if (res < 0) {
+ printf("FAILED to PR_SVE_SET_VL (%d)", res);
+ return -1;
+ }
+ asm("index z0.b, #0, #1\n"
+ ".global __sve_ld_done\n"
+ "__sve_ld_done:\n"
+ "mov z0.b, #0\n"
+ : /* no outputs kept */
+ : /* no inputs */
+ : "memory", "z0");
+ }
+ printf("PASS\n");
+ return 0;
+}
+
+int main(int argc, char **argv)
+{
+ /* we also need to probe for the ioctl support */
+ if (getauxval(AT_HWCAP) & HWCAP_SVE) {
+ return do_sve_ioctl_test();
+ } else {
+ printf("SKIP: no HWCAP_SVE on this system\n");
+ return 0;
+ }
+}
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index b61b53e4dd1..c879932ff6c 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -47,6 +47,10 @@ ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
AARCH64_TESTS += sysregs
sysregs: CFLAGS+=-march=armv8.1-a+sve
+# SVE ioctl test
+AARCH64_TESTS += sve-ioctls
+sve-ioctls: CFLAGS+=-march=armv8.1-a+sve
+
ifneq ($(HAVE_GDB_BIN),)
GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [PATCH v1 24/28] tests/tcg/aarch64: add SVE iotcl test
2020-03-16 17:21 ` [PATCH v1 24/28] tests/tcg/aarch64: add SVE iotcl test Alex Bennée
@ 2020-03-17 10:29 ` Philippe Mathieu-Daudé
2020-03-17 10:45 ` Aleksandar Markovic
2020-03-17 13:40 ` Aleksandar Markovic
0 siblings, 2 replies; 46+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-03-17 10:29 UTC (permalink / raw)
To: Alex Bennée, qemu-devel; +Cc: Peter Maydell, qemu-arm
On 3/16/20 6:21 PM, Alex Bennée wrote:
> This is a fairly bare-bones test of setting the various vector sizes
> for SVE which will only fail if the PR_SVE_SET_VL can't reduce the
> user-space vector length by powers of 2.
>
> However we will also be able to use it in a future test which
> exercises the GDB stub.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>
> ---
> v3
> - use index to fill zreg
> - CROSS_CC_HAS_SVE
> v5
> - merge conflicts
> v6
> - drop id check
> ---
> tests/tcg/aarch64/sve-ioctls.c | 70 +++++++++++++++++++++++++++++++
> tests/tcg/aarch64/Makefile.target | 4 ++
> 2 files changed, 74 insertions(+)
> create mode 100644 tests/tcg/aarch64/sve-ioctls.c
>
> diff --git a/tests/tcg/aarch64/sve-ioctls.c b/tests/tcg/aarch64/sve-ioctls.c
> new file mode 100644
> index 00000000000..9544dffa0ee
> --- /dev/null
> +++ b/tests/tcg/aarch64/sve-ioctls.c
> @@ -0,0 +1,70 @@
> +/*
> + * SVE ioctls tests
> + *
> + * Test the SVE width setting ioctls work and provide a base for
> + * testing the gdbstub.
> + *
> + * Copyright (c) 2019 Linaro Ltd
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#include <sys/prctl.h>
> +#include <asm/hwcap.h>
> +#include <stdio.h>
> +#include <sys/auxv.h>
> +#include <stdint.h>
> +#include <stdlib.h>
> +
> +#ifndef HWCAP_CPUID
> +#define HWCAP_CPUID (1 << 11)
> +#endif
> +
> +#define SVE_MAX_QUADS (2048 / 128)
> +#define BYTES_PER_QUAD (128 / 8)
> +
> +#define get_cpu_reg(id) ({ \
> + unsigned long __val; \
> + asm("mrs %0, "#id : "=r" (__val)); \
> + __val; \
> + })
> +
> +static int do_sve_ioctl_test(void)
> +{
> + int i, res, init_vq;
> +
> + res = prctl(PR_SVE_GET_VL, 0, 0, 0, 0);
> + if (res < 0) {
> + printf("FAILED to PR_SVE_GET_VL (%d)", res);
> + return -1;
> + }
> + init_vq = res & PR_SVE_VL_LEN_MASK;
> +
> + for (i = init_vq; i > 15; i /= 2) {
> + printf("Checking PR_SVE_SET_VL=%d\n", i);
> + res = prctl(PR_SVE_SET_VL, i, 0, 0, 0, 0);
> + if (res < 0) {
> + printf("FAILED to PR_SVE_SET_VL (%d)", res);
> + return -1;
> + }
> + asm("index z0.b, #0, #1\n"
> + ".global __sve_ld_done\n"
> + "__sve_ld_done:\n"
> + "mov z0.b, #0\n"
> + : /* no outputs kept */
> + : /* no inputs */
> + : "memory", "z0");
> + }
> + printf("PASS\n");
> + return 0;
> +}
> +
> +int main(int argc, char **argv)
> +{
> + /* we also need to probe for the ioctl support */
> + if (getauxval(AT_HWCAP) & HWCAP_SVE) {
> + return do_sve_ioctl_test();
> + } else {
> + printf("SKIP: no HWCAP_SVE on this system\n");
> + return 0;
> + }
> +}
> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
> index b61b53e4dd1..c879932ff6c 100644
> --- a/tests/tcg/aarch64/Makefile.target
> +++ b/tests/tcg/aarch64/Makefile.target
> @@ -47,6 +47,10 @@ ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
> AARCH64_TESTS += sysregs
> sysregs: CFLAGS+=-march=armv8.1-a+sve
>
> +# SVE ioctl test
> +AARCH64_TESTS += sve-ioctls
> +sve-ioctls: CFLAGS+=-march=armv8.1-a+sve
> +
> ifneq ($(HAVE_GDB_BIN),)
> GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py
>
>
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH v1 24/28] tests/tcg/aarch64: add SVE iotcl test
2020-03-17 10:29 ` Philippe Mathieu-Daudé
@ 2020-03-17 10:45 ` Aleksandar Markovic
2020-03-17 10:49 ` Peter Maydell
2020-03-17 13:40 ` Aleksandar Markovic
1 sibling, 1 reply; 46+ messages in thread
From: Aleksandar Markovic @ 2020-03-17 10:45 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, qemu-arm, Alex Bennée, qemu-devel
уто, 17. мар 2020. у 11:33 Philippe Mathieu-Daudé <philmd@redhat.com>
је написао/ла:
>
> On 3/16/20 6:21 PM, Alex Bennée wrote:
> > This is a fairly bare-bones test of setting the various vector sizes
> > for SVE which will only fail if the PR_SVE_SET_VL can't reduce the
> > user-space vector length by powers of 2.
> >
> > However we will also be able to use it in a future test which
> > exercises the GDB stub.
> >
> > Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>
I think it would be clearer and better if you used used the
word "prctl" rather than "ioctl" in both title/commit message
and code (including comments).
I think it is also a little problematic that tests like this reside
and belong in tests/tcg - since they deal more with elements
of kernel interface (system call prctl()), rather than TCG.
Still, I see there are many other similar cases in tests/tcg,
so probably (at this moment) one should't bother about it in
the context of this patch. However, in general, the location
/tests/tcg for all these cases seems wrong to me.
Sincerely,
Aleksandar
> >
> > ---
> > v3
> > - use index to fill zreg
> > - CROSS_CC_HAS_SVE
> > v5
> > - merge conflicts
> > v6
> > - drop id check
> > ---
> > tests/tcg/aarch64/sve-ioctls.c | 70 +++++++++++++++++++++++++++++++
> > tests/tcg/aarch64/Makefile.target | 4 ++
> > 2 files changed, 74 insertions(+)
> > create mode 100644 tests/tcg/aarch64/sve-ioctls.c
> >
> > diff --git a/tests/tcg/aarch64/sve-ioctls.c b/tests/tcg/aarch64/sve-ioctls.c
> > new file mode 100644
> > index 00000000000..9544dffa0ee
> > --- /dev/null
> > +++ b/tests/tcg/aarch64/sve-ioctls.c
> > @@ -0,0 +1,70 @@
> > +/*
> > + * SVE ioctls tests
> > + *
> > + * Test the SVE width setting ioctls work and provide a base for
> > + * testing the gdbstub.
> > + *
> > + * Copyright (c) 2019 Linaro Ltd
> > + *
> > + * SPDX-License-Identifier: GPL-2.0-or-later
> > + */
> > +#include <sys/prctl.h>
> > +#include <asm/hwcap.h>
> > +#include <stdio.h>
> > +#include <sys/auxv.h>
> > +#include <stdint.h>
> > +#include <stdlib.h>
> > +
> > +#ifndef HWCAP_CPUID
> > +#define HWCAP_CPUID (1 << 11)
> > +#endif
> > +
> > +#define SVE_MAX_QUADS (2048 / 128)
> > +#define BYTES_PER_QUAD (128 / 8)
> > +
> > +#define get_cpu_reg(id) ({ \
> > + unsigned long __val; \
> > + asm("mrs %0, "#id : "=r" (__val)); \
> > + __val; \
> > + })
> > +
> > +static int do_sve_ioctl_test(void)
> > +{
> > + int i, res, init_vq;
> > +
> > + res = prctl(PR_SVE_GET_VL, 0, 0, 0, 0);
> > + if (res < 0) {
> > + printf("FAILED to PR_SVE_GET_VL (%d)", res);
> > + return -1;
> > + }
> > + init_vq = res & PR_SVE_VL_LEN_MASK;
> > +
> > + for (i = init_vq; i > 15; i /= 2) {
> > + printf("Checking PR_SVE_SET_VL=%d\n", i);
> > + res = prctl(PR_SVE_SET_VL, i, 0, 0, 0, 0);
> > + if (res < 0) {
> > + printf("FAILED to PR_SVE_SET_VL (%d)", res);
> > + return -1;
> > + }
> > + asm("index z0.b, #0, #1\n"
> > + ".global __sve_ld_done\n"
> > + "__sve_ld_done:\n"
> > + "mov z0.b, #0\n"
> > + : /* no outputs kept */
> > + : /* no inputs */
> > + : "memory", "z0");
> > + }
> > + printf("PASS\n");
> > + return 0;
> > +}
> > +
> > +int main(int argc, char **argv)
> > +{
> > + /* we also need to probe for the ioctl support */
> > + if (getauxval(AT_HWCAP) & HWCAP_SVE) {
> > + return do_sve_ioctl_test();
> > + } else {
> > + printf("SKIP: no HWCAP_SVE on this system\n");
> > + return 0;
> > + }
> > +}
> > diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
> > index b61b53e4dd1..c879932ff6c 100644
> > --- a/tests/tcg/aarch64/Makefile.target
> > +++ b/tests/tcg/aarch64/Makefile.target
> > @@ -47,6 +47,10 @@ ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
> > AARCH64_TESTS += sysregs
> > sysregs: CFLAGS+=-march=armv8.1-a+sve
> >
> > +# SVE ioctl test
> > +AARCH64_TESTS += sve-ioctls
> > +sve-ioctls: CFLAGS+=-march=armv8.1-a+sve
> > +
> > ifneq ($(HAVE_GDB_BIN),)
> > GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py
> >
> >
>
>
^ permalink raw reply [flat|nested] 46+ messages in thread* Re: [PATCH v1 24/28] tests/tcg/aarch64: add SVE iotcl test
2020-03-17 10:45 ` Aleksandar Markovic
@ 2020-03-17 10:49 ` Peter Maydell
2020-03-17 13:57 ` Alex Bennée
0 siblings, 1 reply; 46+ messages in thread
From: Peter Maydell @ 2020-03-17 10:49 UTC (permalink / raw)
To: Aleksandar Markovic
Cc: Alex Bennée, qemu-arm, Philippe Mathieu-Daudé,
QEMU Developers
On Tue, 17 Mar 2020 at 10:45, Aleksandar Markovic
<aleksandar.qemu.devel@gmail.com> wrote:
> I think it is also a little problematic that tests like this reside
> and belong in tests/tcg - since they deal more with elements
> of kernel interface (system call prctl()), rather than TCG.
> Still, I see there are many other similar cases in tests/tcg,
> so probably (at this moment) one should't bother about it in
> the context of this patch. However, in general, the location
> /tests/tcg for all these cases seems wrong to me.
Well, the only reason we have the test at all is for testing
our TCG emulation. Generic tests of syscalls don't live
in QEMU at all, the best place for those would be the
Linux Test Project's test suite.
thanks
-- PMM
^ permalink raw reply [flat|nested] 46+ messages in thread
* Re: [PATCH v1 24/28] tests/tcg/aarch64: add SVE iotcl test
2020-03-17 10:49 ` Peter Maydell
@ 2020-03-17 13:57 ` Alex Bennée
0 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-17 13:57 UTC (permalink / raw)
To: Peter Maydell
Cc: Aleksandar Markovic, qemu-arm, Philippe Mathieu-Daudé,
QEMU Developers
Peter Maydell <peter.maydell@linaro.org> writes:
> On Tue, 17 Mar 2020 at 10:45, Aleksandar Markovic
> <aleksandar.qemu.devel@gmail.com> wrote:
>> I think it is also a little problematic that tests like this reside
>> and belong in tests/tcg - since they deal more with elements
>> of kernel interface (system call prctl()), rather than TCG.
>> Still, I see there are many other similar cases in tests/tcg,
>> so probably (at this moment) one should't bother about it in
>> the context of this patch. However, in general, the location
>> /tests/tcg for all these cases seems wrong to me.
>
> Well, the only reason we have the test at all is for testing
> our TCG emulation. Generic tests of syscalls don't live
> in QEMU at all, the best place for those would be the
> Linux Test Project's test suite.
Yeah it's all for exercising the TCG. I have run tests/tcg/aaarch64
binaries on real hardware from time to time but it's not the focus of
anything in that directory.
--
Alex Bennée
^ permalink raw reply [flat|nested] 46+ messages in thread
* Re: [PATCH v1 24/28] tests/tcg/aarch64: add SVE iotcl test
2020-03-17 10:29 ` Philippe Mathieu-Daudé
2020-03-17 10:45 ` Aleksandar Markovic
@ 2020-03-17 13:40 ` Aleksandar Markovic
1 sibling, 0 replies; 46+ messages in thread
From: Aleksandar Markovic @ 2020-03-17 13:40 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peter Maydell, qemu-arm, Alex Bennée, qemu-devel
>
> On 3/16/20 6:21 PM, Alex Bennée wrote:
> > This is a fairly bare-bones test of setting the various vector sizes...
The title contains a typo "iotcl" (you meant "ioctl"), but in any case,
as I wrote in another mail, "prctl" is the right choice.
> > for SVE which will only fail if the PR_SVE_SET_VL can't reduce the
> > user-space vector length by powers of 2.
> >
> > However we will also be able to use it in a future test which
> > exercises the GDB stub.
> >
That is interesting. Could you elaborate more on future tests,
I suppose based on GDB, and their integration with this test?
(if not in the commit message, than in the response, right in
this email thread)
Thanks,
Aleksandar
> > Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
^ permalink raw reply [flat|nested] 46+ messages in thread
* [PATCH v1 25/28] tests/tcg/aarch64: add test-sve-ioctl guest-debug test
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (23 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 24/28] tests/tcg/aarch64: add SVE iotcl test Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 26/28] gdbstub: change GDBState.last_packet to GByteArray Alex Bennée
` (3 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, qemu-arm, Alex Bennée
This test exercises the gdbstub while runing the sve-iotcl test. I
haven't plubmed it into make system as we need a way of verifying if
gdb has the right support for SVE.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v4
- interrogate ZCR_EL1 directly as no longer have vg
v5
- plumb in
- skip if fails to connect
v6
- fix for vg
v7
- change to vg size, also better trap failure in zreg access
---
tests/tcg/aarch64/Makefile.target | 11 ++-
tests/tcg/aarch64/gdbstub/test-sve-ioctl.py | 82 +++++++++++++++++++++
2 files changed, 91 insertions(+), 2 deletions(-)
create mode 100644 tests/tcg/aarch64/gdbstub/test-sve-ioctl.py
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index c879932ff6c..d99b2a9eced 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -54,15 +54,22 @@ sve-ioctls: CFLAGS+=-march=armv8.1-a+sve
ifneq ($(HAVE_GDB_BIN),)
GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py
-AARCH64_TESTS += gdbstub-sysregs
+AARCH64_TESTS += gdbstub-sysregs gdbstub-sve-ioctls
-.PHONY: gdbstub-sysregs
+.PHONY: gdbstub-sysregs gdbstub-sve-ioctls
run-gdbstub-sysregs: sysregs
$(call run-test, $@, $(GDB_SCRIPT) \
--gdb $(HAVE_GDB_BIN) \
--qemu $(QEMU) --qargs "$(QEMU_OPTS)" \
--bin $< --test $(AARCH64_SRC)/gdbstub/test-sve.py, \
"basic gdbstub SVE support")
+
+run-gdbstub-sve-ioctls: sve-ioctls
+ $(call run-test, $@, $(GDB_SCRIPT) \
+ --gdb $(HAVE_GDB_BIN) \
+ --qemu $(QEMU) --qargs "$(QEMU_OPTS)" \
+ --bin $< --test $(AARCH64_SRC)/gdbstub/test-sve-ioctl.py, \
+ "basic gdbstub SVE ZLEN support")
endif
endif
diff --git a/tests/tcg/aarch64/gdbstub/test-sve-ioctl.py b/tests/tcg/aarch64/gdbstub/test-sve-ioctl.py
new file mode 100644
index 00000000000..5824abe09ac
--- /dev/null
+++ b/tests/tcg/aarch64/gdbstub/test-sve-ioctl.py
@@ -0,0 +1,82 @@
+from __future__ import print_function
+#
+# Test the SVE ZReg reports the right amount of data. It uses the
+# sve-ioctl test and examines the register data each time the
+# __sve_ld_done breakpoint is hit.
+#
+# This is launched via tests/guest-debug/run-test.py
+#
+
+import gdb
+import sys
+
+initial_vlen = 0
+failcount = 0
+
+def report(cond, msg):
+ "Report success/fail of test"
+ if cond:
+ print ("PASS: %s" % (msg))
+ else:
+ print ("FAIL: %s" % (msg))
+ global failcount
+ failcount += 1
+
+class TestBreakpoint(gdb.Breakpoint):
+ def __init__(self, sym_name="__sve_ld_done"):
+ super(TestBreakpoint, self).__init__(sym_name)
+ # self.sym, ok = gdb.lookup_symbol(sym_name)
+
+ def stop(self):
+ val_i = gdb.parse_and_eval('i')
+ global initial_vlen
+ try:
+ for i in range(0, int(val_i)):
+ val_z = gdb.parse_and_eval("$z0.b.u[%d]" % i)
+ report(int(val_z) == i, "z0.b.u[%d] == %d" % (i, i))
+ for i in range(i + 1, initial_vlen):
+ val_z = gdb.parse_and_eval("$z0.b.u[%d]" % i)
+ report(int(val_z) == 0, "z0.b.u[%d] == 0" % (i))
+ except gdb.error:
+ report(False, "checking zregs (out of range)")
+
+
+def run_test():
+ "Run through the tests one by one"
+
+ print ("Setup breakpoint")
+ bp = TestBreakpoint()
+
+ global initial_vlen
+ vg = gdb.parse_and_eval("$vg")
+ initial_vlen = int(vg) * 8
+
+ gdb.execute("c")
+
+#
+# This runs as the script it sourced (via -x, via run-test.py)
+#
+try:
+ inferior = gdb.selected_inferior()
+ arch = inferior.architecture()
+ report(arch.name() == "aarch64", "connected to aarch64")
+except (gdb.error, AttributeError):
+ print("SKIPPING (not connected)", file=sys.stderr)
+ exit(0)
+
+try:
+ # These are not very useful in scripts
+ gdb.execute("set pagination off")
+ gdb.execute("set confirm off")
+
+ # Run the actual tests
+ run_test()
+except:
+ print ("GDB Exception: %s" % (sys.exc_info()[0]))
+ failcount += 1
+ import code
+ code.InteractiveConsole(locals=globals()).interact()
+ raise
+
+print("All tests complete: %d failures" % failcount)
+exit(failcount)
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 26/28] gdbstub: change GDBState.last_packet to GByteArray
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (24 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 25/28] tests/tcg/aarch64: add test-sve-ioctl guest-debug test Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 27/28] gdbstub: do not split gdb_monitor_write payload Alex Bennée
` (2 subsequent siblings)
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Damien Hedde, Alex Bennée, Richard Henderson, qemu-arm,
Philippe Mathieu-Daudé
From: Damien Hedde <damien.hedde@greensocs.com>
Remove the packet size upper limit by using a GByteArray
instead of a statically allocated array for last_packet.
Thus we can now send big packets.
Also remove the last_packet_len field and use last_packet->len
instead.
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20191211160514.58373-2-damien.hedde@greensocs.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
gdbstub.c | 39 +++++++++++++++++++++------------------
1 file changed, 21 insertions(+), 18 deletions(-)
diff --git a/gdbstub.c b/gdbstub.c
index 0bcfc47a7c5..a60ef5125eb 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -351,8 +351,7 @@ typedef struct GDBState {
int line_buf_index;
int line_sum; /* running checksum */
int line_csum; /* checksum at the end of the packet */
- uint8_t last_packet[MAX_PACKET_LENGTH + 4];
- int last_packet_len;
+ GByteArray *last_packet;
int signal;
#ifdef CONFIG_USER_ONLY
int fd;
@@ -384,6 +383,7 @@ static void init_gdbserver_state(void)
gdbserver_state.init = true;
gdbserver_state.str_buf = g_string_new(NULL);
gdbserver_state.mem_buf = g_byte_array_sized_new(MAX_PACKET_LENGTH);
+ gdbserver_state.last_packet = g_byte_array_sized_new(MAX_PACKET_LENGTH + 4);
}
#ifndef CONFIG_USER_ONLY
@@ -626,28 +626,29 @@ static void hexdump(const char *buf, int len,
static int put_packet_binary(const char *buf, int len, bool dump)
{
int csum, i;
- uint8_t *p;
- uint8_t *ps = &gdbserver_state.last_packet[0];
+ uint8_t footer[3];
if (dump && trace_event_get_state_backends(TRACE_GDBSTUB_IO_BINARYREPLY)) {
hexdump(buf, len, trace_gdbstub_io_binaryreply);
}
for(;;) {
- p = ps;
- *(p++) = '$';
- memcpy(p, buf, len);
- p += len;
+ g_byte_array_set_size(gdbserver_state.last_packet, 0);
+ g_byte_array_append(gdbserver_state.last_packet,
+ (const uint8_t *) "$", 1);
+ g_byte_array_append(gdbserver_state.last_packet,
+ (const uint8_t *) buf, len);
csum = 0;
for(i = 0; i < len; i++) {
csum += buf[i];
}
- *(p++) = '#';
- *(p++) = tohex((csum >> 4) & 0xf);
- *(p++) = tohex((csum) & 0xf);
+ footer[0] = '#';
+ footer[1] = tohex((csum >> 4) & 0xf);
+ footer[2] = tohex((csum) & 0xf);
+ g_byte_array_append(gdbserver_state.last_packet, footer, 3);
- gdbserver_state.last_packet_len = p - ps;
- put_buffer(ps, gdbserver_state.last_packet_len);
+ put_buffer(gdbserver_state.last_packet->data,
+ gdbserver_state.last_packet->len);
#ifdef CONFIG_USER_ONLY
i = get_char();
@@ -2812,20 +2813,22 @@ static void gdb_read_byte(uint8_t ch)
uint8_t reply;
#ifndef CONFIG_USER_ONLY
- if (gdbserver_state.last_packet_len) {
+ if (gdbserver_state.last_packet->len) {
/* Waiting for a response to the last packet. If we see the start
of a new command then abandon the previous response. */
if (ch == '-') {
trace_gdbstub_err_got_nack();
- put_buffer((uint8_t *)gdbserver_state.last_packet, gdbserver_state.last_packet_len);
+ put_buffer(gdbserver_state.last_packet->data,
+ gdbserver_state.last_packet->len);
} else if (ch == '+') {
trace_gdbstub_io_got_ack();
} else {
trace_gdbstub_io_got_unexpected(ch);
}
- if (ch == '+' || ch == '$')
- gdbserver_state.last_packet_len = 0;
+ if (ch == '+' || ch == '$') {
+ g_byte_array_set_size(gdbserver_state.last_packet, 0);
+ }
if (ch != '$')
return;
}
@@ -3209,7 +3212,7 @@ static int gdb_monitor_write(Chardev *chr, const uint8_t *buf, int len)
const char *p = (const char *)buf;
int max_sz;
- max_sz = (sizeof(gdbserver_state.last_packet) - 2) / 2;
+ max_sz = (MAX_PACKET_LENGTH / 2) + 1;
for (;;) {
if (len <= max_sz) {
gdb_monitor_output(p, len);
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 27/28] gdbstub: do not split gdb_monitor_write payload
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (25 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 26/28] gdbstub: change GDBState.last_packet to GByteArray Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 17:21 ` [PATCH v1 28/28] gdbstub: Fix single-step issue by confirming 'vContSupported+' feature to gdb Alex Bennée
2020-03-16 21:26 ` [PATCH v1 00/28 for 5.0] testing and gdbstub no-reply
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Damien Hedde, Philippe Mathieu-Daudé, Richard Henderson,
qemu-arm, Alex Bennée, Luc Michel
From: Damien Hedde <damien.hedde@greensocs.com>
Since we can now send packets of arbitrary length:
simplify gdb_monitor_write() and send the whole payload
in one packet.
Suggested-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20191211160514.58373-3-damien.hedde@greensocs.com>
---
gdbstub.c | 23 +++--------------------
1 file changed, 3 insertions(+), 20 deletions(-)
diff --git a/gdbstub.c b/gdbstub.c
index a60ef5125eb..9ae148cd1ff 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -3200,28 +3200,11 @@ static void gdb_chr_event(void *opaque, QEMUChrEvent event)
}
}
-static void gdb_monitor_output(const char *msg, int len)
-{
- g_autoptr(GString) buf = g_string_new("O");
- memtohex(buf, (uint8_t *)msg, len);
- put_packet(buf->str);
-}
-
static int gdb_monitor_write(Chardev *chr, const uint8_t *buf, int len)
{
- const char *p = (const char *)buf;
- int max_sz;
-
- max_sz = (MAX_PACKET_LENGTH / 2) + 1;
- for (;;) {
- if (len <= max_sz) {
- gdb_monitor_output(p, len);
- break;
- }
- gdb_monitor_output(p, max_sz);
- p += max_sz;
- len -= max_sz;
- }
+ g_autoptr(GString) hex_buf = g_string_new("O");
+ memtohex(hex_buf, buf, len);
+ put_packet(hex_buf->str);
return len;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* [PATCH v1 28/28] gdbstub: Fix single-step issue by confirming 'vContSupported+' feature to gdb
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (26 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 27/28] gdbstub: do not split gdb_monitor_write payload Alex Bennée
@ 2020-03-16 17:21 ` Alex Bennée
2020-03-16 21:26 ` [PATCH v1 00/28 for 5.0] testing and gdbstub no-reply
28 siblings, 0 replies; 46+ messages in thread
From: Alex Bennée @ 2020-03-16 17:21 UTC (permalink / raw)
To: qemu-devel
Cc: Alex Bennée, qemu-arm, Philippe Mathieu-Daudé,
Luc Michel, Changbin Du
From: Changbin Du <changbin.du@gmail.com>
Recently when debugging an arm32 system on qemu, I found sometimes the
single-step command (stepi) is not working. This can be reproduced by
below steps:
1) start qemu-system-arm -s -S .. and wait for gdb connection.
2) start gdb and connect to qemu. In my case, gdb gets a wrong value
(0x60) for PC, which is an another bug.
3) After connected, type 'stepi' and expect it will stop at next ins.
But, it has never stopped. This because:
1) We doesn't report ‘vContSupported’ feature to gdb explicitly and gdb
think we do not support it. In this case, gdb use a software breakpoint
to emulate single-step.
2) Since gdb gets a wrong initial value of PC, then gdb inserts a
breakpoint to wrong place (PC+4).
Not only for the arm target, Philippe has also encountered this on MIPS.
Probably gdb has different assumption for different architectures.
Since we do support ‘vContSupported’ query command, so let's tell gdb that
we support it.
Before this change, gdb send below 'Z0' packet to implement single-step:
gdb_handle_packet: Z0,4,4
After this change, gdb send "vCont;s.." which is expected:
gdb_handle_packet: vCont?
put_packet: vCont;c;C;s;S
gdb_handle_packet: vCont;s:p1.1;c:p1.-1
Signed-off-by: Changbin Du <changbin.du@gmail.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200221002559.6768-1-changbin.du@gmail.com>
[AJB: fix for static gdbstub]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
---
gdbstub.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gdbstub.c b/gdbstub.c
index 9ae148cd1ff..013fb1ac0f1 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -2130,7 +2130,7 @@ static void handle_query_supported(GdbCmdContext *gdb_ctx, void *user_ctx)
gdbserver_state.multiprocess = true;
}
- g_string_append(gdbserver_state.str_buf, ";multiprocess+");
+ g_string_append(gdbserver_state.str_buf, ";vContSupported+;multiprocess+");
put_strbuf();
}
--
2.20.1
^ permalink raw reply related [flat|nested] 46+ messages in thread* Re: [PATCH v1 00/28 for 5.0] testing and gdbstub
2020-03-16 17:21 [PATCH v1 00/28 for 5.0] testing and gdbstub Alex Bennée
` (27 preceding siblings ...)
2020-03-16 17:21 ` [PATCH v1 28/28] gdbstub: Fix single-step issue by confirming 'vContSupported+' feature to gdb Alex Bennée
@ 2020-03-16 21:26 ` no-reply
28 siblings, 0 replies; 46+ messages in thread
From: no-reply @ 2020-03-16 21:26 UTC (permalink / raw)
To: alex.bennee; +Cc: qemu-arm, alex.bennee, qemu-devel
Patchew URL: https://patchew.org/QEMU/20200316172155.971-1-alex.bennee@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH v1 00/28 for 5.0] testing and gdbstub
Message-id: 20200316172155.971-1-alex.bennee@linaro.org
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Switched to a new branch 'test'
e0524af gdbstub: Fix single-step issue by confirming 'vContSupported+' feature to gdb
e656163 gdbstub: do not split gdb_monitor_write payload
df8fd6f gdbstub: change GDBState.last_packet to GByteArray
95b6603 tests/tcg/aarch64: add test-sve-ioctl guest-debug test
c851ffe tests/tcg/aarch64: add SVE iotcl test
adc04ec tests/tcg/aarch64: add a gdbstub testcase for SVE registers
9601aa2 tests/guest-debug: add a simple test runner
7a2de8f configure: allow user to specify what gdb to use
d72d9b9 tests/tcg/aarch64: userspace system register test
d976fc7 target/arm: don't bother with id_aa64pfr0_read for USER_ONLY
493033c target/arm: generate xml description of our SVE registers
814a89b target/arm: default SVE length to 64 bytes for linux-user
b9f7216 target/arm: explicitly encode regnum in our XML
22d0e66 target/arm: prepare for multiple dynamic XMLs
63558ba gdbstub: extend GByteArray to read register helpers
f9304f8 target/i386: use gdb_get_reg helpers
adc03bd target/m68k: use gdb_get_reg helpers
e699c51 target/arm: use gdb_get_reg helpers
a14c7b1 gdbstub: add helper for 128 bit registers
19705a5 gdbstub: move mem_buf to GDBState and use GByteArray
6363732 gdbstub: move str_buf to GDBState and use GString
8a37f68 gdbstub: stop passing GDBState * around and use global
4c9afc0 gdbstub: make GDBState static and have common init function
8fe1b7d travis.yml: Set G_MESSAGES_DEBUG do report GLib errors
4bb9eee tests/docker: Update VirGL to v0.8.0
a416989 tests/docker: Remove obsolete VirGL --with-glx configure option
3da6470 tests/docker: Update VirGL git repository URL
efb4377 tests/docker: Install tools to cross-debug and build Linux kernels
=== OUTPUT BEGIN ===
1/28 Checking commit efb4377dce97 (tests/docker: Install tools to cross-debug and build Linux kernels)
2/28 Checking commit 3da64700cb80 (tests/docker: Update VirGL git repository URL)
3/28 Checking commit a4169891e970 (tests/docker: Remove obsolete VirGL --with-glx configure option)
4/28 Checking commit 4bb9eee827e6 (tests/docker: Update VirGL to v0.8.0)
5/28 Checking commit 8fe1b7d3f9a2 (travis.yml: Set G_MESSAGES_DEBUG do report GLib errors)
6/28 Checking commit 4c9afc0c7180 (gdbstub: make GDBState static and have common init function)
ERROR: braces {} are necessary for all arms of this statement
#128: FILE: gdbstub.c:2743:
+ if (!gdbserver_state.init)
[...]
ERROR: suspect code indent for conditional statements (2, 6)
#178: FILE: gdbstub.c:2962:
+ if (!gdbserver_state.init) {
return;
ERROR: suspect code indent for conditional statements (2, 6)
#183: FILE: gdbstub.c:2966:
+ if (gdbserver_fd < 0 || gdbserver_state.fd < 0) {
return;
total: 3 errors, 0 warnings, 384 lines checked
Patch 6/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/28 Checking commit 8a37f68bbf8a (gdbstub: stop passing GDBState * around and use global)
WARNING: line over 80 characters
#756: FILE: gdbstub.c:1762:
+ if (target_memory_rw_debug(gdbserver_state.g_cpu, gdb_ctx->params[0].val_ull,
WARNING: line over 80 characters
#784: FILE: gdbstub.c:1785:
+ if (target_memory_rw_debug(gdbserver_state.g_cpu, gdb_ctx->params[0].val_ull,
WARNING: line over 80 characters
#1011: FILE: gdbstub.c:2022:
+ gdbserver_state.query_cpu = gdb_next_attached_cpu(gdbserver_state.query_cpu);
ERROR: line over 90 characters
#1372: FILE: gdbstub.c:2817:
+ put_buffer((uint8_t *)gdbserver_state.last_packet, gdbserver_state.last_packet_len);
ERROR: space required before the open parenthesis '('
#1390: FILE: gdbstub.c:2836:
+ switch(gdbserver_state.state) {
ERROR: line over 90 characters
#1422: FILE: gdbstub.c:2859:
+ } else if (gdbserver_state.line_buf_index >= sizeof(gdbserver_state.line_buf) - 1) {
ERROR: line over 90 characters
#1440: FILE: gdbstub.c:2872:
+ } else if (gdbserver_state.line_buf_index >= sizeof(gdbserver_state.line_buf) - 1) {
WARNING: line over 80 characters
#1450: FILE: gdbstub.c:2878:
+ gdbserver_state.line_buf[gdbserver_state.line_buf_index++] = ch ^ 0x20;
ERROR: line over 90 characters
#1466: FILE: gdbstub.c:2895:
+ if (gdbserver_state.line_buf_index + repeat >= sizeof(gdbserver_state.line_buf) - 1) {
WARNING: line over 80 characters
#1484: FILE: gdbstub.c:2905:
+ memset(gdbserver_state.line_buf + gdbserver_state.line_buf_index,
ERROR: line over 90 characters
#1485: FILE: gdbstub.c:2906:
+ gdbserver_state.line_buf[gdbserver_state.line_buf_index - 1], repeat);
WARNING: line over 80 characters
#1520: FILE: gdbstub.c:2933:
+ if (gdbserver_state.line_csum != (gdbserver_state.line_sum & 0xff)) {
ERROR: line over 90 characters
#1521: FILE: gdbstub.c:2934:
+ trace_gdbstub_err_checksum_incorrect(gdbserver_state.line_sum, gdbserver_state.line_csum);
WARNING: line over 80 characters
#1534: FILE: gdbstub.c:2943:
+ gdbserver_state.state = gdb_handle_packet(gdbserver_state.line_buf);
ERROR: line over 90 characters
#1649: FILE: gdbstub.c:3305:
+ qsort(gdbserver_state.processes, gdbserver_state.process_num, sizeof(gdbserver_state.processes[0]), pid_order);
total: 8 errors, 7 warnings, 1553 lines checked
Patch 7/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
8/28 Checking commit 6363732dc5c8 (gdbstub: move str_buf to GDBState and use GString)
WARNING: line over 80 characters
#150: FILE: gdbstub.c:1794:
+ memtohex(gdbserver_state.str_buf, gdb_ctx->mem_buf, gdb_ctx->params[1].val_ull);
WARNING: line over 80 characters
#323: FILE: gdbstub.c:2107:
+ g_string_printf(gdbserver_state.str_buf, "PacketSize=%x", MAX_PACKET_LENGTH);
total: 0 errors, 2 warnings, 422 lines checked
Patch 8/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
9/28 Checking commit 19705a523de4 (gdbstub: move mem_buf to GDBState and use GByteArray)
10/28 Checking commit a14c7b1ee74c (gdbstub: add helper for 128 bit registers)
11/28 Checking commit e699c51289c7 (target/arm: use gdb_get_reg helpers)
ERROR: space required after that ',' (ctx:VxV)
#45: FILE: target/arm/helper.c:119:
+ return gdb_get_reg32(buf,vfp_get_fpcr(env));
^
total: 1 errors, 0 warnings, 28 lines checked
Patch 11/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/28 Checking commit adc03bd59ded (target/m68k: use gdb_get_reg helpers)
13/28 Checking commit f9304f8e2d1e (target/i386: use gdb_get_reg helpers)
ERROR: space prohibited after that '*' (ctx:BxW)
#62: FILE: target/i386/gdbstub.c:290:
+ fp->low = le64_to_cpu(* (uint64_t *) mem_buf);
^
ERROR: space prohibited after that '*' (ctx:BxW)
#63: FILE: target/i386/gdbstub.c:291:
+ fp->high = le16_to_cpu(* (uint16_t *) (mem_buf + 8));
^
total: 2 errors, 0 warnings, 47 lines checked
Patch 13/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
14/28 Checking commit 63558bae2227 (gdbstub: extend GByteArray to read register helpers)
ERROR: "foo * bar" should be "foo *bar"
#198: FILE: include/exec/gdbstub.h:136:
+static inline uint8_t * gdb_get_reg_ptr(GByteArray *buf, int len)
total: 1 errors, 0 warnings, 918 lines checked
Patch 14/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/28 Checking commit 22d0e66f578e (target/arm: prepare for multiple dynamic XMLs)
ERROR: line over 90 characters
#128: FILE: target/arm/gdbstub.c:159:
+ cpu->dyn_sysreg_xml.data.cpregs.keys = g_new(uint32_t, g_hash_table_size(cpu->cp_regs));
total: 1 errors, 0 warnings, 136 lines checked
Patch 15/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
16/28 Checking commit b9f72163ab90 (target/arm: explicitly encode regnum in our XML)
17/28 Checking commit 814a89b3a60c (target/arm: default SVE length to 64 bytes for linux-user)
18/28 Checking commit 493033cef70a (target/arm: generate xml description of our SVE registers)
WARNING: line over 80 characters
#108: FILE: target/arm/gdbstub.c:233:
+ g_string_append_printf(s, "<field name=\"%c\" type=\"vq%d%c%c\"/>",
WARNING: line over 80 characters
#329: FILE: target/arm/helper.c:8074:
+ arm_gen_dynamic_svereg_xml(cs, cs->gdb_num_regs),
total: 0 errors, 2 warnings, 316 lines checked
Patch 18/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
19/28 Checking commit d976fc7378bf (target/arm: don't bother with id_aa64pfr0_read for USER_ONLY)
20/28 Checking commit d72d9b9a4f21 (tests/tcg/aarch64: userspace system register test)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#33:
new file mode 100644
ERROR: space required after that ',' (ctx:VxV)
#152: FILE: tests/tcg/aarch64/sysregs.c:115:
+ get_cpu_reg_check_mask(id_aa64isar0_el1, _m(00ff,ffff,f0ff,fff0));
^
ERROR: space required after that ',' (ctx:VxV)
#152: FILE: tests/tcg/aarch64/sysregs.c:115:
+ get_cpu_reg_check_mask(id_aa64isar0_el1, _m(00ff,ffff,f0ff,fff0));
^
ERROR: space required after that ',' (ctx:VxV)
#152: FILE: tests/tcg/aarch64/sysregs.c:115:
+ get_cpu_reg_check_mask(id_aa64isar0_el1, _m(00ff,ffff,f0ff,fff0));
^
ERROR: space required after that ',' (ctx:VxV)
#153: FILE: tests/tcg/aarch64/sysregs.c:116:
+ get_cpu_reg_check_mask(id_aa64isar1_el1, _m(0000,00f0,ffff,ffff));
^
ERROR: space required after that ',' (ctx:VxV)
#153: FILE: tests/tcg/aarch64/sysregs.c:116:
+ get_cpu_reg_check_mask(id_aa64isar1_el1, _m(0000,00f0,ffff,ffff));
^
ERROR: space required after that ',' (ctx:VxV)
#153: FILE: tests/tcg/aarch64/sysregs.c:116:
+ get_cpu_reg_check_mask(id_aa64isar1_el1, _m(0000,00f0,ffff,ffff));
^
ERROR: space required after that ',' (ctx:VxV)
#155: FILE: tests/tcg/aarch64/sysregs.c:118:
+ get_cpu_reg_check_mask(id_aa64mmfr0_el1, _m(0000,0000,ff00,0000));
^
ERROR: space required after that ',' (ctx:VxV)
#155: FILE: tests/tcg/aarch64/sysregs.c:118:
+ get_cpu_reg_check_mask(id_aa64mmfr0_el1, _m(0000,0000,ff00,0000));
^
ERROR: space required after that ',' (ctx:VxV)
#155: FILE: tests/tcg/aarch64/sysregs.c:118:
+ get_cpu_reg_check_mask(id_aa64mmfr0_el1, _m(0000,0000,ff00,0000));
^
ERROR: space required after that ',' (ctx:VxV)
#158: FILE: tests/tcg/aarch64/sysregs.c:121:
+ get_cpu_reg_check_mask(id_aa64pfr0_el1, _m(000f,000f,00ff,0011));
^
ERROR: space required after that ',' (ctx:VxV)
#158: FILE: tests/tcg/aarch64/sysregs.c:121:
+ get_cpu_reg_check_mask(id_aa64pfr0_el1, _m(000f,000f,00ff,0011));
^
ERROR: space required after that ',' (ctx:VxV)
#158: FILE: tests/tcg/aarch64/sysregs.c:121:
+ get_cpu_reg_check_mask(id_aa64pfr0_el1, _m(000f,000f,00ff,0011));
^
ERROR: space required after that ',' (ctx:VxV)
#159: FILE: tests/tcg/aarch64/sysregs.c:122:
+ get_cpu_reg_check_mask(id_aa64pfr1_el1, _m(0000,0000,0000,00f0));
^
ERROR: space required after that ',' (ctx:VxV)
#159: FILE: tests/tcg/aarch64/sysregs.c:122:
+ get_cpu_reg_check_mask(id_aa64pfr1_el1, _m(0000,0000,0000,00f0));
^
ERROR: space required after that ',' (ctx:VxV)
#159: FILE: tests/tcg/aarch64/sysregs.c:122:
+ get_cpu_reg_check_mask(id_aa64pfr1_el1, _m(0000,0000,0000,00f0));
^
ERROR: space required after that ',' (ctx:VxV)
#161: FILE: tests/tcg/aarch64/sysregs.c:124:
+ get_cpu_reg_check_mask(id_aa64dfr0_el1, _m(0000,0000,0000,0006));
^
ERROR: space required after that ',' (ctx:VxV)
#161: FILE: tests/tcg/aarch64/sysregs.c:124:
+ get_cpu_reg_check_mask(id_aa64dfr0_el1, _m(0000,0000,0000,0006));
^
ERROR: space required after that ',' (ctx:VxV)
#161: FILE: tests/tcg/aarch64/sysregs.c:124:
+ get_cpu_reg_check_mask(id_aa64dfr0_el1, _m(0000,0000,0000,0006));
^
ERROR: space required after that ',' (ctx:VxV)
#168: FILE: tests/tcg/aarch64/sysregs.c:131:
+ get_cpu_reg_check_mask(midr_el1, _m(0000,0000,ffff,ffff));
^
ERROR: space required after that ',' (ctx:VxV)
#168: FILE: tests/tcg/aarch64/sysregs.c:131:
+ get_cpu_reg_check_mask(midr_el1, _m(0000,0000,ffff,ffff));
^
ERROR: space required after that ',' (ctx:VxV)
#168: FILE: tests/tcg/aarch64/sysregs.c:131:
+ get_cpu_reg_check_mask(midr_el1, _m(0000,0000,ffff,ffff));
^
ERROR: space required after that ',' (ctx:VxV)
#170: FILE: tests/tcg/aarch64/sysregs.c:133:
+ get_cpu_reg_check_mask(mpidr_el1, _m(0000,0000,8000,0000));
^
ERROR: space required after that ',' (ctx:VxV)
#170: FILE: tests/tcg/aarch64/sysregs.c:133:
+ get_cpu_reg_check_mask(mpidr_el1, _m(0000,0000,8000,0000));
^
ERROR: space required after that ',' (ctx:VxV)
#170: FILE: tests/tcg/aarch64/sysregs.c:133:
+ get_cpu_reg_check_mask(mpidr_el1, _m(0000,0000,8000,0000));
^
total: 24 errors, 1 warnings, 182 lines checked
Patch 20/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
21/28 Checking commit 7a2de8fb5f2d (configure: allow user to specify what gdb to use)
22/28 Checking commit 9601aa27ce94 (tests/guest-debug: add a simple test runner)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#16:
new file mode 100755
ERROR: line over 90 characters
#73: FILE: tests/guest-debug/run-test.py:53:
+ gdb_cmd = "%s %s -ex 'target remote localhost:1234' -x %s" % (args.gdb, args.binary, args.test)
total: 1 errors, 1 warnings, 57 lines checked
Patch 22/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
23/28 Checking commit adc04ecd2aec (tests/tcg/aarch64: add a gdbstub testcase for SVE registers)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54:
new file mode 100644
total: 0 errors, 1 warnings, 109 lines checked
Patch 23/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
24/28 Checking commit c851ffe4b294 (tests/tcg/aarch64: add SVE iotcl test)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34:
new file mode 100644
total: 0 errors, 1 warnings, 80 lines checked
Patch 24/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
25/28 Checking commit 95b6603a4ba2 (tests/tcg/aarch64: add test-sve-ioctl guest-debug test)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#45:
new file mode 100644
total: 0 errors, 1 warnings, 106 lines checked
Patch 25/28 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
26/28 Checking commit df8fd6fdbd42 (gdbstub: change GDBState.last_packet to GByteArray)
27/28 Checking commit e656163622cb (gdbstub: do not split gdb_monitor_write payload)
28/28 Checking commit e0524af2bb5a (gdbstub: Fix single-step issue by confirming 'vContSupported+' feature to gdb)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20200316172155.971-1-alex.bennee@linaro.org/testing.checkpatch/?type=message.
---
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