From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH] target/arm: Remove obsolete TODO note from get_phys_addr_lpae()
Date: Tue, 31 Mar 2020 15:34:07 +0100 [thread overview]
Message-ID: <20200331143407.3186-1-peter.maydell@linaro.org> (raw)
An old comment in get_phys_addr_lpae() claims that the code does not
support the different format TCR for VTCR_EL2. This used to be true
but it is not true now (in particular the aa64_va_parameters() and
aa32_va_parameters() functions correctly handle the different
register format by checking whether the mmu_idx is Stage2).
Remove the out of date parts of the comment.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
Randomly noticed this out of date comment while I was stepping
through the code this afternoon...
target/arm/helper.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index cba8ac57983..27059045842 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -10714,12 +10714,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
bool aarch64 = arm_el_is_aa64(env, el);
bool guarded = false;
- /* TODO:
- * This code does not handle the different format TCR for VTCR_EL2.
- * This code also does not support shareability levels.
- * Attribute and permission bit handling should also be checked when adding
- * support for those page table walks.
- */
+ /* TODO: This code does not support shareability levels. */
if (aarch64) {
param = aa64_va_parameters(env, address, mmu_idx,
access_type != MMU_INST_FETCH);
--
2.20.1
next reply other threads:[~2020-03-31 14:36 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-31 14:34 Peter Maydell [this message]
2020-03-31 16:06 ` [PATCH] target/arm: Remove obsolete TODO note from get_phys_addr_lpae() Richard Henderson
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