From: Peter Xu <peterx@redhat.com>
To: Liu Yi L <yi.l.liu@intel.com>
Cc: jean-philippe@linaro.org, kevin.tian@intel.com,
Jacob Pan <jacob.jun.pan@linux.intel.com>,
Yi Sun <yi.y.sun@linux.intel.com>,
kvm@vger.kernel.org, mst@redhat.com, jun.j.tian@intel.com,
qemu-devel@nongnu.org, eric.auger@redhat.com,
alex.williamson@redhat.com, pbonzini@redhat.com,
hao.wu@intel.com, yi.y.sun@intel.com,
Richard Henderson <rth@twiddle.net>,
david@gibson.dropbear.id.au
Subject: Re: [PATCH v2 15/22] intel_iommu: bind/unbind guest page table to host
Date: Thu, 2 Apr 2020 14:09:20 -0400 [thread overview]
Message-ID: <20200402180920.GD103677@xz-x1> (raw)
In-Reply-To: <1585542301-84087-16-git-send-email-yi.l.liu@intel.com>
On Sun, Mar 29, 2020 at 09:24:54PM -0700, Liu Yi L wrote:
> +static int vtd_bind_guest_pasid(IntelIOMMUState *s, VTDBus *vtd_bus,
> + int devfn, int pasid, VTDPASIDEntry *pe,
> + VTDPASIDOp op)
> +{
> + VTDHostIOMMUContext *vtd_dev_icx;
> + HostIOMMUContext *iommu_ctx;
> + DualIOMMUStage1BindData *bind_data;
> + struct iommu_gpasid_bind_data *g_bind_data;
> + int ret = -1;
> +
> + vtd_dev_icx = vtd_bus->dev_icx[devfn];
> + if (!vtd_dev_icx) {
> + /* means no need to go further, e.g. for emulated devices */
> + return 0;
> + }
> +
> + iommu_ctx = vtd_dev_icx->iommu_ctx;
> + if (!iommu_ctx) {
> + return -EINVAL;
> + }
> +
> + if (!(iommu_ctx->stage1_formats
> + & IOMMU_PASID_FORMAT_INTEL_VTD)) {
> + error_report_once("IOMMU Stage 1 format is not compatible!\n");
> + return -EINVAL;
> + }
> +
> + bind_data = g_malloc0(sizeof(*bind_data));
> + bind_data->pasid = pasid;
> + g_bind_data = &bind_data->bind_data.gpasid_bind;
> +
> + g_bind_data->flags = 0;
> + g_bind_data->vtd.flags = 0;
> + switch (op) {
> + case VTD_PASID_BIND:
> + g_bind_data->version = IOMMU_UAPI_VERSION;
> + g_bind_data->format = IOMMU_PASID_FORMAT_INTEL_VTD;
> + g_bind_data->gpgd = vtd_pe_get_flpt_base(pe);
> + g_bind_data->addr_width = vtd_pe_get_fl_aw(pe);
> + g_bind_data->hpasid = pasid;
> + g_bind_data->gpasid = pasid;
> + g_bind_data->flags |= IOMMU_SVA_GPASID_VAL;
> + g_bind_data->vtd.flags =
> + (VTD_SM_PASID_ENTRY_SRE_BIT(pe->val[2]) ? 1 : 0)
This evaluates to 1 if VTD_SM_PASID_ENTRY_SRE_BIT(pe->val[2]), or 0.
Do you want to use IOMMU_SVA_VTD_GPASID_SRE instead of 1? Same
question to all the rest.
> + | (VTD_SM_PASID_ENTRY_EAFE_BIT(pe->val[2]) ? 1 : 0)
> + | (VTD_SM_PASID_ENTRY_PCD_BIT(pe->val[1]) ? 1 : 0)
> + | (VTD_SM_PASID_ENTRY_PWT_BIT(pe->val[1]) ? 1 : 0)
> + | (VTD_SM_PASID_ENTRY_EMTE_BIT(pe->val[1]) ? 1 : 0)
> + | (VTD_SM_PASID_ENTRY_CD_BIT(pe->val[1]) ? 1 : 0);
> + g_bind_data->vtd.pat = VTD_SM_PASID_ENTRY_PAT(pe->val[1]);
> + g_bind_data->vtd.emt = VTD_SM_PASID_ENTRY_EMT(pe->val[1]);
> + ret = host_iommu_ctx_bind_stage1_pgtbl(iommu_ctx, bind_data);
> + break;
> + case VTD_PASID_UNBIND:
> + g_bind_data->version = IOMMU_UAPI_VERSION;
> + g_bind_data->format = IOMMU_PASID_FORMAT_INTEL_VTD;
> + g_bind_data->gpgd = 0;
> + g_bind_data->addr_width = 0;
> + g_bind_data->hpasid = pasid;
> + g_bind_data->gpasid = pasid;
> + g_bind_data->flags |= IOMMU_SVA_GPASID_VAL;
> + ret = host_iommu_ctx_unbind_stage1_pgtbl(iommu_ctx, bind_data);
> + break;
> + default:
> + error_report_once("Unknown VTDPASIDOp!!!\n");
> + break;
> + }
> +
> + g_free(bind_data);
> +
> + return ret;
> +}
--
Peter Xu
next prev parent reply other threads:[~2020-04-02 18:10 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-30 4:24 [PATCH v2 00/22] intel_iommu: expose Shared Virtual Addressing to VMs Liu Yi L
2020-03-30 4:24 ` [PATCH v2 01/22] scripts/update-linux-headers: Import iommu.h Liu Yi L
2020-03-30 4:24 ` [PATCH v2 02/22] header file update VFIO/IOMMU vSVA APIs Liu Yi L
2020-03-30 4:24 ` [PATCH v2 03/22] vfio: check VFIO_TYPE1_NESTING_IOMMU support Liu Yi L
2020-03-30 9:36 ` Auger Eric
2020-03-31 6:08 ` Liu, Yi L
2020-03-30 4:24 ` [PATCH v2 04/22] hw/iommu: introduce HostIOMMUContext Liu Yi L
2020-03-30 17:22 ` Auger Eric
2020-03-31 4:10 ` Liu, Yi L
2020-03-31 7:47 ` Auger Eric
2020-03-31 12:43 ` Liu, Yi L
2020-04-06 8:04 ` Liu, Yi L
2020-04-06 10:30 ` Auger Eric
2020-03-30 4:24 ` [PATCH v2 05/22] hw/pci: modify pci_setup_iommu() to set PCIIOMMUOps Liu Yi L
2020-03-30 11:02 ` Auger Eric
2020-04-02 8:52 ` Liu, Yi L
2020-04-02 12:41 ` Auger Eric
2020-04-02 13:37 ` Liu, Yi L
2020-04-02 13:49 ` Auger Eric
2020-04-06 6:27 ` Liu, Yi L
2020-04-06 10:04 ` Auger Eric
2020-03-30 4:24 ` [PATCH v2 06/22] hw/pci: introduce pci_device_set/unset_iommu_context() Liu Yi L
2020-03-30 17:30 ` Auger Eric
2020-03-31 12:14 ` Liu, Yi L
2020-03-30 4:24 ` [PATCH v2 07/22] intel_iommu: add set/unset_iommu_context callback Liu Yi L
2020-03-30 20:23 ` Auger Eric
2020-03-31 12:25 ` Liu, Yi L
2020-03-31 12:57 ` Auger Eric
2020-03-30 4:24 ` [PATCH v2 08/22] vfio/common: provide PASID alloc/free hooks Liu Yi L
2020-03-31 10:47 ` Auger Eric
2020-03-31 10:59 ` Liu, Yi L
2020-03-31 11:15 ` Auger Eric
2020-03-31 12:54 ` Liu, Yi L
2020-03-30 4:24 ` [PATCH v2 09/22] vfio/common: init HostIOMMUContext per-container Liu Yi L
2020-04-01 7:50 ` Auger Eric
2020-04-06 7:12 ` Liu, Yi L
2020-04-06 10:20 ` Auger Eric
2020-04-07 11:59 ` Liu, Yi L
2020-03-30 4:24 ` [PATCH v2 10/22] vfio/pci: set host iommu context to vIOMMU Liu Yi L
2020-03-31 14:30 ` Auger Eric
2020-04-01 3:20 ` Liu, Yi L
2020-03-30 4:24 ` [PATCH v2 11/22] intel_iommu: add virtual command capability support Liu Yi L
2020-03-30 4:24 ` [PATCH v2 12/22] intel_iommu: process PASID cache invalidation Liu Yi L
2020-03-30 4:24 ` [PATCH v2 13/22] intel_iommu: add PASID cache management infrastructure Liu Yi L
2020-04-02 0:02 ` Peter Xu
2020-04-02 6:46 ` Liu, Yi L
2020-04-02 13:44 ` Peter Xu
2020-04-03 15:05 ` Liu, Yi L
2020-04-03 16:19 ` Peter Xu
2020-04-04 11:39 ` Liu, Yi L
2020-03-30 4:24 ` [PATCH v2 14/22] vfio: add bind stage-1 page table support Liu Yi L
2020-03-30 4:24 ` [PATCH v2 15/22] intel_iommu: bind/unbind guest page table to host Liu Yi L
2020-04-02 18:09 ` Peter Xu [this message]
2020-04-03 14:29 ` Liu, Yi L
2020-03-30 4:24 ` [PATCH v2 16/22] intel_iommu: replay pasid binds after context cache invalidation Liu Yi L
2020-04-03 14:45 ` Peter Xu
2020-04-03 15:21 ` Liu, Yi L
2020-04-03 16:11 ` Peter Xu
2020-04-04 12:00 ` Liu, Yi L
2020-04-06 19:48 ` Peter Xu
2020-03-30 4:24 ` [PATCH v2 17/22] intel_iommu: do not pass down pasid bind for PASID #0 Liu Yi L
2020-03-30 4:24 ` [PATCH v2 18/22] vfio: add support for flush iommu stage-1 cache Liu Yi L
2020-03-30 4:24 ` [PATCH v2 19/22] intel_iommu: process PASID-based iotlb invalidation Liu Yi L
2020-04-03 14:47 ` Peter Xu
2020-04-03 15:21 ` Liu, Yi L
2020-03-30 4:24 ` [PATCH v2 20/22] intel_iommu: propagate PASID-based iotlb invalidation to host Liu Yi L
2020-03-30 4:25 ` [PATCH v2 21/22] intel_iommu: process PASID-based Device-TLB invalidation Liu Yi L
2020-03-30 4:25 ` [PATCH v2 22/22] intel_iommu: modify x-scalable-mode to be string option Liu Yi L
2020-04-03 14:49 ` Peter Xu
2020-04-03 15:22 ` Liu, Yi L
2020-03-30 5:40 ` [PATCH v2 00/22] intel_iommu: expose Shared Virtual Addressing to VMs no-reply
2020-03-30 10:36 ` Auger Eric
2020-03-30 14:46 ` Peter Xu
2020-03-31 6:53 ` Liu, Yi L
2020-04-02 8:33 ` Jason Wang
2020-04-02 13:46 ` Peter Xu
2020-04-03 1:38 ` Jason Wang
2020-04-03 14:20 ` Liu, Yi L
2020-04-02 18:12 ` Peter Xu
2020-04-03 14:32 ` Liu, Yi L
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