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From: Eduardo Habkost <ehabkost@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>,
	Richard Henderson <rth@twiddle.net>
Subject: [PULL 9/9] target/i386: Add ARCH_CAPABILITIES related bits into Icelake-Server CPU model
Date: Thu,  2 Apr 2020 19:20:51 -0300	[thread overview]
Message-ID: <20200402222051.523093-10-ehabkost@redhat.com> (raw)
In-Reply-To: <20200402222051.523093-1-ehabkost@redhat.com>

From: Xiaoyao Li <xiaoyao.li@intel.com>

Current Icelake-Server CPU model lacks all the features enumerated by
MSR_IA32_ARCH_CAPABILITIES.

Add them, so that guest of "Icelake-Server" can see all of them.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <20200316095605.12318-1-xiaoyao.li@intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 target/i386/cpu.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index f3b25c7301..90ffc5f3b1 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3471,6 +3471,19 @@ static X86CPUDefinition builtin_x86_defs[] = {
                     { /* end of list */ }
                 },
             },
+            {
+                .version = 3,
+                .props = (PropValue[]) {
+                    { "arch-capabilities", "on" },
+                    { "rdctl-no", "on" },
+                    { "ibrs-all", "on" },
+                    { "skip-l1dfl-vmentry", "on" },
+                    { "mds-no", "on" },
+                    { "pschange-mc-no", "on" },
+                    { "taa-no", "on" },
+                    { /* end of list */ }
+                },
+            },
             { /* end of list */ }
         }
     },
-- 
2.24.1



  parent reply	other threads:[~2020-04-02 22:25 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-02 22:20 [PULL 0/9] x86 queue for -rc2 Eduardo Habkost
2020-04-02 22:20 ` [PULL 1/9] hw/386: Add EPYC mode topology decoding functions Eduardo Habkost
2020-04-02 22:20 ` [PULL 2/9] target/i386: Cleanup and use the EPYC mode topology functions Eduardo Habkost
2020-04-02 22:20 ` [PULL 3/9] hw/i386: Introduce apicid functions inside X86MachineState Eduardo Habkost
2020-04-02 22:20 ` [PULL 4/9] i386: Introduce use_epyc_apic_id_encoding in X86CPUDefinition Eduardo Habkost
2020-04-02 22:20 ` [PULL 5/9] hw/i386: Move arch_id decode inside x86_cpus_init Eduardo Habkost
2020-04-02 22:20 ` [PULL 6/9] target/i386: Enable new apic id encoding for EPYC based cpus models Eduardo Habkost
2020-04-02 22:20 ` [PULL 7/9] i386: Fix pkg_id offset for EPYC cpu models Eduardo Habkost
2020-04-02 22:20 ` [PULL 8/9] target/i386: set the CPUID level to 0x14 on old machine-type Eduardo Habkost
2020-04-02 22:20 ` Eduardo Habkost [this message]
2020-04-03 11:59 ` [PULL 0/9] x86 queue for -rc2 Peter Maydell

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