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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.47.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:47:58 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 09/54] hw/arm/fsl-imx6: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:46:58 +0200 Message-Id: <20200406174743.16956-10-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , "open list:SABRELITE / i.MX6" , Jean-Christophe Dubois Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Coccinelle failed at processing this file: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/fsl-imx6.c Fatal error: exception Coccinelle_modules.Common.Timeout While reviewing we noticed some functions can be called at init() time, reducing the need to add extra Error checks at realize() time. Move them. The coccinelle script succeeds after this. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/fsl-imx6.c | 47 +++++++++++++++++++++++------------------------ 1 file changed, 23 insertions(+), 24 deletions(-) diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 3d37352b08..6bf8aa0404 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -48,11 +48,30 @@ static void fsl_imx6_init(Object *obj) object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]), ARM_CPU_TYPE_NAME("cortex-a9"), &error_abort, NULL); + + /* On uniprocessor, the CBAR is set to 0 */ + if (smp_cpus > 1) { + object_property_set_int(OBJECT(&s->cpu[i]), FSL_IMX6_A9MPCORE_ADDR, + "reset-cbar", &error_abort); + } + + /* All CPU but CPU 0 start in power off mode */ + if (i) { + object_property_set_bool(OBJECT(&s->cpu[i]), true, + "start-powered-off", &error_abort); + } } sysbus_init_child_obj(obj, "a9mpcore", &s->a9mpcore, sizeof(s->a9mpcore), TYPE_A9MPCORE_PRIV); + object_property_set_int(OBJECT(&s->a9mpcore), smp_cpus, "num-cpu", + &error_abort); + + object_property_set_int(OBJECT(&s->a9mpcore), + FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq", + &error_abort); + sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX6_CCM); sysbus_init_child_obj(obj, "src", &s->src, sizeof(s->src), TYPE_IMX6_SRC); @@ -81,6 +100,10 @@ static void fsl_imx6_init(Object *obj) snprintf(name, NAME_SIZE, "gpio%d", i + 1); sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO); + object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-edge-sel", + &error_abort); + object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq", + &error_abort); } for (i = 0; i < FSL_IMX6_NUM_ESDHCS; i++) { @@ -124,19 +147,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) unsigned int smp_cpus = ms->smp.cpus; for (i = 0; i < smp_cpus; i++) { - - /* On uniprocessor, the CBAR is set to 0 */ - if (smp_cpus > 1) { - object_property_set_int(OBJECT(&s->cpu[i]), FSL_IMX6_A9MPCORE_ADDR, - "reset-cbar", &error_abort); - } - - /* All CPU but CPU 0 start in power off mode */ - if (i) { - object_property_set_bool(OBJECT(&s->cpu[i]), true, - "start-powered-off", &error_abort); - } - object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err); if (err) { error_propagate(errp, err); @@ -144,13 +154,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) } } - object_property_set_int(OBJECT(&s->a9mpcore), smp_cpus, "num-cpu", - &error_abort); - - object_property_set_int(OBJECT(&s->a9mpcore), - FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq", - &error_abort); - object_property_set_bool(OBJECT(&s->a9mpcore), true, "realized", &err); if (err) { error_propagate(errp, err); @@ -310,10 +313,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) }, }; - object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-edge-sel", - &error_abort); - object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq", - &error_abort); object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err); if (err) { error_propagate(errp, err); -- 2.21.1