From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
qemu-arm@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PATCH 5/6] target/arm/cpu: Update coding style to make checkpatch.pl happy
Date: Tue, 21 Apr 2020 15:19:25 +0200 [thread overview]
Message-ID: <20200421131926.12116-6-philmd@redhat.com> (raw)
In-Reply-To: <20200421131926.12116-1-philmd@redhat.com>
We will move this code in the next commit. Clean it up
first to avoid checkpatch.pl errors.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
target/arm/cpu.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 9023d9e2cf..1ddf850f00 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -582,7 +582,8 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
CPUARMState *env = &cpu->env;
bool ret = false;
- /* ARMv7-M interrupt masking works differently than -A or -R.
+ /*
+ * ARMv7-M interrupt masking works differently than -A or -R.
* There is no FIQ/IRQ distinction. Instead of I and F bits
* masking FIQ and IRQ interrupts, an exception is taken only
* if it is higher priority than the current execution priority
@@ -1902,7 +1903,8 @@ static void arm1026_initfn(Object *obj)
static void arm1136_r2_initfn(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
- /* What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
+ /*
+ * What qemu calls "arm1136_r2" is actually the 1136 r0p2, ie an
* older core than plain "arm1136". In particular this does not
* have the v6K features.
* These ID register values are correct for 1136 but may be wrong
@@ -2688,7 +2690,8 @@ static const ARMCPUInfo arm_cpus[] = {
{ .name = "arm926", .initfn = arm926_initfn },
{ .name = "arm946", .initfn = arm946_initfn },
{ .name = "arm1026", .initfn = arm1026_initfn },
- /* What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
+ /*
+ * What QEMU calls "arm1136-r2" is actually the 1136 r0p2, i.e. an
* older core than plain "arm1136". In particular this does not
* have the v6K features.
*/
--
2.21.1
next prev parent reply other threads:[~2020-04-21 13:24 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-21 13:19 [PATCH 0/6] target/arm: Restrict TCG cpus to TCG accel Philippe Mathieu-Daudé
2020-04-21 13:19 ` [PATCH 1/6] target/arm: Restric the Address Translate write operation " Philippe Mathieu-Daudé
2020-04-22 4:13 ` Richard Henderson
2020-04-21 13:19 ` [PATCH 2/6] target/arm: Make set_feature() available for other files Philippe Mathieu-Daudé
2020-04-23 7:23 ` Philippe Mathieu-Daudé
2020-04-21 13:19 ` [PATCH 3/6] target/arm: Make cpu_register() " Philippe Mathieu-Daudé
2020-04-21 13:19 ` [PATCH 4/6] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[] Philippe Mathieu-Daudé
2020-04-22 4:16 ` Richard Henderson
2020-04-21 13:19 ` Philippe Mathieu-Daudé [this message]
2020-04-22 4:17 ` [PATCH 5/6] target/arm/cpu: Update coding style to make checkpatch.pl happy Richard Henderson
2020-04-21 13:19 ` [PATCH 6/6] target/arm: Restrict TCG cpus to TCG accel Philippe Mathieu-Daudé
2020-04-22 4:24 ` Richard Henderson
2020-04-22 6:58 ` Philippe Mathieu-Daudé
2020-04-22 6:57 ` Philippe Mathieu-Daudé
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