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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PATCH v2 3/5] target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[]
Date: Thu, 23 Apr 2020 09:33:56 +0200	[thread overview]
Message-ID: <20200423073358.27155-4-philmd@redhat.com> (raw)
In-Reply-To: <20200423073358.27155-1-philmd@redhat.com>

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 target/arm/cpu.c   | 8 +++-----
 target/arm/cpu64.c | 8 +++-----
 2 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 47e35400da..30e961f775 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2745,7 +2745,6 @@ static const ARMCPUInfo arm_cpus[] = {
     { .name = "any",         .initfn = arm_max_initfn },
 #endif
 #endif
-    { .name = NULL }
 };
 
 static Property arm_cpu_properties[] = {
@@ -2893,14 +2892,13 @@ static const TypeInfo idau_interface_type_info = {
 
 static void arm_cpu_register_types(void)
 {
-    const ARMCPUInfo *info = arm_cpus;
+    size_t i;
 
     type_register_static(&arm_cpu_type_info);
     type_register_static(&idau_interface_type_info);
 
-    while (info->name) {
-        arm_cpu_register(info);
-        info++;
+    for (i = 0; i < ARRAY_SIZE(arm_cpus); ++i) {
+        arm_cpu_register(&arm_cpus[i]);
     }
 
 #ifdef CONFIG_KVM
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 951588c56e..ef9231d55b 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -742,7 +742,6 @@ static const ARMCPUInfo aarch64_cpus[] = {
     { .name = "cortex-a53",         .initfn = aarch64_a53_initfn },
     { .name = "cortex-a72",         .initfn = aarch64_a72_initfn },
     { .name = "max",                .initfn = aarch64_max_initfn },
-    { .name = NULL }
 };
 
 static bool aarch64_cpu_get_aarch64(Object *obj, Error **errp)
@@ -848,13 +847,12 @@ static const TypeInfo aarch64_cpu_type_info = {
 
 static void aarch64_cpu_register_types(void)
 {
-    const ARMCPUInfo *info = aarch64_cpus;
+    size_t i;
 
     type_register_static(&aarch64_cpu_type_info);
 
-    while (info->name) {
-        aarch64_cpu_register(info);
-        info++;
+    for (i = 0; i < ARRAY_SIZE(aarch64_cpus); ++i) {
+        aarch64_cpu_register(&aarch64_cpus[i]);
     }
 }
 
-- 
2.21.1



  parent reply	other threads:[~2020-04-23  7:36 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-23  7:33 [PATCH v2 0/5] target/arm: Restrict TCG cpus to TCG accel Philippe Mathieu-Daudé
2020-04-23  7:33 ` [PATCH v2 1/5] target/arm: Restric the Address Translate write operation " Philippe Mathieu-Daudé
2020-04-23  7:33 ` [PATCH v2 2/5] target/arm: Make cpu_register() available for other files Philippe Mathieu-Daudé
2020-04-23  7:33 ` Philippe Mathieu-Daudé [this message]
2020-04-23  7:33 ` [PATCH v2 4/5] target/arm/cpu: Update coding style to make checkpatch.pl happy Philippe Mathieu-Daudé
2020-04-23  7:33 ` [PATCH v2 5/5] target/arm: Restrict TCG cpus to TCG accel Philippe Mathieu-Daudé
2020-04-27 13:04 ` [PATCH v2 0/5] " Peter Maydell
2020-04-27 13:42   ` Philippe Mathieu-Daudé

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